xref: /dpdk/drivers/net/intel/cpfl/cpfl_controlq.h (revision c1d145834f287aa8cf53de914618a7312f2c360e)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2001-2023 Intel Corporation
3  */
4 
5 #ifndef _CPFL_CONTROLQ_H_
6 #define _CPFL_CONTROLQ_H_
7 
8 #include "base/idpf_osdep.h"
9 #include "base/idpf_controlq_api.h"
10 
11 #define CPFL_CTLQ_DESCRIPTOR_SIZE	32
12 #define CPFL_CTLQ_MAILBOX_BUFFER_SIZE	4096
13 #define CPFL_CTLQ_CFGQ_BUFFER_SIZE	256
14 #define CPFL_DFLT_MBX_RING_LEN		512
15 #define CPFL_CFGQ_RING_LEN		512
16 
17 /* CRQ/CSQ specific error codes */
18 #define CPFL_ERR_CTLQ_ERROR             -74     /* -EBADMSG */
19 #define CPFL_ERR_CTLQ_TIMEOUT           -110    /* -ETIMEDOUT */
20 #define CPFL_ERR_CTLQ_FULL              -28     /* -ENOSPC */
21 #define CPFL_ERR_CTLQ_NO_WORK           -42     /* -ENOMSG */
22 #define CPFL_ERR_CTLQ_EMPTY             -105    /* -ENOBUFS */
23 
24 /* Generic queue info structures */
25 /* MB, CONFIG and EVENT q do not have extended info */
26 struct cpfl_ctlq_create_info {
27 	enum idpf_ctlq_type type;
28 	int id; /* absolute queue offset passed as input
29 		 * -1 for default mailbox if present
30 		 */
31 	uint16_t len; /* Queue length passed as input */
32 	uint16_t buf_size; /* buffer size passed as input */
33 	uint64_t base_address; /* output, HPA of the Queue start  */
34 	struct idpf_ctlq_reg reg; /* registers accessed by ctlqs */
35 	/* Pass down previously allocated descriptor ring and buffer memory
36 	 * for each control queue to be created
37 	 */
38 	struct idpf_dma_mem ring_mem;
39 	/* The CP will allocate one large buffer that the CPFlib will piece
40 	 * into individual buffers for each descriptor
41 	 */
42 	struct idpf_dma_mem buf_mem;
43 
44 	int ext_info_size;
45 	void *ext_info; /* Specific to q type */
46 };
47 
48 int cpfl_ctlq_alloc_ring_res(struct idpf_hw *hw,
49 			     struct idpf_ctlq_info *cq,
50 			     struct cpfl_ctlq_create_info *qinfo);
51 int cpfl_ctlq_add(struct idpf_hw *hw,
52 		  struct cpfl_ctlq_create_info *qinfo,
53 		  struct idpf_ctlq_info **cq);
54 int cpfl_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq,
55 		   u16 num_q_msg, struct idpf_ctlq_msg q_msg[]);
56 int cpfl_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count,
57 		       struct idpf_ctlq_msg *msg_status[]);
58 int cpfl_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq,
59 			    u16 *buff_count, struct idpf_dma_mem **buffs);
60 int cpfl_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,
61 		   struct idpf_ctlq_msg *q_msg);
62 int cpfl_vport_ctlq_add(struct idpf_hw *hw,
63 			struct cpfl_ctlq_create_info *qinfo,
64 			struct idpf_ctlq_info **cq);
65 void cpfl_vport_ctlq_remove(struct idpf_hw *hw, struct idpf_ctlq_info *cq);
66 int cpfl_vport_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq,
67 			 u16 num_q_msg, struct idpf_ctlq_msg q_msg[]);
68 int cpfl_vport_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,
69 			 struct idpf_ctlq_msg q_msg[]);
70 
71 int cpfl_vport_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq,
72 				  u16 *buff_count, struct idpf_dma_mem **buffs);
73 int cpfl_vport_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count,
74 			     struct idpf_ctlq_msg *msg_status[]);
75 #endif
76