xref: /dpdk/drivers/net/hinic/base/hinic_pmd_hwif.h (revision 62d2083dd78edf628dc03b46ced95e3c4a4b3c4b)
14b844175SZiyang Xuan /* SPDX-License-Identifier: BSD-3-Clause
24b844175SZiyang Xuan  * Copyright(c) 2017 Huawei Technologies Co., Ltd
34b844175SZiyang Xuan  */
44b844175SZiyang Xuan 
54b844175SZiyang Xuan #ifndef _HINIC_PMD_HWIF_H_
64b844175SZiyang Xuan #define _HINIC_PMD_HWIF_H_
74b844175SZiyang Xuan 
84b844175SZiyang Xuan #define HINIC_WAIT_DOORBELL_AND_OUTBOUND_TIMEOUT	30000
94b844175SZiyang Xuan 
104b844175SZiyang Xuan #define HINIC_HWIF_NUM_AEQS(hwif)		((hwif)->attr.num_aeqs)
114b844175SZiyang Xuan #define HINIC_HWIF_NUM_CEQS(hwif)		((hwif)->attr.num_ceqs)
124b844175SZiyang Xuan #define HINIC_HWIF_NUM_IRQS(hwif)		((hwif)->attr.num_irqs)
134b844175SZiyang Xuan #define HINIC_HWIF_GLOBAL_IDX(hwif)		((hwif)->attr.func_global_idx)
144b844175SZiyang Xuan #define HINIC_HWIF_GLOBAL_VF_OFFSET(hwif) ((hwif)->attr.global_vf_id_of_pf)
154b844175SZiyang Xuan #define HINIC_HWIF_PPF_IDX(hwif)		((hwif)->attr.ppf_idx)
164b844175SZiyang Xuan #define HINIC_PCI_INTF_IDX(hwif)		((hwif)->attr.pci_intf_idx)
174b844175SZiyang Xuan 
184b844175SZiyang Xuan #define HINIC_FUNC_TYPE(dev)		((dev)->hwif->attr.func_type)
194b844175SZiyang Xuan #define HINIC_IS_PF(dev)		(HINIC_FUNC_TYPE(dev) == TYPE_PF)
204b844175SZiyang Xuan #define HINIC_IS_VF(dev)		(HINIC_FUNC_TYPE(dev) == TYPE_VF)
214b844175SZiyang Xuan #define HINIC_IS_PPF(dev)		(HINIC_FUNC_TYPE(dev) == TYPE_PPF)
224b844175SZiyang Xuan 
234b844175SZiyang Xuan enum func_type {
244b844175SZiyang Xuan 	TYPE_PF,
254b844175SZiyang Xuan 	TYPE_VF,
264b844175SZiyang Xuan 	TYPE_PPF,
274b844175SZiyang Xuan };
284b844175SZiyang Xuan 
294b844175SZiyang Xuan enum hinic_msix_state {
304b844175SZiyang Xuan 	HINIC_MSIX_ENABLE,
314b844175SZiyang Xuan 	HINIC_MSIX_DISABLE,
324b844175SZiyang Xuan };
334b844175SZiyang Xuan 
344b844175SZiyang Xuan /* Defines the IRQ information structure */
354b844175SZiyang Xuan struct irq_info {
364b844175SZiyang Xuan 	u16 msix_entry_idx; /* IRQ corresponding index number */
374b844175SZiyang Xuan 	u32 irq_id;         /* the IRQ number from OS */
384b844175SZiyang Xuan };
394b844175SZiyang Xuan 
404b844175SZiyang Xuan struct hinic_free_db_area {
414b844175SZiyang Xuan 	u32		db_idx[HINIC_DB_MAX_AREAS];
424b844175SZiyang Xuan 
434b844175SZiyang Xuan 	u32		num_free;
444b844175SZiyang Xuan 
454b844175SZiyang Xuan 	u32		alloc_pos;
464b844175SZiyang Xuan 	u32		return_pos;
474b844175SZiyang Xuan 	/* spinlock for idx */
484b844175SZiyang Xuan 	spinlock_t	idx_lock;
494b844175SZiyang Xuan };
504b844175SZiyang Xuan 
514b844175SZiyang Xuan struct hinic_func_attr {
524b844175SZiyang Xuan 	u16			func_global_idx;
534b844175SZiyang Xuan 	u8			port_to_port_idx;
544b844175SZiyang Xuan 	u8			pci_intf_idx;
554b844175SZiyang Xuan 	u8			vf_in_pf;
564b844175SZiyang Xuan 	enum func_type		func_type;
574b844175SZiyang Xuan 
584b844175SZiyang Xuan 	u8			mpf_idx;
594b844175SZiyang Xuan 
604b844175SZiyang Xuan 	u8			ppf_idx;
614b844175SZiyang Xuan 
624b844175SZiyang Xuan 	u16			num_irqs;	/* max: 2 ^ 15 */
634b844175SZiyang Xuan 	u8			num_aeqs;	/* max: 2 ^ 3 */
644b844175SZiyang Xuan 	u8			num_ceqs;	/* max: 2 ^ 7 */
654b844175SZiyang Xuan 
664b844175SZiyang Xuan 	u8			num_dma_attr;	/* max: 2 ^ 6 */
674b844175SZiyang Xuan 
684b844175SZiyang Xuan 	u16			global_vf_id_of_pf;
694b844175SZiyang Xuan };
704b844175SZiyang Xuan 
714b844175SZiyang Xuan struct hinic_hwif {
724b844175SZiyang Xuan 	u8 __iomem			*cfg_regs_base;
734b844175SZiyang Xuan 	u8 __iomem			*intr_regs_base;
744b844175SZiyang Xuan 	u64				db_base_phy;
754b844175SZiyang Xuan 	u8 __iomem			*db_base;
76*62d2083dSXiaoyun Wang 	u64				db_max_areas;
774b844175SZiyang Xuan 	struct hinic_free_db_area	free_db_area;
784b844175SZiyang Xuan 	struct hinic_func_attr		attr;
794b844175SZiyang Xuan };
804b844175SZiyang Xuan 
hinic_hwif_read_reg(struct hinic_hwif * hwif,u32 reg)814b844175SZiyang Xuan static inline u32 hinic_hwif_read_reg(struct hinic_hwif *hwif, u32 reg)
824b844175SZiyang Xuan {
834b844175SZiyang Xuan 	return be32_to_cpu(readl(hwif->cfg_regs_base + reg));
844b844175SZiyang Xuan }
854b844175SZiyang Xuan 
864b844175SZiyang Xuan static inline void
hinic_hwif_write_reg(struct hinic_hwif * hwif,u32 reg,u32 val)874b844175SZiyang Xuan hinic_hwif_write_reg(struct hinic_hwif *hwif, u32 reg, u32 val)
884b844175SZiyang Xuan {
894b844175SZiyang Xuan 	writel(cpu_to_be32(val), hwif->cfg_regs_base + reg);
904b844175SZiyang Xuan }
914b844175SZiyang Xuan 
924b844175SZiyang Xuan u16 hinic_global_func_id(void *hwdev);	/* func_attr.glb_func_idx */
934b844175SZiyang Xuan 
944b844175SZiyang Xuan enum func_type hinic_func_type(void *hwdev);
954b844175SZiyang Xuan 
964b844175SZiyang Xuan void hinic_set_pf_status(struct hinic_hwif *hwif, enum hinic_pf_status status);
974b844175SZiyang Xuan 
984b844175SZiyang Xuan enum hinic_pf_status hinic_get_pf_status(struct hinic_hwif *hwif);
994b844175SZiyang Xuan 
1004b844175SZiyang Xuan void hinic_enable_doorbell(struct hinic_hwif *hwif);
1014b844175SZiyang Xuan 
1024b844175SZiyang Xuan void hinic_disable_doorbell(struct hinic_hwif *hwif);
1034b844175SZiyang Xuan 
1044b844175SZiyang Xuan int hinic_alloc_db_addr(void *hwdev, void __iomem **db_base);
1054b844175SZiyang Xuan 
1064b844175SZiyang Xuan void hinic_free_db_addr(void *hwdev, void __iomem *db_base);
1074b844175SZiyang Xuan 
108b8582d05SXiaoyun Wang int wait_until_doorbell_flush_states(struct hinic_hwif *hwif,
109b8582d05SXiaoyun Wang 					enum hinic_doorbell_ctrl states);
110b8582d05SXiaoyun Wang 
1114b844175SZiyang Xuan void hinic_set_msix_state(void *hwdev, u16 msix_idx,
1124b844175SZiyang Xuan 			  enum hinic_msix_state flag);
1134b844175SZiyang Xuan 
1144b844175SZiyang Xuan void hinic_misx_intr_clear_resend_bit(void *hwdev, u16 msix_idx,
1154b844175SZiyang Xuan 				      u8 clear_resend_en);
1164b844175SZiyang Xuan 
1174b844175SZiyang Xuan u8 hinic_ppf_idx(void *hwdev);
1184b844175SZiyang Xuan 
1194b844175SZiyang Xuan int hinic_hwif_res_init(struct hinic_hwdev *hwdev);
1204b844175SZiyang Xuan 
1214b844175SZiyang Xuan void hinic_hwif_res_free(struct hinic_hwdev *hwdev);
1224b844175SZiyang Xuan 
123b8582d05SXiaoyun Wang u8 hinic_dma_attr_entry_num(void *hwdev);
124b8582d05SXiaoyun Wang 
1254b844175SZiyang Xuan #endif /* _HINIC_PMD_HWIF_H_ */
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