1 /* 2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * Copyright (c) 2014, Cisco Systems, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in 17 * the documentation and/or other materials provided with the 18 * distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #include <stdio.h> 36 #include <stdint.h> 37 38 #include <rte_dev.h> 39 #include <rte_pci.h> 40 #include <rte_ethdev.h> 41 #include <rte_ethdev_pci.h> 42 #include <rte_string_fns.h> 43 44 #include "vnic_intr.h" 45 #include "vnic_cq.h" 46 #include "vnic_wq.h" 47 #include "vnic_rq.h" 48 #include "vnic_enet.h" 49 #include "enic.h" 50 51 #ifdef RTE_LIBRTE_ENIC_DEBUG 52 #define ENICPMD_FUNC_TRACE() \ 53 RTE_LOG(DEBUG, PMD, "ENICPMD trace: %s\n", __func__) 54 #else 55 #define ENICPMD_FUNC_TRACE() (void)0 56 #endif 57 58 /* 59 * The set of PCI devices this driver supports 60 */ 61 #define CISCO_PCI_VENDOR_ID 0x1137 62 static const struct rte_pci_id pci_id_enic_map[] = { 63 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 64 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 65 {.vendor_id = 0, /* sentinel */}, 66 }; 67 68 static int 69 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev, 70 enum rte_filter_op filter_op, void *arg) 71 { 72 struct enic *enic = pmd_priv(eth_dev); 73 int ret = 0; 74 75 ENICPMD_FUNC_TRACE(); 76 if (filter_op == RTE_ETH_FILTER_NOP) 77 return 0; 78 79 if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH) 80 return -EINVAL; 81 82 switch (filter_op) { 83 case RTE_ETH_FILTER_ADD: 84 case RTE_ETH_FILTER_UPDATE: 85 ret = enic_fdir_add_fltr(enic, 86 (struct rte_eth_fdir_filter *)arg); 87 break; 88 89 case RTE_ETH_FILTER_DELETE: 90 ret = enic_fdir_del_fltr(enic, 91 (struct rte_eth_fdir_filter *)arg); 92 break; 93 94 case RTE_ETH_FILTER_STATS: 95 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg); 96 break; 97 98 case RTE_ETH_FILTER_FLUSH: 99 dev_warning(enic, "unsupported operation %u", filter_op); 100 ret = -ENOTSUP; 101 break; 102 case RTE_ETH_FILTER_INFO: 103 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg); 104 break; 105 default: 106 dev_err(enic, "unknown operation %u", filter_op); 107 ret = -EINVAL; 108 break; 109 } 110 return ret; 111 } 112 113 static int 114 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev, 115 enum rte_filter_type filter_type, 116 enum rte_filter_op filter_op, 117 void *arg) 118 { 119 int ret = -EINVAL; 120 121 if (RTE_ETH_FILTER_FDIR == filter_type) 122 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg); 123 else 124 dev_warning(enic, "Filter type (%d) not supported", 125 filter_type); 126 127 return ret; 128 } 129 130 static void enicpmd_dev_tx_queue_release(void *txq) 131 { 132 ENICPMD_FUNC_TRACE(); 133 enic_free_wq(txq); 134 } 135 136 static int enicpmd_dev_setup_intr(struct enic *enic) 137 { 138 int ret; 139 unsigned int index; 140 141 ENICPMD_FUNC_TRACE(); 142 143 /* Are we done with the init of all the queues? */ 144 for (index = 0; index < enic->cq_count; index++) { 145 if (!enic->cq[index].ctrl) 146 break; 147 } 148 if (enic->cq_count != index) 149 return 0; 150 for (index = 0; index < enic->wq_count; index++) { 151 if (!enic->wq[index].ctrl) 152 break; 153 } 154 if (enic->wq_count != index) 155 return 0; 156 /* check start of packet (SOP) RQs only in case scatter is disabled. */ 157 for (index = 0; index < enic->rq_count; index++) { 158 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl) 159 break; 160 } 161 if (enic->rq_count != index) 162 return 0; 163 164 ret = enic_alloc_intr_resources(enic); 165 if (ret) { 166 dev_err(enic, "alloc intr failed\n"); 167 return ret; 168 } 169 enic_init_vnic_resources(enic); 170 171 ret = enic_setup_finish(enic); 172 if (ret) 173 dev_err(enic, "setup could not be finished\n"); 174 175 return ret; 176 } 177 178 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, 179 uint16_t queue_idx, 180 uint16_t nb_desc, 181 unsigned int socket_id, 182 __rte_unused const struct rte_eth_txconf *tx_conf) 183 { 184 int ret; 185 struct enic *enic = pmd_priv(eth_dev); 186 187 ENICPMD_FUNC_TRACE(); 188 if (queue_idx >= ENIC_WQ_MAX) { 189 dev_err(enic, 190 "Max number of TX queues exceeded. Max is %d\n", 191 ENIC_WQ_MAX); 192 return -EINVAL; 193 } 194 195 eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx]; 196 197 ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc); 198 if (ret) { 199 dev_err(enic, "error in allocating wq\n"); 200 return ret; 201 } 202 203 return enicpmd_dev_setup_intr(enic); 204 } 205 206 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev, 207 uint16_t queue_idx) 208 { 209 struct enic *enic = pmd_priv(eth_dev); 210 211 ENICPMD_FUNC_TRACE(); 212 213 enic_start_wq(enic, queue_idx); 214 215 return 0; 216 } 217 218 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, 219 uint16_t queue_idx) 220 { 221 int ret; 222 struct enic *enic = pmd_priv(eth_dev); 223 224 ENICPMD_FUNC_TRACE(); 225 226 ret = enic_stop_wq(enic, queue_idx); 227 if (ret) 228 dev_err(enic, "error in stopping wq %d\n", queue_idx); 229 230 return ret; 231 } 232 233 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev, 234 uint16_t queue_idx) 235 { 236 struct enic *enic = pmd_priv(eth_dev); 237 238 ENICPMD_FUNC_TRACE(); 239 240 enic_start_rq(enic, queue_idx); 241 242 return 0; 243 } 244 245 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, 246 uint16_t queue_idx) 247 { 248 int ret; 249 struct enic *enic = pmd_priv(eth_dev); 250 251 ENICPMD_FUNC_TRACE(); 252 253 ret = enic_stop_rq(enic, queue_idx); 254 if (ret) 255 dev_err(enic, "error in stopping rq %d\n", queue_idx); 256 257 return ret; 258 } 259 260 static void enicpmd_dev_rx_queue_release(void *rxq) 261 { 262 ENICPMD_FUNC_TRACE(); 263 enic_free_rq(rxq); 264 } 265 266 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev, 267 uint16_t rx_queue_id) 268 { 269 struct enic *enic = pmd_priv(dev); 270 uint32_t queue_count = 0; 271 struct vnic_cq *cq; 272 uint32_t cq_tail; 273 uint16_t cq_idx; 274 int rq_num; 275 276 rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id); 277 cq = &enic->cq[enic_cq_rq(enic, rq_num)]; 278 cq_idx = cq->to_clean; 279 280 cq_tail = ioread32(&cq->ctrl->cq_tail); 281 282 if (cq_tail < cq_idx) 283 cq_tail += cq->ring.desc_count; 284 285 queue_count = cq_tail - cq_idx; 286 287 return queue_count; 288 } 289 290 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, 291 uint16_t queue_idx, 292 uint16_t nb_desc, 293 unsigned int socket_id, 294 const struct rte_eth_rxconf *rx_conf, 295 struct rte_mempool *mp) 296 { 297 int ret; 298 struct enic *enic = pmd_priv(eth_dev); 299 300 ENICPMD_FUNC_TRACE(); 301 /* With Rx scatter support, two RQs are now used on VIC per RQ used 302 * by the application. 303 */ 304 if (queue_idx * 2 >= ENIC_RQ_MAX) { 305 dev_err(enic, 306 "Max number of RX queues exceeded. Max is %d. This PMD uses 2 RQs on VIC per RQ used by DPDK.\n", 307 ENIC_RQ_MAX); 308 return -EINVAL; 309 } 310 311 eth_dev->data->rx_queues[queue_idx] = 312 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 313 314 ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc, 315 rx_conf->rx_free_thresh); 316 if (ret) { 317 dev_err(enic, "error in allocating rq\n"); 318 return ret; 319 } 320 321 return enicpmd_dev_setup_intr(enic); 322 } 323 324 static int enicpmd_vlan_filter_set(struct rte_eth_dev *eth_dev, 325 uint16_t vlan_id, int on) 326 { 327 struct enic *enic = pmd_priv(eth_dev); 328 int err; 329 330 ENICPMD_FUNC_TRACE(); 331 if (on) 332 err = enic_add_vlan(enic, vlan_id); 333 else 334 err = enic_del_vlan(enic, vlan_id); 335 return err; 336 } 337 338 static void enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask) 339 { 340 struct enic *enic = pmd_priv(eth_dev); 341 342 ENICPMD_FUNC_TRACE(); 343 344 if (mask & ETH_VLAN_STRIP_MASK) { 345 if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip) 346 enic->ig_vlan_strip_en = 1; 347 else 348 enic->ig_vlan_strip_en = 0; 349 } 350 enic_set_rss_nic_cfg(enic); 351 352 353 if (mask & ETH_VLAN_FILTER_MASK) { 354 dev_warning(enic, 355 "Configuration of VLAN filter is not supported\n"); 356 } 357 358 if (mask & ETH_VLAN_EXTEND_MASK) { 359 dev_warning(enic, 360 "Configuration of extended VLAN is not supported\n"); 361 } 362 } 363 364 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev) 365 { 366 int ret; 367 struct enic *enic = pmd_priv(eth_dev); 368 369 ENICPMD_FUNC_TRACE(); 370 ret = enic_set_vnic_res(enic); 371 if (ret) { 372 dev_err(enic, "Set vNIC resource num failed, aborting\n"); 373 return ret; 374 } 375 376 if (eth_dev->data->dev_conf.rxmode.split_hdr_size && 377 eth_dev->data->dev_conf.rxmode.header_split) { 378 /* Enable header-data-split */ 379 enic_set_hdr_split_size(enic, 380 eth_dev->data->dev_conf.rxmode.split_hdr_size); 381 } 382 383 enicpmd_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK); 384 enic->hw_ip_checksum = eth_dev->data->dev_conf.rxmode.hw_ip_checksum; 385 return 0; 386 } 387 388 /* Start the device. 389 * It returns 0 on success. 390 */ 391 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev) 392 { 393 struct enic *enic = pmd_priv(eth_dev); 394 395 ENICPMD_FUNC_TRACE(); 396 return enic_enable(enic); 397 } 398 399 /* 400 * Stop device: disable rx and tx functions to allow for reconfiguring. 401 */ 402 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev) 403 { 404 struct rte_eth_link link; 405 struct enic *enic = pmd_priv(eth_dev); 406 407 ENICPMD_FUNC_TRACE(); 408 enic_disable(enic); 409 memset(&link, 0, sizeof(link)); 410 rte_atomic64_cmpset((uint64_t *)ð_dev->data->dev_link, 411 *(uint64_t *)ð_dev->data->dev_link, 412 *(uint64_t *)&link); 413 } 414 415 /* 416 * Stop device. 417 */ 418 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev) 419 { 420 struct enic *enic = pmd_priv(eth_dev); 421 422 ENICPMD_FUNC_TRACE(); 423 enic_remove(enic); 424 } 425 426 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev, 427 __rte_unused int wait_to_complete) 428 { 429 struct enic *enic = pmd_priv(eth_dev); 430 431 ENICPMD_FUNC_TRACE(); 432 return enic_link_update(enic); 433 } 434 435 static void enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev, 436 struct rte_eth_stats *stats) 437 { 438 struct enic *enic = pmd_priv(eth_dev); 439 440 ENICPMD_FUNC_TRACE(); 441 enic_dev_stats_get(enic, stats); 442 } 443 444 static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev) 445 { 446 struct enic *enic = pmd_priv(eth_dev); 447 448 ENICPMD_FUNC_TRACE(); 449 enic_dev_stats_clear(enic); 450 } 451 452 static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, 453 struct rte_eth_dev_info *device_info) 454 { 455 struct enic *enic = pmd_priv(eth_dev); 456 457 ENICPMD_FUNC_TRACE(); 458 device_info->pci_dev = RTE_DEV_TO_PCI(eth_dev->device); 459 /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */ 460 device_info->max_rx_queues = enic->conf_rq_count / 2; 461 device_info->max_tx_queues = enic->conf_wq_count; 462 device_info->min_rx_bufsize = ENIC_MIN_MTU; 463 device_info->max_rx_pktlen = enic->max_mtu + ETHER_HDR_LEN + 4; 464 device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR; 465 device_info->rx_offload_capa = 466 DEV_RX_OFFLOAD_VLAN_STRIP | 467 DEV_RX_OFFLOAD_IPV4_CKSUM | 468 DEV_RX_OFFLOAD_UDP_CKSUM | 469 DEV_RX_OFFLOAD_TCP_CKSUM; 470 device_info->tx_offload_capa = 471 DEV_TX_OFFLOAD_VLAN_INSERT | 472 DEV_TX_OFFLOAD_IPV4_CKSUM | 473 DEV_TX_OFFLOAD_UDP_CKSUM | 474 DEV_TX_OFFLOAD_TCP_CKSUM | 475 DEV_TX_OFFLOAD_TCP_TSO; 476 device_info->default_rxconf = (struct rte_eth_rxconf) { 477 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH 478 }; 479 } 480 481 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) 482 { 483 static const uint32_t ptypes[] = { 484 RTE_PTYPE_L2_ETHER, 485 RTE_PTYPE_L2_ETHER_VLAN, 486 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 487 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 488 RTE_PTYPE_L4_TCP, 489 RTE_PTYPE_L4_UDP, 490 RTE_PTYPE_L4_FRAG, 491 RTE_PTYPE_L4_NONFRAG, 492 RTE_PTYPE_UNKNOWN 493 }; 494 495 if (dev->rx_pkt_burst == enic_recv_pkts) 496 return ptypes; 497 return NULL; 498 } 499 500 static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev) 501 { 502 struct enic *enic = pmd_priv(eth_dev); 503 504 ENICPMD_FUNC_TRACE(); 505 enic->promisc = 1; 506 enic_add_packet_filter(enic); 507 } 508 509 static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev) 510 { 511 struct enic *enic = pmd_priv(eth_dev); 512 513 ENICPMD_FUNC_TRACE(); 514 enic->promisc = 0; 515 enic_add_packet_filter(enic); 516 } 517 518 static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev) 519 { 520 struct enic *enic = pmd_priv(eth_dev); 521 522 ENICPMD_FUNC_TRACE(); 523 enic->allmulti = 1; 524 enic_add_packet_filter(enic); 525 } 526 527 static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev) 528 { 529 struct enic *enic = pmd_priv(eth_dev); 530 531 ENICPMD_FUNC_TRACE(); 532 enic->allmulti = 0; 533 enic_add_packet_filter(enic); 534 } 535 536 static void enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev, 537 struct ether_addr *mac_addr, 538 __rte_unused uint32_t index, __rte_unused uint32_t pool) 539 { 540 struct enic *enic = pmd_priv(eth_dev); 541 542 ENICPMD_FUNC_TRACE(); 543 enic_set_mac_address(enic, mac_addr->addr_bytes); 544 } 545 546 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index) 547 { 548 struct enic *enic = pmd_priv(eth_dev); 549 550 ENICPMD_FUNC_TRACE(); 551 enic_del_mac_address(enic, index); 552 } 553 554 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 555 { 556 struct enic *enic = pmd_priv(eth_dev); 557 558 ENICPMD_FUNC_TRACE(); 559 return enic_set_mtu(enic, mtu); 560 } 561 562 static const struct eth_dev_ops enicpmd_eth_dev_ops = { 563 .dev_configure = enicpmd_dev_configure, 564 .dev_start = enicpmd_dev_start, 565 .dev_stop = enicpmd_dev_stop, 566 .dev_set_link_up = NULL, 567 .dev_set_link_down = NULL, 568 .dev_close = enicpmd_dev_close, 569 .promiscuous_enable = enicpmd_dev_promiscuous_enable, 570 .promiscuous_disable = enicpmd_dev_promiscuous_disable, 571 .allmulticast_enable = enicpmd_dev_allmulticast_enable, 572 .allmulticast_disable = enicpmd_dev_allmulticast_disable, 573 .link_update = enicpmd_dev_link_update, 574 .stats_get = enicpmd_dev_stats_get, 575 .stats_reset = enicpmd_dev_stats_reset, 576 .queue_stats_mapping_set = NULL, 577 .dev_infos_get = enicpmd_dev_info_get, 578 .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get, 579 .mtu_set = enicpmd_mtu_set, 580 .vlan_filter_set = enicpmd_vlan_filter_set, 581 .vlan_tpid_set = NULL, 582 .vlan_offload_set = enicpmd_vlan_offload_set, 583 .vlan_strip_queue_set = NULL, 584 .rx_queue_start = enicpmd_dev_rx_queue_start, 585 .rx_queue_stop = enicpmd_dev_rx_queue_stop, 586 .tx_queue_start = enicpmd_dev_tx_queue_start, 587 .tx_queue_stop = enicpmd_dev_tx_queue_stop, 588 .rx_queue_setup = enicpmd_dev_rx_queue_setup, 589 .rx_queue_release = enicpmd_dev_rx_queue_release, 590 .rx_queue_count = enicpmd_dev_rx_queue_count, 591 .rx_descriptor_done = NULL, 592 .tx_queue_setup = enicpmd_dev_tx_queue_setup, 593 .tx_queue_release = enicpmd_dev_tx_queue_release, 594 .dev_led_on = NULL, 595 .dev_led_off = NULL, 596 .flow_ctrl_get = NULL, 597 .flow_ctrl_set = NULL, 598 .priority_flow_ctrl_set = NULL, 599 .mac_addr_add = enicpmd_add_mac_addr, 600 .mac_addr_remove = enicpmd_remove_mac_addr, 601 .filter_ctrl = enicpmd_dev_filter_ctrl, 602 }; 603 604 struct enic *enicpmd_list_head = NULL; 605 /* Initialize the driver 606 * It returns 0 on success. 607 */ 608 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev) 609 { 610 struct rte_pci_device *pdev; 611 struct rte_pci_addr *addr; 612 struct enic *enic = pmd_priv(eth_dev); 613 614 ENICPMD_FUNC_TRACE(); 615 616 enic->port_id = eth_dev->data->port_id; 617 enic->rte_dev = eth_dev; 618 eth_dev->dev_ops = &enicpmd_eth_dev_ops; 619 eth_dev->rx_pkt_burst = &enic_recv_pkts; 620 eth_dev->tx_pkt_burst = &enic_xmit_pkts; 621 622 pdev = RTE_DEV_TO_PCI(eth_dev->device); 623 rte_eth_copy_pci_info(eth_dev, pdev); 624 enic->pdev = pdev; 625 addr = &pdev->addr; 626 627 snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x", 628 addr->domain, addr->bus, addr->devid, addr->function); 629 630 return enic_probe(enic); 631 } 632 633 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 634 struct rte_pci_device *pci_dev) 635 { 636 return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic), 637 eth_enicpmd_dev_init); 638 } 639 640 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev) 641 { 642 return rte_eth_dev_pci_generic_remove(pci_dev, NULL); 643 } 644 645 static struct rte_pci_driver rte_enic_pmd = { 646 .id_table = pci_id_enic_map, 647 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 648 .probe = eth_enic_pci_probe, 649 .remove = eth_enic_pci_remove, 650 }; 651 652 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd); 653 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map); 654 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio"); 655