1 /* 2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * Copyright (c) 2014, Cisco Systems, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in 17 * the documentation and/or other materials provided with the 18 * distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #include <stdio.h> 36 #include <stdint.h> 37 38 #include <rte_dev.h> 39 #include <rte_pci.h> 40 #include <rte_ethdev.h> 41 #include <rte_string_fns.h> 42 43 #include "vnic_intr.h" 44 #include "vnic_cq.h" 45 #include "vnic_wq.h" 46 #include "vnic_rq.h" 47 #include "vnic_enet.h" 48 #include "enic.h" 49 50 #ifdef RTE_LIBRTE_ENIC_DEBUG 51 #define ENICPMD_FUNC_TRACE() \ 52 RTE_LOG(DEBUG, PMD, "ENICPMD trace: %s\n", __func__) 53 #else 54 #define ENICPMD_FUNC_TRACE() (void)0 55 #endif 56 57 /* 58 * The set of PCI devices this driver supports 59 */ 60 #define CISCO_PCI_VENDOR_ID 0x1137 61 static const struct rte_pci_id pci_id_enic_map[] = { 62 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 63 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 64 {.vendor_id = 0, /* sentinel */}, 65 }; 66 67 static int 68 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev, 69 enum rte_filter_op filter_op, void *arg) 70 { 71 struct enic *enic = pmd_priv(eth_dev); 72 int ret = 0; 73 74 ENICPMD_FUNC_TRACE(); 75 if (filter_op == RTE_ETH_FILTER_NOP) 76 return 0; 77 78 if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH) 79 return -EINVAL; 80 81 switch (filter_op) { 82 case RTE_ETH_FILTER_ADD: 83 case RTE_ETH_FILTER_UPDATE: 84 ret = enic_fdir_add_fltr(enic, 85 (struct rte_eth_fdir_filter *)arg); 86 break; 87 88 case RTE_ETH_FILTER_DELETE: 89 ret = enic_fdir_del_fltr(enic, 90 (struct rte_eth_fdir_filter *)arg); 91 break; 92 93 case RTE_ETH_FILTER_STATS: 94 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg); 95 break; 96 97 case RTE_ETH_FILTER_FLUSH: 98 dev_warning(enic, "unsupported operation %u", filter_op); 99 ret = -ENOTSUP; 100 break; 101 case RTE_ETH_FILTER_INFO: 102 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg); 103 break; 104 default: 105 dev_err(enic, "unknown operation %u", filter_op); 106 ret = -EINVAL; 107 break; 108 } 109 return ret; 110 } 111 112 static int 113 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev, 114 enum rte_filter_type filter_type, 115 enum rte_filter_op filter_op, 116 void *arg) 117 { 118 int ret = -EINVAL; 119 120 if (RTE_ETH_FILTER_FDIR == filter_type) 121 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg); 122 else 123 dev_warning(enic, "Filter type (%d) not supported", 124 filter_type); 125 126 return ret; 127 } 128 129 static void enicpmd_dev_tx_queue_release(void *txq) 130 { 131 ENICPMD_FUNC_TRACE(); 132 enic_free_wq(txq); 133 } 134 135 static int enicpmd_dev_setup_intr(struct enic *enic) 136 { 137 int ret; 138 unsigned int index; 139 140 ENICPMD_FUNC_TRACE(); 141 142 /* Are we done with the init of all the queues? */ 143 for (index = 0; index < enic->cq_count; index++) { 144 if (!enic->cq[index].ctrl) 145 break; 146 } 147 if (enic->cq_count != index) 148 return 0; 149 for (index = 0; index < enic->wq_count; index++) { 150 if (!enic->wq[index].ctrl) 151 break; 152 } 153 if (enic->wq_count != index) 154 return 0; 155 /* check start of packet (SOP) RQs only in case scatter is disabled. */ 156 for (index = 0; index < enic->rq_count; index++) { 157 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl) 158 break; 159 } 160 if (enic->rq_count != index) 161 return 0; 162 163 ret = enic_alloc_intr_resources(enic); 164 if (ret) { 165 dev_err(enic, "alloc intr failed\n"); 166 return ret; 167 } 168 enic_init_vnic_resources(enic); 169 170 ret = enic_setup_finish(enic); 171 if (ret) 172 dev_err(enic, "setup could not be finished\n"); 173 174 return ret; 175 } 176 177 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, 178 uint16_t queue_idx, 179 uint16_t nb_desc, 180 unsigned int socket_id, 181 __rte_unused const struct rte_eth_txconf *tx_conf) 182 { 183 int ret; 184 struct enic *enic = pmd_priv(eth_dev); 185 186 ENICPMD_FUNC_TRACE(); 187 if (queue_idx >= ENIC_WQ_MAX) { 188 dev_err(enic, 189 "Max number of TX queues exceeded. Max is %d\n", 190 ENIC_WQ_MAX); 191 return -EINVAL; 192 } 193 194 eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx]; 195 196 ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc); 197 if (ret) { 198 dev_err(enic, "error in allocating wq\n"); 199 return ret; 200 } 201 202 return enicpmd_dev_setup_intr(enic); 203 } 204 205 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev, 206 uint16_t queue_idx) 207 { 208 struct enic *enic = pmd_priv(eth_dev); 209 210 ENICPMD_FUNC_TRACE(); 211 212 enic_start_wq(enic, queue_idx); 213 214 return 0; 215 } 216 217 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, 218 uint16_t queue_idx) 219 { 220 int ret; 221 struct enic *enic = pmd_priv(eth_dev); 222 223 ENICPMD_FUNC_TRACE(); 224 225 ret = enic_stop_wq(enic, queue_idx); 226 if (ret) 227 dev_err(enic, "error in stopping wq %d\n", queue_idx); 228 229 return ret; 230 } 231 232 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev, 233 uint16_t queue_idx) 234 { 235 struct enic *enic = pmd_priv(eth_dev); 236 237 ENICPMD_FUNC_TRACE(); 238 239 enic_start_rq(enic, queue_idx); 240 241 return 0; 242 } 243 244 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, 245 uint16_t queue_idx) 246 { 247 int ret; 248 struct enic *enic = pmd_priv(eth_dev); 249 250 ENICPMD_FUNC_TRACE(); 251 252 ret = enic_stop_rq(enic, queue_idx); 253 if (ret) 254 dev_err(enic, "error in stopping rq %d\n", queue_idx); 255 256 return ret; 257 } 258 259 static void enicpmd_dev_rx_queue_release(void *rxq) 260 { 261 ENICPMD_FUNC_TRACE(); 262 enic_free_rq(rxq); 263 } 264 265 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev, 266 uint16_t rx_queue_id) 267 { 268 struct enic *enic = pmd_priv(dev); 269 uint32_t queue_count = 0; 270 struct vnic_cq *cq; 271 uint32_t cq_tail; 272 uint16_t cq_idx; 273 int rq_num; 274 275 rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id); 276 cq = &enic->cq[enic_cq_rq(enic, rq_num)]; 277 cq_idx = cq->to_clean; 278 279 cq_tail = ioread32(&cq->ctrl->cq_tail); 280 281 if (cq_tail < cq_idx) 282 cq_tail += cq->ring.desc_count; 283 284 queue_count = cq_tail - cq_idx; 285 286 return queue_count; 287 } 288 289 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, 290 uint16_t queue_idx, 291 uint16_t nb_desc, 292 unsigned int socket_id, 293 const struct rte_eth_rxconf *rx_conf, 294 struct rte_mempool *mp) 295 { 296 int ret; 297 struct enic *enic = pmd_priv(eth_dev); 298 299 ENICPMD_FUNC_TRACE(); 300 /* With Rx scatter support, two RQs are now used on VIC per RQ used 301 * by the application. 302 */ 303 if (queue_idx * 2 >= ENIC_RQ_MAX) { 304 dev_err(enic, 305 "Max number of RX queues exceeded. Max is %d. This PMD uses 2 RQs on VIC per RQ used by DPDK.\n", 306 ENIC_RQ_MAX); 307 return -EINVAL; 308 } 309 310 eth_dev->data->rx_queues[queue_idx] = 311 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 312 313 ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc, 314 rx_conf->rx_free_thresh); 315 if (ret) { 316 dev_err(enic, "error in allocating rq\n"); 317 return ret; 318 } 319 320 return enicpmd_dev_setup_intr(enic); 321 } 322 323 static int enicpmd_vlan_filter_set(struct rte_eth_dev *eth_dev, 324 uint16_t vlan_id, int on) 325 { 326 struct enic *enic = pmd_priv(eth_dev); 327 int err; 328 329 ENICPMD_FUNC_TRACE(); 330 if (on) 331 err = enic_add_vlan(enic, vlan_id); 332 else 333 err = enic_del_vlan(enic, vlan_id); 334 return err; 335 } 336 337 static void enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask) 338 { 339 struct enic *enic = pmd_priv(eth_dev); 340 341 ENICPMD_FUNC_TRACE(); 342 343 if (mask & ETH_VLAN_STRIP_MASK) { 344 if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip) 345 enic->ig_vlan_strip_en = 1; 346 else 347 enic->ig_vlan_strip_en = 0; 348 } 349 enic_set_rss_nic_cfg(enic); 350 351 352 if (mask & ETH_VLAN_FILTER_MASK) { 353 dev_warning(enic, 354 "Configuration of VLAN filter is not supported\n"); 355 } 356 357 if (mask & ETH_VLAN_EXTEND_MASK) { 358 dev_warning(enic, 359 "Configuration of extended VLAN is not supported\n"); 360 } 361 } 362 363 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev) 364 { 365 int ret; 366 struct enic *enic = pmd_priv(eth_dev); 367 368 ENICPMD_FUNC_TRACE(); 369 ret = enic_set_vnic_res(enic); 370 if (ret) { 371 dev_err(enic, "Set vNIC resource num failed, aborting\n"); 372 return ret; 373 } 374 375 if (eth_dev->data->dev_conf.rxmode.split_hdr_size && 376 eth_dev->data->dev_conf.rxmode.header_split) { 377 /* Enable header-data-split */ 378 enic_set_hdr_split_size(enic, 379 eth_dev->data->dev_conf.rxmode.split_hdr_size); 380 } 381 382 enicpmd_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK); 383 enic->hw_ip_checksum = eth_dev->data->dev_conf.rxmode.hw_ip_checksum; 384 return 0; 385 } 386 387 /* Start the device. 388 * It returns 0 on success. 389 */ 390 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev) 391 { 392 struct enic *enic = pmd_priv(eth_dev); 393 394 ENICPMD_FUNC_TRACE(); 395 return enic_enable(enic); 396 } 397 398 /* 399 * Stop device: disable rx and tx functions to allow for reconfiguring. 400 */ 401 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev) 402 { 403 struct rte_eth_link link; 404 struct enic *enic = pmd_priv(eth_dev); 405 406 ENICPMD_FUNC_TRACE(); 407 enic_disable(enic); 408 memset(&link, 0, sizeof(link)); 409 rte_atomic64_cmpset((uint64_t *)ð_dev->data->dev_link, 410 *(uint64_t *)ð_dev->data->dev_link, 411 *(uint64_t *)&link); 412 } 413 414 /* 415 * Stop device. 416 */ 417 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev) 418 { 419 struct enic *enic = pmd_priv(eth_dev); 420 421 ENICPMD_FUNC_TRACE(); 422 enic_remove(enic); 423 } 424 425 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev, 426 __rte_unused int wait_to_complete) 427 { 428 struct enic *enic = pmd_priv(eth_dev); 429 430 ENICPMD_FUNC_TRACE(); 431 return enic_link_update(enic); 432 } 433 434 static void enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev, 435 struct rte_eth_stats *stats) 436 { 437 struct enic *enic = pmd_priv(eth_dev); 438 439 ENICPMD_FUNC_TRACE(); 440 enic_dev_stats_get(enic, stats); 441 } 442 443 static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev) 444 { 445 struct enic *enic = pmd_priv(eth_dev); 446 447 ENICPMD_FUNC_TRACE(); 448 enic_dev_stats_clear(enic); 449 } 450 451 static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, 452 struct rte_eth_dev_info *device_info) 453 { 454 struct enic *enic = pmd_priv(eth_dev); 455 456 ENICPMD_FUNC_TRACE(); 457 device_info->pci_dev = RTE_DEV_TO_PCI(eth_dev->device); 458 /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */ 459 device_info->max_rx_queues = enic->conf_rq_count / 2; 460 device_info->max_tx_queues = enic->conf_wq_count; 461 device_info->min_rx_bufsize = ENIC_MIN_MTU; 462 device_info->max_rx_pktlen = enic->max_mtu + ETHER_HDR_LEN + 4; 463 device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR; 464 device_info->rx_offload_capa = 465 DEV_RX_OFFLOAD_VLAN_STRIP | 466 DEV_RX_OFFLOAD_IPV4_CKSUM | 467 DEV_RX_OFFLOAD_UDP_CKSUM | 468 DEV_RX_OFFLOAD_TCP_CKSUM; 469 device_info->tx_offload_capa = 470 DEV_TX_OFFLOAD_VLAN_INSERT | 471 DEV_TX_OFFLOAD_IPV4_CKSUM | 472 DEV_TX_OFFLOAD_UDP_CKSUM | 473 DEV_TX_OFFLOAD_TCP_CKSUM | 474 DEV_TX_OFFLOAD_TCP_TSO; 475 device_info->default_rxconf = (struct rte_eth_rxconf) { 476 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH 477 }; 478 } 479 480 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) 481 { 482 static const uint32_t ptypes[] = { 483 RTE_PTYPE_L2_ETHER, 484 RTE_PTYPE_L2_ETHER_VLAN, 485 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 486 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 487 RTE_PTYPE_L4_TCP, 488 RTE_PTYPE_L4_UDP, 489 RTE_PTYPE_L4_FRAG, 490 RTE_PTYPE_L4_NONFRAG, 491 RTE_PTYPE_UNKNOWN 492 }; 493 494 if (dev->rx_pkt_burst == enic_recv_pkts) 495 return ptypes; 496 return NULL; 497 } 498 499 static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev) 500 { 501 struct enic *enic = pmd_priv(eth_dev); 502 503 ENICPMD_FUNC_TRACE(); 504 enic->promisc = 1; 505 enic_add_packet_filter(enic); 506 } 507 508 static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev) 509 { 510 struct enic *enic = pmd_priv(eth_dev); 511 512 ENICPMD_FUNC_TRACE(); 513 enic->promisc = 0; 514 enic_add_packet_filter(enic); 515 } 516 517 static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev) 518 { 519 struct enic *enic = pmd_priv(eth_dev); 520 521 ENICPMD_FUNC_TRACE(); 522 enic->allmulti = 1; 523 enic_add_packet_filter(enic); 524 } 525 526 static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev) 527 { 528 struct enic *enic = pmd_priv(eth_dev); 529 530 ENICPMD_FUNC_TRACE(); 531 enic->allmulti = 0; 532 enic_add_packet_filter(enic); 533 } 534 535 static void enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev, 536 struct ether_addr *mac_addr, 537 __rte_unused uint32_t index, __rte_unused uint32_t pool) 538 { 539 struct enic *enic = pmd_priv(eth_dev); 540 541 ENICPMD_FUNC_TRACE(); 542 enic_set_mac_address(enic, mac_addr->addr_bytes); 543 } 544 545 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index) 546 { 547 struct enic *enic = pmd_priv(eth_dev); 548 549 ENICPMD_FUNC_TRACE(); 550 enic_del_mac_address(enic, index); 551 } 552 553 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 554 { 555 struct enic *enic = pmd_priv(eth_dev); 556 557 ENICPMD_FUNC_TRACE(); 558 return enic_set_mtu(enic, mtu); 559 } 560 561 static const struct eth_dev_ops enicpmd_eth_dev_ops = { 562 .dev_configure = enicpmd_dev_configure, 563 .dev_start = enicpmd_dev_start, 564 .dev_stop = enicpmd_dev_stop, 565 .dev_set_link_up = NULL, 566 .dev_set_link_down = NULL, 567 .dev_close = enicpmd_dev_close, 568 .promiscuous_enable = enicpmd_dev_promiscuous_enable, 569 .promiscuous_disable = enicpmd_dev_promiscuous_disable, 570 .allmulticast_enable = enicpmd_dev_allmulticast_enable, 571 .allmulticast_disable = enicpmd_dev_allmulticast_disable, 572 .link_update = enicpmd_dev_link_update, 573 .stats_get = enicpmd_dev_stats_get, 574 .stats_reset = enicpmd_dev_stats_reset, 575 .queue_stats_mapping_set = NULL, 576 .dev_infos_get = enicpmd_dev_info_get, 577 .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get, 578 .mtu_set = enicpmd_mtu_set, 579 .vlan_filter_set = enicpmd_vlan_filter_set, 580 .vlan_tpid_set = NULL, 581 .vlan_offload_set = enicpmd_vlan_offload_set, 582 .vlan_strip_queue_set = NULL, 583 .rx_queue_start = enicpmd_dev_rx_queue_start, 584 .rx_queue_stop = enicpmd_dev_rx_queue_stop, 585 .tx_queue_start = enicpmd_dev_tx_queue_start, 586 .tx_queue_stop = enicpmd_dev_tx_queue_stop, 587 .rx_queue_setup = enicpmd_dev_rx_queue_setup, 588 .rx_queue_release = enicpmd_dev_rx_queue_release, 589 .rx_queue_count = enicpmd_dev_rx_queue_count, 590 .rx_descriptor_done = NULL, 591 .tx_queue_setup = enicpmd_dev_tx_queue_setup, 592 .tx_queue_release = enicpmd_dev_tx_queue_release, 593 .dev_led_on = NULL, 594 .dev_led_off = NULL, 595 .flow_ctrl_get = NULL, 596 .flow_ctrl_set = NULL, 597 .priority_flow_ctrl_set = NULL, 598 .mac_addr_add = enicpmd_add_mac_addr, 599 .mac_addr_remove = enicpmd_remove_mac_addr, 600 .filter_ctrl = enicpmd_dev_filter_ctrl, 601 }; 602 603 struct enic *enicpmd_list_head = NULL; 604 /* Initialize the driver 605 * It returns 0 on success. 606 */ 607 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev) 608 { 609 struct rte_pci_device *pdev; 610 struct rte_pci_addr *addr; 611 struct enic *enic = pmd_priv(eth_dev); 612 613 ENICPMD_FUNC_TRACE(); 614 615 enic->port_id = eth_dev->data->port_id; 616 enic->rte_dev = eth_dev; 617 eth_dev->dev_ops = &enicpmd_eth_dev_ops; 618 eth_dev->rx_pkt_burst = &enic_recv_pkts; 619 eth_dev->tx_pkt_burst = &enic_xmit_pkts; 620 621 pdev = RTE_DEV_TO_PCI(eth_dev->device); 622 rte_eth_copy_pci_info(eth_dev, pdev); 623 enic->pdev = pdev; 624 addr = &pdev->addr; 625 626 snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x", 627 addr->domain, addr->bus, addr->devid, addr->function); 628 629 return enic_probe(enic); 630 } 631 632 static struct eth_driver rte_enic_pmd = { 633 .pci_drv = { 634 .id_table = pci_id_enic_map, 635 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 636 .probe = rte_eth_dev_pci_probe, 637 .remove = rte_eth_dev_pci_remove, 638 }, 639 .eth_dev_init = eth_enicpmd_dev_init, 640 .dev_private_size = sizeof(struct enic), 641 }; 642 643 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd.pci_drv); 644 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map); 645 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio"); 646