172f3de30SBruce Richardson /* 272f3de30SBruce Richardson * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved. 372f3de30SBruce Richardson * Copyright 2007 Nuova Systems, Inc. All rights reserved. 472f3de30SBruce Richardson * 572f3de30SBruce Richardson * Copyright (c) 2014, Cisco Systems, Inc. 672f3de30SBruce Richardson * All rights reserved. 772f3de30SBruce Richardson * 872f3de30SBruce Richardson * Redistribution and use in source and binary forms, with or without 972f3de30SBruce Richardson * modification, are permitted provided that the following conditions 1072f3de30SBruce Richardson * are met: 1172f3de30SBruce Richardson * 1272f3de30SBruce Richardson * 1. Redistributions of source code must retain the above copyright 1372f3de30SBruce Richardson * notice, this list of conditions and the following disclaimer. 1472f3de30SBruce Richardson * 1572f3de30SBruce Richardson * 2. Redistributions in binary form must reproduce the above copyright 1672f3de30SBruce Richardson * notice, this list of conditions and the following disclaimer in 1772f3de30SBruce Richardson * the documentation and/or other materials provided with the 1872f3de30SBruce Richardson * distribution. 1972f3de30SBruce Richardson * 2072f3de30SBruce Richardson * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2172f3de30SBruce Richardson * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2272f3de30SBruce Richardson * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 2372f3de30SBruce Richardson * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 2472f3de30SBruce Richardson * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 2572f3de30SBruce Richardson * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 2672f3de30SBruce Richardson * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 2772f3de30SBruce Richardson * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 2872f3de30SBruce Richardson * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2972f3de30SBruce Richardson * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 3072f3de30SBruce Richardson * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3172f3de30SBruce Richardson * POSSIBILITY OF SUCH DAMAGE. 3272f3de30SBruce Richardson * 3372f3de30SBruce Richardson */ 3472f3de30SBruce Richardson 3572f3de30SBruce Richardson #include <stdio.h> 3672f3de30SBruce Richardson #include <stdint.h> 3772f3de30SBruce Richardson 3872f3de30SBruce Richardson #include <rte_dev.h> 3972f3de30SBruce Richardson #include <rte_pci.h> 4072f3de30SBruce Richardson #include <rte_ethdev.h> 4172f3de30SBruce Richardson #include <rte_string_fns.h> 4272f3de30SBruce Richardson 4372f3de30SBruce Richardson #include "vnic_intr.h" 4472f3de30SBruce Richardson #include "vnic_cq.h" 4572f3de30SBruce Richardson #include "vnic_wq.h" 4672f3de30SBruce Richardson #include "vnic_rq.h" 4772f3de30SBruce Richardson #include "vnic_enet.h" 4872f3de30SBruce Richardson #include "enic.h" 4972f3de30SBruce Richardson 5072f3de30SBruce Richardson #ifdef RTE_LIBRTE_ENIC_DEBUG 5172f3de30SBruce Richardson #define ENICPMD_FUNC_TRACE() \ 5272f3de30SBruce Richardson RTE_LOG(DEBUG, PMD, "ENICPMD trace: %s\n", __func__) 5372f3de30SBruce Richardson #else 5472f3de30SBruce Richardson #define ENICPMD_FUNC_TRACE() (void)0 5572f3de30SBruce Richardson #endif 5672f3de30SBruce Richardson 5772f3de30SBruce Richardson /* 5872f3de30SBruce Richardson * The set of PCI devices this driver supports 5972f3de30SBruce Richardson */ 600b6fe7bdSDavid Marchand #define CISCO_PCI_VENDOR_ID 0x1137 6172f3de30SBruce Richardson static const struct rte_pci_id pci_id_enic_map[] = { 620b6fe7bdSDavid Marchand { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 630b6fe7bdSDavid Marchand { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 640b6fe7bdSDavid Marchand {.vendor_id = 0, /* sentinel */}, 6572f3de30SBruce Richardson }; 6672f3de30SBruce Richardson 6772f3de30SBruce Richardson static int 6872f3de30SBruce Richardson enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev, 6972f3de30SBruce Richardson enum rte_filter_op filter_op, void *arg) 7072f3de30SBruce Richardson { 7172f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 7272f3de30SBruce Richardson int ret = 0; 7372f3de30SBruce Richardson 7472f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 7572f3de30SBruce Richardson if (filter_op == RTE_ETH_FILTER_NOP) 7672f3de30SBruce Richardson return 0; 7772f3de30SBruce Richardson 7872f3de30SBruce Richardson if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH) 7972f3de30SBruce Richardson return -EINVAL; 8072f3de30SBruce Richardson 8172f3de30SBruce Richardson switch (filter_op) { 8272f3de30SBruce Richardson case RTE_ETH_FILTER_ADD: 8372f3de30SBruce Richardson case RTE_ETH_FILTER_UPDATE: 8472f3de30SBruce Richardson ret = enic_fdir_add_fltr(enic, 8572f3de30SBruce Richardson (struct rte_eth_fdir_filter *)arg); 8672f3de30SBruce Richardson break; 8772f3de30SBruce Richardson 8872f3de30SBruce Richardson case RTE_ETH_FILTER_DELETE: 8972f3de30SBruce Richardson ret = enic_fdir_del_fltr(enic, 9072f3de30SBruce Richardson (struct rte_eth_fdir_filter *)arg); 9172f3de30SBruce Richardson break; 9272f3de30SBruce Richardson 9372f3de30SBruce Richardson case RTE_ETH_FILTER_STATS: 9472f3de30SBruce Richardson enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg); 9572f3de30SBruce Richardson break; 9672f3de30SBruce Richardson 9772f3de30SBruce Richardson case RTE_ETH_FILTER_FLUSH: 9872f3de30SBruce Richardson dev_warning(enic, "unsupported operation %u", filter_op); 9972f3de30SBruce Richardson ret = -ENOTSUP; 10072f3de30SBruce Richardson break; 101dfbd6a9cSJohn Daley case RTE_ETH_FILTER_INFO: 102dfbd6a9cSJohn Daley enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg); 103dfbd6a9cSJohn Daley break; 10472f3de30SBruce Richardson default: 10572f3de30SBruce Richardson dev_err(enic, "unknown operation %u", filter_op); 10672f3de30SBruce Richardson ret = -EINVAL; 10772f3de30SBruce Richardson break; 10872f3de30SBruce Richardson } 10972f3de30SBruce Richardson return ret; 11072f3de30SBruce Richardson } 11172f3de30SBruce Richardson 11272f3de30SBruce Richardson static int 11372f3de30SBruce Richardson enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev, 11472f3de30SBruce Richardson enum rte_filter_type filter_type, 11572f3de30SBruce Richardson enum rte_filter_op filter_op, 11672f3de30SBruce Richardson void *arg) 11772f3de30SBruce Richardson { 11872f3de30SBruce Richardson int ret = -EINVAL; 11972f3de30SBruce Richardson 12072f3de30SBruce Richardson if (RTE_ETH_FILTER_FDIR == filter_type) 12172f3de30SBruce Richardson ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg); 12272f3de30SBruce Richardson else 12372f3de30SBruce Richardson dev_warning(enic, "Filter type (%d) not supported", 12472f3de30SBruce Richardson filter_type); 12572f3de30SBruce Richardson 12672f3de30SBruce Richardson return ret; 12772f3de30SBruce Richardson } 12872f3de30SBruce Richardson 12972f3de30SBruce Richardson static void enicpmd_dev_tx_queue_release(void *txq) 13072f3de30SBruce Richardson { 13172f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 13272f3de30SBruce Richardson enic_free_wq(txq); 13372f3de30SBruce Richardson } 13472f3de30SBruce Richardson 13572f3de30SBruce Richardson static int enicpmd_dev_setup_intr(struct enic *enic) 13672f3de30SBruce Richardson { 13772f3de30SBruce Richardson int ret; 13872f3de30SBruce Richardson unsigned int index; 13972f3de30SBruce Richardson 14072f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 14172f3de30SBruce Richardson 14272f3de30SBruce Richardson /* Are we done with the init of all the queues? */ 14372f3de30SBruce Richardson for (index = 0; index < enic->cq_count; index++) { 14472f3de30SBruce Richardson if (!enic->cq[index].ctrl) 14572f3de30SBruce Richardson break; 14672f3de30SBruce Richardson } 14772f3de30SBruce Richardson if (enic->cq_count != index) 14872f3de30SBruce Richardson return 0; 149954828b8SJohn Daley for (index = 0; index < enic->wq_count; index++) { 150954828b8SJohn Daley if (!enic->wq[index].ctrl) 151954828b8SJohn Daley break; 152954828b8SJohn Daley } 153954828b8SJohn Daley if (enic->wq_count != index) 154954828b8SJohn Daley return 0; 155954828b8SJohn Daley /* check start of packet (SOP) RQs only in case scatter is disabled. */ 156954828b8SJohn Daley for (index = 0; index < enic->rq_count; index++) { 157aa07bf8fSJohn Daley if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl) 158954828b8SJohn Daley break; 159954828b8SJohn Daley } 160954828b8SJohn Daley if (enic->rq_count != index) 161954828b8SJohn Daley return 0; 16272f3de30SBruce Richardson 16372f3de30SBruce Richardson ret = enic_alloc_intr_resources(enic); 16472f3de30SBruce Richardson if (ret) { 16572f3de30SBruce Richardson dev_err(enic, "alloc intr failed\n"); 16672f3de30SBruce Richardson return ret; 16772f3de30SBruce Richardson } 16872f3de30SBruce Richardson enic_init_vnic_resources(enic); 16972f3de30SBruce Richardson 17072f3de30SBruce Richardson ret = enic_setup_finish(enic); 17172f3de30SBruce Richardson if (ret) 17272f3de30SBruce Richardson dev_err(enic, "setup could not be finished\n"); 17372f3de30SBruce Richardson 17472f3de30SBruce Richardson return ret; 17572f3de30SBruce Richardson } 17672f3de30SBruce Richardson 17772f3de30SBruce Richardson static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, 17872f3de30SBruce Richardson uint16_t queue_idx, 17972f3de30SBruce Richardson uint16_t nb_desc, 18072f3de30SBruce Richardson unsigned int socket_id, 18172f3de30SBruce Richardson __rte_unused const struct rte_eth_txconf *tx_conf) 18272f3de30SBruce Richardson { 18372f3de30SBruce Richardson int ret; 18472f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 18572f3de30SBruce Richardson 18672f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 187ddf2da3eSNelson Escobar if (queue_idx >= ENIC_WQ_MAX) { 188ddf2da3eSNelson Escobar dev_err(enic, 189ddf2da3eSNelson Escobar "Max number of TX queues exceeded. Max is %d\n", 190ddf2da3eSNelson Escobar ENIC_WQ_MAX); 191ddf2da3eSNelson Escobar return -EINVAL; 192ddf2da3eSNelson Escobar } 193ddf2da3eSNelson Escobar 19472f3de30SBruce Richardson eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx]; 19572f3de30SBruce Richardson 19672f3de30SBruce Richardson ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc); 19772f3de30SBruce Richardson if (ret) { 19872f3de30SBruce Richardson dev_err(enic, "error in allocating wq\n"); 19972f3de30SBruce Richardson return ret; 20072f3de30SBruce Richardson } 20172f3de30SBruce Richardson 20272f3de30SBruce Richardson return enicpmd_dev_setup_intr(enic); 20372f3de30SBruce Richardson } 20472f3de30SBruce Richardson 20572f3de30SBruce Richardson static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev, 20672f3de30SBruce Richardson uint16_t queue_idx) 20772f3de30SBruce Richardson { 20872f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 20972f3de30SBruce Richardson 21072f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 21172f3de30SBruce Richardson 21272f3de30SBruce Richardson enic_start_wq(enic, queue_idx); 21372f3de30SBruce Richardson 21472f3de30SBruce Richardson return 0; 21572f3de30SBruce Richardson } 21672f3de30SBruce Richardson 21772f3de30SBruce Richardson static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, 21872f3de30SBruce Richardson uint16_t queue_idx) 21972f3de30SBruce Richardson { 22072f3de30SBruce Richardson int ret; 22172f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 22272f3de30SBruce Richardson 22372f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 22472f3de30SBruce Richardson 22572f3de30SBruce Richardson ret = enic_stop_wq(enic, queue_idx); 22672f3de30SBruce Richardson if (ret) 22772f3de30SBruce Richardson dev_err(enic, "error in stopping wq %d\n", queue_idx); 22872f3de30SBruce Richardson 22972f3de30SBruce Richardson return ret; 23072f3de30SBruce Richardson } 23172f3de30SBruce Richardson 23272f3de30SBruce Richardson static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev, 23372f3de30SBruce Richardson uint16_t queue_idx) 23472f3de30SBruce Richardson { 23572f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 23672f3de30SBruce Richardson 23772f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 23872f3de30SBruce Richardson 23972f3de30SBruce Richardson enic_start_rq(enic, queue_idx); 24072f3de30SBruce Richardson 24172f3de30SBruce Richardson return 0; 24272f3de30SBruce Richardson } 24372f3de30SBruce Richardson 24472f3de30SBruce Richardson static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, 24572f3de30SBruce Richardson uint16_t queue_idx) 24672f3de30SBruce Richardson { 24772f3de30SBruce Richardson int ret; 24872f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 24972f3de30SBruce Richardson 25072f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 25172f3de30SBruce Richardson 25272f3de30SBruce Richardson ret = enic_stop_rq(enic, queue_idx); 25372f3de30SBruce Richardson if (ret) 25472f3de30SBruce Richardson dev_err(enic, "error in stopping rq %d\n", queue_idx); 25572f3de30SBruce Richardson 25672f3de30SBruce Richardson return ret; 25772f3de30SBruce Richardson } 25872f3de30SBruce Richardson 25972f3de30SBruce Richardson static void enicpmd_dev_rx_queue_release(void *rxq) 26072f3de30SBruce Richardson { 26172f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 26272f3de30SBruce Richardson enic_free_rq(rxq); 26372f3de30SBruce Richardson } 26472f3de30SBruce Richardson 265a787f7e6SNelson Escobar static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev, 266a787f7e6SNelson Escobar uint16_t rx_queue_id) 267a787f7e6SNelson Escobar { 268a787f7e6SNelson Escobar struct enic *enic = pmd_priv(dev); 269a787f7e6SNelson Escobar uint32_t queue_count = 0; 270a787f7e6SNelson Escobar struct vnic_cq *cq; 271a787f7e6SNelson Escobar uint32_t cq_tail; 272a787f7e6SNelson Escobar uint16_t cq_idx; 273a787f7e6SNelson Escobar int rq_num; 274a787f7e6SNelson Escobar 275a787f7e6SNelson Escobar if (rx_queue_id >= dev->data->nb_rx_queues) { 276a787f7e6SNelson Escobar dev_err(enic, "Invalid RX queue id=%d", rx_queue_id); 277a787f7e6SNelson Escobar return 0; 278a787f7e6SNelson Escobar } 279a787f7e6SNelson Escobar 280aa07bf8fSJohn Daley rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id); 281a787f7e6SNelson Escobar cq = &enic->cq[enic_cq_rq(enic, rq_num)]; 282a787f7e6SNelson Escobar cq_idx = cq->to_clean; 283a787f7e6SNelson Escobar 284a787f7e6SNelson Escobar cq_tail = ioread32(&cq->ctrl->cq_tail); 285a787f7e6SNelson Escobar 286a787f7e6SNelson Escobar if (cq_tail < cq_idx) 287a787f7e6SNelson Escobar cq_tail += cq->ring.desc_count; 288a787f7e6SNelson Escobar 289a787f7e6SNelson Escobar queue_count = cq_tail - cq_idx; 290a787f7e6SNelson Escobar 291a787f7e6SNelson Escobar return queue_count; 292a787f7e6SNelson Escobar } 293a787f7e6SNelson Escobar 29472f3de30SBruce Richardson static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, 29572f3de30SBruce Richardson uint16_t queue_idx, 29672f3de30SBruce Richardson uint16_t nb_desc, 29772f3de30SBruce Richardson unsigned int socket_id, 298947d860cSJohn Daley const struct rte_eth_rxconf *rx_conf, 29972f3de30SBruce Richardson struct rte_mempool *mp) 30072f3de30SBruce Richardson { 30172f3de30SBruce Richardson int ret; 30272f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 30372f3de30SBruce Richardson 30472f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 305856d7ba7SNelson Escobar /* With Rx scatter support, two RQs are now used on VIC per RQ used 306856d7ba7SNelson Escobar * by the application. 307856d7ba7SNelson Escobar */ 308856d7ba7SNelson Escobar if (queue_idx * 2 >= ENIC_RQ_MAX) { 309ddf2da3eSNelson Escobar dev_err(enic, 310856d7ba7SNelson Escobar "Max number of RX queues exceeded. Max is %d. This PMD uses 2 RQs on VIC per RQ used by DPDK.\n", 311ddf2da3eSNelson Escobar ENIC_RQ_MAX); 312ddf2da3eSNelson Escobar return -EINVAL; 313ddf2da3eSNelson Escobar } 314ddf2da3eSNelson Escobar 315856d7ba7SNelson Escobar eth_dev->data->rx_queues[queue_idx] = 316aa07bf8fSJohn Daley (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 31772f3de30SBruce Richardson 318ce16fd70SJohn Daley ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc, 319ce16fd70SJohn Daley rx_conf->rx_free_thresh); 32072f3de30SBruce Richardson if (ret) { 32172f3de30SBruce Richardson dev_err(enic, "error in allocating rq\n"); 32272f3de30SBruce Richardson return ret; 32372f3de30SBruce Richardson } 32472f3de30SBruce Richardson 32572f3de30SBruce Richardson return enicpmd_dev_setup_intr(enic); 32672f3de30SBruce Richardson } 32772f3de30SBruce Richardson 32872f3de30SBruce Richardson static int enicpmd_vlan_filter_set(struct rte_eth_dev *eth_dev, 32972f3de30SBruce Richardson uint16_t vlan_id, int on) 33072f3de30SBruce Richardson { 33172f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 3324d4a76a6SJulien Meunier int err; 33372f3de30SBruce Richardson 33472f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 33572f3de30SBruce Richardson if (on) 3364d4a76a6SJulien Meunier err = enic_add_vlan(enic, vlan_id); 33772f3de30SBruce Richardson else 3384d4a76a6SJulien Meunier err = enic_del_vlan(enic, vlan_id); 3394d4a76a6SJulien Meunier return err; 34072f3de30SBruce Richardson } 34172f3de30SBruce Richardson 34272f3de30SBruce Richardson static void enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask) 34372f3de30SBruce Richardson { 34472f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 34572f3de30SBruce Richardson 34672f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 34772f3de30SBruce Richardson 34872f3de30SBruce Richardson if (mask & ETH_VLAN_STRIP_MASK) { 34972f3de30SBruce Richardson if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip) 35072f3de30SBruce Richardson enic->ig_vlan_strip_en = 1; 35172f3de30SBruce Richardson else 35272f3de30SBruce Richardson enic->ig_vlan_strip_en = 0; 35372f3de30SBruce Richardson } 35472f3de30SBruce Richardson enic_set_rss_nic_cfg(enic); 35572f3de30SBruce Richardson 35672f3de30SBruce Richardson 35772f3de30SBruce Richardson if (mask & ETH_VLAN_FILTER_MASK) { 35872f3de30SBruce Richardson dev_warning(enic, 35972f3de30SBruce Richardson "Configuration of VLAN filter is not supported\n"); 36072f3de30SBruce Richardson } 36172f3de30SBruce Richardson 36272f3de30SBruce Richardson if (mask & ETH_VLAN_EXTEND_MASK) { 36372f3de30SBruce Richardson dev_warning(enic, 36472f3de30SBruce Richardson "Configuration of extended VLAN is not supported\n"); 36572f3de30SBruce Richardson } 36672f3de30SBruce Richardson } 36772f3de30SBruce Richardson 36872f3de30SBruce Richardson static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev) 36972f3de30SBruce Richardson { 37072f3de30SBruce Richardson int ret; 37172f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 37272f3de30SBruce Richardson 37372f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 37472f3de30SBruce Richardson ret = enic_set_vnic_res(enic); 37572f3de30SBruce Richardson if (ret) { 37672f3de30SBruce Richardson dev_err(enic, "Set vNIC resource num failed, aborting\n"); 37772f3de30SBruce Richardson return ret; 37872f3de30SBruce Richardson } 37972f3de30SBruce Richardson 38072f3de30SBruce Richardson if (eth_dev->data->dev_conf.rxmode.split_hdr_size && 38172f3de30SBruce Richardson eth_dev->data->dev_conf.rxmode.header_split) { 38272f3de30SBruce Richardson /* Enable header-data-split */ 38372f3de30SBruce Richardson enic_set_hdr_split_size(enic, 38472f3de30SBruce Richardson eth_dev->data->dev_conf.rxmode.split_hdr_size); 38572f3de30SBruce Richardson } 38672f3de30SBruce Richardson 387892741d2SJohn Daley enicpmd_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK); 38872f3de30SBruce Richardson enic->hw_ip_checksum = eth_dev->data->dev_conf.rxmode.hw_ip_checksum; 38972f3de30SBruce Richardson return 0; 39072f3de30SBruce Richardson } 39172f3de30SBruce Richardson 39272f3de30SBruce Richardson /* Start the device. 39372f3de30SBruce Richardson * It returns 0 on success. 39472f3de30SBruce Richardson */ 39572f3de30SBruce Richardson static int enicpmd_dev_start(struct rte_eth_dev *eth_dev) 39672f3de30SBruce Richardson { 39772f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 39872f3de30SBruce Richardson 39972f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 40072f3de30SBruce Richardson return enic_enable(enic); 40172f3de30SBruce Richardson } 40272f3de30SBruce Richardson 40372f3de30SBruce Richardson /* 40472f3de30SBruce Richardson * Stop device: disable rx and tx functions to allow for reconfiguring. 40572f3de30SBruce Richardson */ 40672f3de30SBruce Richardson static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev) 40772f3de30SBruce Richardson { 40872f3de30SBruce Richardson struct rte_eth_link link; 40972f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 41072f3de30SBruce Richardson 41172f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 41272f3de30SBruce Richardson enic_disable(enic); 41372f3de30SBruce Richardson memset(&link, 0, sizeof(link)); 41472f3de30SBruce Richardson rte_atomic64_cmpset((uint64_t *)ð_dev->data->dev_link, 41572f3de30SBruce Richardson *(uint64_t *)ð_dev->data->dev_link, 41672f3de30SBruce Richardson *(uint64_t *)&link); 41772f3de30SBruce Richardson } 41872f3de30SBruce Richardson 41972f3de30SBruce Richardson /* 42072f3de30SBruce Richardson * Stop device. 42172f3de30SBruce Richardson */ 42272f3de30SBruce Richardson static void enicpmd_dev_close(struct rte_eth_dev *eth_dev) 42372f3de30SBruce Richardson { 42472f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 42572f3de30SBruce Richardson 42672f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 42772f3de30SBruce Richardson enic_remove(enic); 42872f3de30SBruce Richardson } 42972f3de30SBruce Richardson 43072f3de30SBruce Richardson static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev, 43172f3de30SBruce Richardson __rte_unused int wait_to_complete) 43272f3de30SBruce Richardson { 43372f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 43472f3de30SBruce Richardson 43572f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 436cf8d9826SNelson Escobar return enic_link_update(enic); 43772f3de30SBruce Richardson } 43872f3de30SBruce Richardson 43972f3de30SBruce Richardson static void enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev, 44072f3de30SBruce Richardson struct rte_eth_stats *stats) 44172f3de30SBruce Richardson { 44272f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 44372f3de30SBruce Richardson 44472f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 44572f3de30SBruce Richardson enic_dev_stats_get(enic, stats); 44672f3de30SBruce Richardson } 44772f3de30SBruce Richardson 44872f3de30SBruce Richardson static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev) 44972f3de30SBruce Richardson { 45072f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 45172f3de30SBruce Richardson 45272f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 45372f3de30SBruce Richardson enic_dev_stats_clear(enic); 45472f3de30SBruce Richardson } 45572f3de30SBruce Richardson 45672f3de30SBruce Richardson static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, 45772f3de30SBruce Richardson struct rte_eth_dev_info *device_info) 45872f3de30SBruce Richardson { 45972f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 46072f3de30SBruce Richardson 46172f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 462ce93d3c3SNelson Escobar /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */ 463ce93d3c3SNelson Escobar device_info->max_rx_queues = enic->conf_rq_count / 2; 464ce93d3c3SNelson Escobar device_info->max_tx_queues = enic->conf_wq_count; 46572f3de30SBruce Richardson device_info->min_rx_bufsize = ENIC_MIN_MTU; 466f201fd05SJohn Daley device_info->max_rx_pktlen = enic->max_mtu + ETHER_HDR_LEN + 4; 46772f3de30SBruce Richardson device_info->max_mac_addrs = 1; 46872f3de30SBruce Richardson device_info->rx_offload_capa = 46972f3de30SBruce Richardson DEV_RX_OFFLOAD_VLAN_STRIP | 47072f3de30SBruce Richardson DEV_RX_OFFLOAD_IPV4_CKSUM | 47172f3de30SBruce Richardson DEV_RX_OFFLOAD_UDP_CKSUM | 47272f3de30SBruce Richardson DEV_RX_OFFLOAD_TCP_CKSUM; 47372f3de30SBruce Richardson device_info->tx_offload_capa = 47472f3de30SBruce Richardson DEV_TX_OFFLOAD_VLAN_INSERT | 47572f3de30SBruce Richardson DEV_TX_OFFLOAD_IPV4_CKSUM | 47672f3de30SBruce Richardson DEV_TX_OFFLOAD_UDP_CKSUM | 47772f3de30SBruce Richardson DEV_TX_OFFLOAD_TCP_CKSUM; 478947d860cSJohn Daley device_info->default_rxconf = (struct rte_eth_rxconf) { 479947d860cSJohn Daley .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH 480947d860cSJohn Daley }; 48172f3de30SBruce Richardson } 48272f3de30SBruce Richardson 48378a38edfSJianfeng Tan static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) 48478a38edfSJianfeng Tan { 48578a38edfSJianfeng Tan static const uint32_t ptypes[] = { 486c6f45550SJohn Daley RTE_PTYPE_L2_ETHER, 487c6f45550SJohn Daley RTE_PTYPE_L2_ETHER_VLAN, 488097e1f1eSNelson Escobar RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 489097e1f1eSNelson Escobar RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 490097e1f1eSNelson Escobar RTE_PTYPE_L4_TCP, 491097e1f1eSNelson Escobar RTE_PTYPE_L4_UDP, 492097e1f1eSNelson Escobar RTE_PTYPE_L4_FRAG, 493097e1f1eSNelson Escobar RTE_PTYPE_L4_NONFRAG, 49478a38edfSJianfeng Tan RTE_PTYPE_UNKNOWN 49578a38edfSJianfeng Tan }; 49678a38edfSJianfeng Tan 49778a38edfSJianfeng Tan if (dev->rx_pkt_burst == enic_recv_pkts) 49878a38edfSJianfeng Tan return ptypes; 49978a38edfSJianfeng Tan return NULL; 50078a38edfSJianfeng Tan } 50178a38edfSJianfeng Tan 50272f3de30SBruce Richardson static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev) 50372f3de30SBruce Richardson { 50472f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 50572f3de30SBruce Richardson 50672f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 50772f3de30SBruce Richardson enic->promisc = 1; 50872f3de30SBruce Richardson enic_add_packet_filter(enic); 50972f3de30SBruce Richardson } 51072f3de30SBruce Richardson 51172f3de30SBruce Richardson static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev) 51272f3de30SBruce Richardson { 51372f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 51472f3de30SBruce Richardson 51572f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 51672f3de30SBruce Richardson enic->promisc = 0; 51772f3de30SBruce Richardson enic_add_packet_filter(enic); 51872f3de30SBruce Richardson } 51972f3de30SBruce Richardson 52072f3de30SBruce Richardson static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev) 52172f3de30SBruce Richardson { 52272f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 52372f3de30SBruce Richardson 52472f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 52572f3de30SBruce Richardson enic->allmulti = 1; 52672f3de30SBruce Richardson enic_add_packet_filter(enic); 52772f3de30SBruce Richardson } 52872f3de30SBruce Richardson 52972f3de30SBruce Richardson static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev) 53072f3de30SBruce Richardson { 53172f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 53272f3de30SBruce Richardson 53372f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 53472f3de30SBruce Richardson enic->allmulti = 0; 53572f3de30SBruce Richardson enic_add_packet_filter(enic); 53672f3de30SBruce Richardson } 53772f3de30SBruce Richardson 53872f3de30SBruce Richardson static void enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev, 53972f3de30SBruce Richardson struct ether_addr *mac_addr, 54072f3de30SBruce Richardson __rte_unused uint32_t index, __rte_unused uint32_t pool) 54172f3de30SBruce Richardson { 54272f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 54372f3de30SBruce Richardson 54472f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 54572f3de30SBruce Richardson enic_set_mac_address(enic, mac_addr->addr_bytes); 54672f3de30SBruce Richardson } 54772f3de30SBruce Richardson 54872f3de30SBruce Richardson static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, __rte_unused uint32_t index) 54972f3de30SBruce Richardson { 55072f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 55172f3de30SBruce Richardson 55272f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 55372f3de30SBruce Richardson enic_del_mac_address(enic); 55472f3de30SBruce Richardson } 55572f3de30SBruce Richardson 556396a6d71SJohn Daley static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 557396a6d71SJohn Daley { 558396a6d71SJohn Daley struct enic *enic = pmd_priv(eth_dev); 559396a6d71SJohn Daley 560396a6d71SJohn Daley ENICPMD_FUNC_TRACE(); 561396a6d71SJohn Daley return enic_set_mtu(enic, mtu); 562396a6d71SJohn Daley } 563396a6d71SJohn Daley 56472f3de30SBruce Richardson static const struct eth_dev_ops enicpmd_eth_dev_ops = { 56572f3de30SBruce Richardson .dev_configure = enicpmd_dev_configure, 56672f3de30SBruce Richardson .dev_start = enicpmd_dev_start, 56772f3de30SBruce Richardson .dev_stop = enicpmd_dev_stop, 56872f3de30SBruce Richardson .dev_set_link_up = NULL, 56972f3de30SBruce Richardson .dev_set_link_down = NULL, 57072f3de30SBruce Richardson .dev_close = enicpmd_dev_close, 57172f3de30SBruce Richardson .promiscuous_enable = enicpmd_dev_promiscuous_enable, 57272f3de30SBruce Richardson .promiscuous_disable = enicpmd_dev_promiscuous_disable, 57372f3de30SBruce Richardson .allmulticast_enable = enicpmd_dev_allmulticast_enable, 57472f3de30SBruce Richardson .allmulticast_disable = enicpmd_dev_allmulticast_disable, 57572f3de30SBruce Richardson .link_update = enicpmd_dev_link_update, 57672f3de30SBruce Richardson .stats_get = enicpmd_dev_stats_get, 57772f3de30SBruce Richardson .stats_reset = enicpmd_dev_stats_reset, 57872f3de30SBruce Richardson .queue_stats_mapping_set = NULL, 57972f3de30SBruce Richardson .dev_infos_get = enicpmd_dev_info_get, 58078a38edfSJianfeng Tan .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get, 581396a6d71SJohn Daley .mtu_set = enicpmd_mtu_set, 58272f3de30SBruce Richardson .vlan_filter_set = enicpmd_vlan_filter_set, 58372f3de30SBruce Richardson .vlan_tpid_set = NULL, 58472f3de30SBruce Richardson .vlan_offload_set = enicpmd_vlan_offload_set, 58572f3de30SBruce Richardson .vlan_strip_queue_set = NULL, 58672f3de30SBruce Richardson .rx_queue_start = enicpmd_dev_rx_queue_start, 58772f3de30SBruce Richardson .rx_queue_stop = enicpmd_dev_rx_queue_stop, 58872f3de30SBruce Richardson .tx_queue_start = enicpmd_dev_tx_queue_start, 58972f3de30SBruce Richardson .tx_queue_stop = enicpmd_dev_tx_queue_stop, 59072f3de30SBruce Richardson .rx_queue_setup = enicpmd_dev_rx_queue_setup, 59172f3de30SBruce Richardson .rx_queue_release = enicpmd_dev_rx_queue_release, 592a787f7e6SNelson Escobar .rx_queue_count = enicpmd_dev_rx_queue_count, 59372f3de30SBruce Richardson .rx_descriptor_done = NULL, 59472f3de30SBruce Richardson .tx_queue_setup = enicpmd_dev_tx_queue_setup, 59572f3de30SBruce Richardson .tx_queue_release = enicpmd_dev_tx_queue_release, 59672f3de30SBruce Richardson .dev_led_on = NULL, 59772f3de30SBruce Richardson .dev_led_off = NULL, 59872f3de30SBruce Richardson .flow_ctrl_get = NULL, 59972f3de30SBruce Richardson .flow_ctrl_set = NULL, 60072f3de30SBruce Richardson .priority_flow_ctrl_set = NULL, 60172f3de30SBruce Richardson .mac_addr_add = enicpmd_add_mac_addr, 60272f3de30SBruce Richardson .mac_addr_remove = enicpmd_remove_mac_addr, 60372f3de30SBruce Richardson .filter_ctrl = enicpmd_dev_filter_ctrl, 60472f3de30SBruce Richardson }; 60572f3de30SBruce Richardson 60672f3de30SBruce Richardson struct enic *enicpmd_list_head = NULL; 60772f3de30SBruce Richardson /* Initialize the driver 60872f3de30SBruce Richardson * It returns 0 on success. 60972f3de30SBruce Richardson */ 61072f3de30SBruce Richardson static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev) 61172f3de30SBruce Richardson { 61272f3de30SBruce Richardson struct rte_pci_device *pdev; 61372f3de30SBruce Richardson struct rte_pci_addr *addr; 61472f3de30SBruce Richardson struct enic *enic = pmd_priv(eth_dev); 61572f3de30SBruce Richardson 61672f3de30SBruce Richardson ENICPMD_FUNC_TRACE(); 61772f3de30SBruce Richardson 61872f3de30SBruce Richardson enic->port_id = eth_dev->data->port_id; 61972f3de30SBruce Richardson enic->rte_dev = eth_dev; 62072f3de30SBruce Richardson eth_dev->dev_ops = &enicpmd_eth_dev_ops; 621947d860cSJohn Daley eth_dev->rx_pkt_burst = &enic_recv_pkts; 622d309bdc2SJohn Daley eth_dev->tx_pkt_burst = &enic_xmit_pkts; 62372f3de30SBruce Richardson 62472f3de30SBruce Richardson pdev = eth_dev->pci_dev; 625eeefe73fSBernard Iremonger rte_eth_copy_pci_info(eth_dev, pdev); 62672f3de30SBruce Richardson enic->pdev = pdev; 62772f3de30SBruce Richardson addr = &pdev->addr; 62872f3de30SBruce Richardson 62972f3de30SBruce Richardson snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x", 63072f3de30SBruce Richardson addr->domain, addr->bus, addr->devid, addr->function); 63172f3de30SBruce Richardson 63272f3de30SBruce Richardson return enic_probe(enic); 63372f3de30SBruce Richardson } 63472f3de30SBruce Richardson 63572f3de30SBruce Richardson static struct eth_driver rte_enic_pmd = { 6366c52c126SStephen Hemminger .pci_drv = { 63772f3de30SBruce Richardson .id_table = pci_id_enic_map, 63853fa8cc0SNelson Escobar .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 639c830cb29SDavid Marchand .probe = rte_eth_dev_pci_probe, 640c830cb29SDavid Marchand .remove = rte_eth_dev_pci_remove, 64172f3de30SBruce Richardson }, 64272f3de30SBruce Richardson .eth_dev_init = eth_enicpmd_dev_init, 64372f3de30SBruce Richardson .dev_private_size = sizeof(struct enic), 64472f3de30SBruce Richardson }; 64572f3de30SBruce Richardson 64601f19227SShreyansh Jain RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd.pci_drv); 64701f19227SShreyansh Jain RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map); 648*0880c401SOlivier Matz RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio"); 649