xref: /dpdk/drivers/net/enic/base/cq_enet_desc.h (revision 22572e84fbda2c195707ffbb0dd6af4433d7a219)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  */
5 
6 #ifndef _CQ_ENET_DESC_H_
7 #define _CQ_ENET_DESC_H_
8 
9 #include <rte_byteorder.h>
10 #include "cq_desc.h"
11 
12 /* Ethernet completion queue descriptor: 16B */
13 struct cq_enet_wq_desc {
14 	uint16_t completed_index;
15 	uint16_t q_number;
16 	uint8_t reserved[11];
17 	uint8_t type_color;
18 };
19 
cq_enet_wq_desc_enc(struct cq_enet_wq_desc * desc,uint8_t type,uint8_t color,uint16_t q_number,uint16_t completed_index)20 static inline void cq_enet_wq_desc_enc(struct cq_enet_wq_desc *desc,
21 	uint8_t type, uint8_t color, uint16_t q_number,
22 	uint16_t completed_index)
23 {
24 	cq_desc_enc((struct cq_desc *)desc, type,
25 		color, q_number, completed_index);
26 }
27 
cq_enet_wq_desc_dec(struct cq_enet_wq_desc * desc,uint8_t * type,uint8_t * color,uint16_t * q_number,uint16_t * completed_index)28 static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
29 	uint8_t *type, uint8_t *color, uint16_t *q_number,
30 	uint16_t *completed_index)
31 {
32 	cq_desc_dec((struct cq_desc *)desc, type,
33 		color, q_number, completed_index);
34 }
35 
36 /* Completion queue descriptor: Ethernet receive queue, 16B */
37 struct cq_enet_rq_desc {
38 	uint16_t completed_index_flags;
39 	uint16_t q_number_rss_type_flags;
40 	uint32_t rss_hash;
41 	uint16_t bytes_written_flags;
42 	uint16_t vlan;
43 	uint16_t checksum_fcoe;
44 	uint8_t flags;
45 	uint8_t type_color;
46 };
47 
48 /* Completion queue descriptor: Ethernet receive queue, 16B */
49 struct cq_enet_rq_clsf_desc {
50 	uint16_t completed_index_flags;
51 	uint16_t q_number_rss_type_flags;
52 	uint16_t filter_id;
53 	uint16_t lif;
54 	uint16_t bytes_written_flags;
55 	uint16_t vlan;
56 	uint16_t checksum_fcoe;
57 	uint8_t flags;
58 	uint8_t type_color;
59 };
60 
61 /* Completion queue descriptor: Ethernet receive queue, 64B */
62 struct cq_enet_rq_desc_64 {
63 	uint16_t completed_index_flags;
64 	uint16_t q_number_rss_type_flags;
65 	uint32_t rss_hash;
66 	uint16_t bytes_written_flags;
67 	uint16_t vlan;
68 	uint16_t checksum_fcoe;
69 	uint8_t flags;
70 	uint8_t fetch_idx_flags;
71 	uint8_t unused[47];
72 	uint8_t type_color;
73 };
74 
75 #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)
76 #define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)
77 #define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)
78 #define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)
79 
80 #define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4
81 #define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
82 	((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
83 #define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0
84 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1
85 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2
86 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3
87 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4
88 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5
89 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6
90 
91 #define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)
92 
93 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14
94 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
95 	((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
96 #define CQ_ENET_RQ_DESC_FETCH_IDX_BITS              2
97 #define CQ_ENET_RQ_DESC_FETCH_IDX_MASK \
98 	((1 << CQ_ENET_RQ_DESC_FETCH_IDX_BITS) - 1)
99 #define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)
100 #define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)
101 
102 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS          12
103 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK \
104 	((1 << CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS) - 1)
105 #define CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK           (0x1 << 12)
106 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS     3
107 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK \
108 	((1 << CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS) - 1)
109 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT    13
110 
111 #define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               8
112 #define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
113 	((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
114 #define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8
115 #define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
116 	((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
117 #define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8
118 
119 #define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)
120 #define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)
121 #define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)
122 #define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)
123 #define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)
124 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)
125 #define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)
126 #define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)
127 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)
128 #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)
129 
cq_enet_rq_desc_enc(struct cq_enet_rq_desc * desc,uint8_t type,uint8_t color,uint16_t q_number,uint16_t completed_index,uint8_t ingress_port,uint8_t fcoe,uint8_t eop,uint8_t sop,uint8_t rss_type,uint8_t csum_not_calc,uint32_t rss_hash,uint16_t bytes_written,uint8_t packet_error,uint8_t vlan_stripped,uint16_t vlan,uint16_t checksum,uint8_t fcoe_sof,uint8_t fcoe_fc_crc_ok,uint8_t fcoe_enc_error,uint8_t fcoe_eof,uint8_t tcp_udp_csum_ok,uint8_t udp,uint8_t tcp,uint8_t ipv4_csum_ok,uint8_t ipv6,uint8_t ipv4,uint8_t ipv4_fragment,uint8_t fcs_ok)130 static inline void cq_enet_rq_desc_enc(struct cq_enet_rq_desc *desc,
131 	uint8_t type, uint8_t color, uint16_t q_number,
132 	uint16_t completed_index, uint8_t ingress_port, uint8_t fcoe,
133 	uint8_t eop, uint8_t sop, uint8_t rss_type, uint8_t csum_not_calc,
134 	uint32_t rss_hash, uint16_t bytes_written, uint8_t packet_error,
135 	uint8_t vlan_stripped, uint16_t vlan, uint16_t checksum,
136 	uint8_t fcoe_sof, uint8_t fcoe_fc_crc_ok, uint8_t fcoe_enc_error,
137 	uint8_t fcoe_eof, uint8_t tcp_udp_csum_ok, uint8_t udp, uint8_t tcp,
138 	uint8_t ipv4_csum_ok, uint8_t ipv6, uint8_t ipv4, uint8_t ipv4_fragment,
139 	uint8_t fcs_ok)
140 {
141 	cq_desc_enc((struct cq_desc *)desc, type,
142 		color, q_number, completed_index);
143 
144 	desc->completed_index_flags |= rte_cpu_to_le_16
145 		((ingress_port ? CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT : 0) |
146 		(fcoe ? CQ_ENET_RQ_DESC_FLAGS_FCOE : 0) |
147 		(eop ? CQ_ENET_RQ_DESC_FLAGS_EOP : 0) |
148 		(sop ? CQ_ENET_RQ_DESC_FLAGS_SOP : 0));
149 
150 	desc->q_number_rss_type_flags |= rte_cpu_to_le_16
151 		(((rss_type & CQ_ENET_RQ_DESC_RSS_TYPE_MASK) <<
152 		CQ_DESC_Q_NUM_BITS) |
153 		(csum_not_calc ? CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC : 0));
154 
155 	desc->rss_hash = rte_cpu_to_le_32(rss_hash);
156 
157 	desc->bytes_written_flags = rte_cpu_to_le_16
158 		((bytes_written & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK) |
159 		(packet_error ? CQ_ENET_RQ_DESC_FLAGS_TRUNCATED : 0) |
160 		(vlan_stripped ? CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED : 0));
161 
162 	desc->vlan = rte_cpu_to_le_16(vlan);
163 
164 	if (fcoe) {
165 		desc->checksum_fcoe = rte_cpu_to_le_16
166 			((fcoe_sof & CQ_ENET_RQ_DESC_FCOE_SOF_MASK) |
167 			((fcoe_eof & CQ_ENET_RQ_DESC_FCOE_EOF_MASK) <<
168 				CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT));
169 	} else {
170 		desc->checksum_fcoe = rte_cpu_to_le_16(checksum);
171 	}
172 
173 	desc->flags =
174 		(tcp_udp_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK : 0) |
175 		(udp ? CQ_ENET_RQ_DESC_FLAGS_UDP : 0) |
176 		(tcp ? CQ_ENET_RQ_DESC_FLAGS_TCP : 0) |
177 		(ipv4_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK : 0) |
178 		(ipv6 ? CQ_ENET_RQ_DESC_FLAGS_IPV6 : 0) |
179 		(ipv4 ? CQ_ENET_RQ_DESC_FLAGS_IPV4 : 0) |
180 		(ipv4_fragment ? CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT : 0) |
181 		(fcs_ok ? CQ_ENET_RQ_DESC_FLAGS_FCS_OK : 0) |
182 		(fcoe_fc_crc_ok ? CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK : 0) |
183 		(fcoe_enc_error ? CQ_ENET_RQ_DESC_FCOE_ENC_ERROR : 0);
184 }
185 
cq_enet_rq_desc_dec(struct cq_enet_rq_desc * desc,uint8_t * type,uint8_t * color,uint16_t * q_number,uint16_t * completed_index,uint8_t * ingress_port,uint8_t * fcoe,uint8_t * eop,uint8_t * sop,uint8_t * rss_type,uint8_t * csum_not_calc,uint32_t * rss_hash,uint16_t * bytes_written,uint8_t * packet_error,uint8_t * vlan_stripped,uint16_t * vlan_tci,uint16_t * checksum,uint8_t * fcoe_sof,uint8_t * fcoe_fc_crc_ok,uint8_t * fcoe_enc_error,uint8_t * fcoe_eof,uint8_t * tcp_udp_csum_ok,uint8_t * udp,uint8_t * tcp,uint8_t * ipv4_csum_ok,uint8_t * ipv6,uint8_t * ipv4,uint8_t * ipv4_fragment,uint8_t * fcs_ok)186 static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
187 	uint8_t *type, uint8_t *color, uint16_t *q_number,
188 	uint16_t *completed_index, uint8_t *ingress_port, uint8_t *fcoe,
189 	uint8_t *eop, uint8_t *sop, uint8_t *rss_type, uint8_t *csum_not_calc,
190 	uint32_t *rss_hash, uint16_t *bytes_written, uint8_t *packet_error,
191 	uint8_t *vlan_stripped, uint16_t *vlan_tci, uint16_t *checksum,
192 	uint8_t *fcoe_sof, uint8_t *fcoe_fc_crc_ok, uint8_t *fcoe_enc_error,
193 	uint8_t *fcoe_eof, uint8_t *tcp_udp_csum_ok, uint8_t *udp, uint8_t *tcp,
194 	uint8_t *ipv4_csum_ok, uint8_t *ipv6, uint8_t *ipv4,
195 	uint8_t *ipv4_fragment, uint8_t *fcs_ok)
196 {
197 	uint16_t completed_index_flags;
198 	uint16_t q_number_rss_type_flags;
199 	uint16_t bytes_written_flags;
200 
201 	cq_desc_dec((struct cq_desc *)desc, type,
202 		color, q_number, completed_index);
203 
204 	completed_index_flags = rte_le_to_cpu_16(desc->completed_index_flags);
205 	q_number_rss_type_flags =
206 		rte_le_to_cpu_16(desc->q_number_rss_type_flags);
207 	bytes_written_flags = rte_le_to_cpu_16(desc->bytes_written_flags);
208 
209 	*ingress_port = (completed_index_flags &
210 		CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
211 	*fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
212 		1 : 0;
213 	*eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
214 		1 : 0;
215 	*sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
216 		1 : 0;
217 
218 	*rss_type = (uint8_t)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
219 		CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
220 	*csum_not_calc = (q_number_rss_type_flags &
221 		CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
222 
223 	*rss_hash = rte_le_to_cpu_32(desc->rss_hash);
224 
225 	*bytes_written = bytes_written_flags &
226 		CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
227 	*packet_error = (bytes_written_flags &
228 		CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
229 	*vlan_stripped = (bytes_written_flags &
230 		CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
231 
232 	/*
233 	 * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)
234 	 */
235 	*vlan_tci = rte_le_to_cpu_16(desc->vlan);
236 
237 	if (*fcoe) {
238 		*fcoe_sof = (uint8_t)(rte_le_to_cpu_16(desc->checksum_fcoe) &
239 			CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
240 		*fcoe_fc_crc_ok = (desc->flags &
241 			CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
242 		*fcoe_enc_error = (desc->flags &
243 			CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
244 		*fcoe_eof = (uint8_t)((rte_le_to_cpu_16(desc->checksum_fcoe) >>
245 			CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
246 			CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
247 		*checksum = 0;
248 	} else {
249 		*fcoe_sof = 0;
250 		*fcoe_fc_crc_ok = 0;
251 		*fcoe_enc_error = 0;
252 		*fcoe_eof = 0;
253 		*checksum = rte_le_to_cpu_16(desc->checksum_fcoe);
254 	}
255 
256 	*tcp_udp_csum_ok =
257 		(desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
258 	*udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
259 	*tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
260 	*ipv4_csum_ok =
261 		(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
262 	*ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
263 	*ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
264 	*ipv4_fragment =
265 		(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
266 	*fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
267 }
268 
269 #endif /* _CQ_ENET_DESC_H_ */
270