xref: /dpdk/drivers/net/dpaa2/mc/fsl_dpni_cmd.h (revision 5ecb687a5698d2d8ec1f3b3b5a7a16bceca3e29c)
1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2  *
3  * Copyright 2013-2016 Freescale Semiconductor Inc.
4  * Copyright 2016-2017 NXP
5  *
6  */
7 #ifndef _FSL_DPNI_CMD_H
8 #define _FSL_DPNI_CMD_H
9 
10 /* DPNI Version */
11 #define DPNI_VER_MAJOR				7
12 #define DPNI_VER_MINOR				9
13 
14 #define DPNI_CMD_BASE_VERSION			1
15 #define DPNI_CMD_VERSION_2			2
16 #define DPNI_CMD_VERSION_3			3
17 #define DPNI_CMD_ID_OFFSET			4
18 
19 #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
20 #define DPNI_CMD_V2(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_2)
21 #define DPNI_CMD_V3(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_3)
22 
23 /* Command IDs */
24 #define DPNI_CMDID_OPEN				DPNI_CMD(0x801)
25 #define DPNI_CMDID_CLOSE			DPNI_CMD(0x800)
26 #define DPNI_CMDID_CREATE			DPNI_CMD_V3(0x901)
27 #define DPNI_CMDID_DESTROY			DPNI_CMD(0x981)
28 #define DPNI_CMDID_GET_API_VERSION		DPNI_CMD(0xa01)
29 
30 #define DPNI_CMDID_ENABLE			DPNI_CMD(0x002)
31 #define DPNI_CMDID_DISABLE			DPNI_CMD(0x003)
32 #define DPNI_CMDID_GET_ATTR			DPNI_CMD_V3(0x004)
33 #define DPNI_CMDID_RESET			DPNI_CMD(0x005)
34 #define DPNI_CMDID_IS_ENABLED			DPNI_CMD(0x006)
35 
36 #define DPNI_CMDID_SET_IRQ_ENABLE		DPNI_CMD(0x012)
37 #define DPNI_CMDID_GET_IRQ_ENABLE		DPNI_CMD(0x013)
38 #define DPNI_CMDID_SET_IRQ_MASK			DPNI_CMD(0x014)
39 #define DPNI_CMDID_GET_IRQ_MASK			DPNI_CMD(0x015)
40 #define DPNI_CMDID_GET_IRQ_STATUS		DPNI_CMD(0x016)
41 #define DPNI_CMDID_CLEAR_IRQ_STATUS		DPNI_CMD(0x017)
42 
43 #define DPNI_CMDID_SET_POOLS			DPNI_CMD_V2(0x200)
44 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR		DPNI_CMD(0x20B)
45 
46 #define DPNI_CMDID_GET_QDID			DPNI_CMD(0x210)
47 #define DPNI_CMDID_GET_SP_INFO			DPNI_CMD(0x211)
48 #define DPNI_CMDID_GET_TX_DATA_OFFSET		DPNI_CMD(0x212)
49 #define DPNI_CMDID_GET_LINK_STATE		DPNI_CMD_V2(0x215)
50 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH		DPNI_CMD(0x216)
51 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH		DPNI_CMD(0x217)
52 #define DPNI_CMDID_SET_LINK_CFG			DPNI_CMD_V2(0x21A)
53 #define DPNI_CMDID_SET_TX_SHAPING		DPNI_CMD_V2(0x21B)
54 
55 #define DPNI_CMDID_SET_MCAST_PROMISC		DPNI_CMD(0x220)
56 #define DPNI_CMDID_GET_MCAST_PROMISC		DPNI_CMD(0x221)
57 #define DPNI_CMDID_SET_UNICAST_PROMISC		DPNI_CMD(0x222)
58 #define DPNI_CMDID_GET_UNICAST_PROMISC		DPNI_CMD(0x223)
59 #define DPNI_CMDID_SET_PRIM_MAC			DPNI_CMD(0x224)
60 #define DPNI_CMDID_GET_PRIM_MAC			DPNI_CMD(0x225)
61 #define DPNI_CMDID_ADD_MAC_ADDR			DPNI_CMD(0x226)
62 #define DPNI_CMDID_REMOVE_MAC_ADDR		DPNI_CMD(0x227)
63 #define DPNI_CMDID_CLR_MAC_FILTERS		DPNI_CMD(0x228)
64 
65 #define DPNI_CMDID_ENABLE_VLAN_FILTER		DPNI_CMD(0x230)
66 #define DPNI_CMDID_ADD_VLAN_ID			DPNI_CMD(0x231)
67 #define DPNI_CMDID_REMOVE_VLAN_ID		DPNI_CMD(0x232)
68 #define DPNI_CMDID_CLR_VLAN_FILTERS		DPNI_CMD(0x233)
69 
70 #define DPNI_CMDID_SET_RX_TC_DIST		DPNI_CMD_V3(0x235)
71 
72 #define DPNI_CMDID_SET_QOS_TBL			DPNI_CMD_V2(0x240)
73 #define DPNI_CMDID_ADD_QOS_ENT			DPNI_CMD(0x241)
74 #define DPNI_CMDID_REMOVE_QOS_ENT		DPNI_CMD(0x242)
75 #define DPNI_CMDID_CLR_QOS_TBL			DPNI_CMD(0x243)
76 #define DPNI_CMDID_ADD_FS_ENT			DPNI_CMD(0x244)
77 #define DPNI_CMDID_REMOVE_FS_ENT		DPNI_CMD(0x245)
78 #define DPNI_CMDID_CLR_FS_ENT			DPNI_CMD(0x246)
79 
80 #define DPNI_CMDID_GET_STATISTICS		DPNI_CMD_V3(0x25D)
81 #define DPNI_CMDID_RESET_STATISTICS		DPNI_CMD(0x25E)
82 #define DPNI_CMDID_GET_QUEUE			DPNI_CMD_V2(0x25F)
83 #define DPNI_CMDID_SET_QUEUE			DPNI_CMD_V2(0x260)
84 #define DPNI_CMDID_GET_TAILDROP			DPNI_CMD_V2(0x261)
85 #define DPNI_CMDID_SET_TAILDROP			DPNI_CMD_V2(0x262)
86 
87 #define DPNI_CMDID_GET_PORT_MAC_ADDR		DPNI_CMD(0x263)
88 
89 #define DPNI_CMDID_GET_BUFFER_LAYOUT		DPNI_CMD_V2(0x264)
90 #define DPNI_CMDID_SET_BUFFER_LAYOUT		DPNI_CMD_V2(0x265)
91 
92 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION	DPNI_CMD_V2(0x267)
93 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION	DPNI_CMD_V2(0x268)
94 #define DPNI_CMDID_SET_EARLY_DROP		DPNI_CMD_V2(0x269)
95 #define DPNI_CMDID_GET_EARLY_DROP		DPNI_CMD_V2(0x26A)
96 #define DPNI_CMDID_GET_OFFLOAD			DPNI_CMD(0x26B)
97 #define DPNI_CMDID_SET_OFFLOAD			DPNI_CMD(0x26C)
98 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE	DPNI_CMD(0x266)
99 #define DPNI_CMDID_GET_TX_CONFIRMATION_MODE	DPNI_CMD(0x26D)
100 #define DPNI_CMDID_SET_OPR			DPNI_CMD(0x26e)
101 #define DPNI_CMDID_GET_OPR			DPNI_CMD(0x26f)
102 #define DPNI_CMDID_SET_RX_FS_DIST		DPNI_CMD(0x273)
103 #define DPNI_CMDID_SET_RX_HASH_DIST		DPNI_CMD(0x274)
104 #define DPNI_CMDID_ADD_CUSTOM_TPID		DPNI_CMD(0x275)
105 #define DPNI_CMDID_REMOVE_CUSTOM_TPID		DPNI_CMD(0x276)
106 #define DPNI_CMDID_GET_CUSTOM_TPID		DPNI_CMD(0x277)
107 
108 /* Macros for accessing command fields smaller than 1byte */
109 #define DPNI_MASK(field)	\
110 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
111 		DPNI_##field##_SHIFT)
112 #define dpni_set_field(var, field, val)	\
113 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
114 #define dpni_get_field(var, field)	\
115 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
116 
117 #pragma pack(push, 1)
118 struct dpni_cmd_open {
119 	uint32_t dpni_id;
120 };
121 
122 struct dpni_cmd_create {
123 	uint32_t options;
124 	uint8_t num_queues;
125 	uint8_t num_tcs;
126 	uint8_t mac_filter_entries;
127 	uint8_t pad1;
128 	uint8_t vlan_filter_entries;
129 	uint8_t pad2;
130 	uint8_t qos_entries;
131 	uint8_t pad3;
132 	uint16_t fs_entries;
133 	uint8_t num_rx_tcs;
134 	uint8_t pad4;
135 	uint8_t num_cgs;
136 };
137 
138 struct dpni_cmd_destroy {
139 	uint32_t dpsw_id;
140 };
141 
142 #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
143 
144 struct dpni_cmd_pool {
145 	uint16_t dpbp_id;
146 	uint8_t priority_mask;
147 	uint8_t pad;
148 };
149 
150 struct dpni_cmd_set_pools {
151 	uint8_t num_dpbp;
152 	uint8_t backup_pool_mask;
153 	uint16_t pad;
154 	struct dpni_cmd_pool pool[8];
155 	uint16_t buffer_size[8];
156 };
157 
158 /* The enable indication is always the least significant bit */
159 #define DPNI_ENABLE_SHIFT		0
160 #define DPNI_ENABLE_SIZE		1
161 
162 struct dpni_rsp_is_enabled {
163 	uint8_t enabled;
164 };
165 
166 struct dpni_cmd_set_irq_enable {
167 	uint8_t enable;
168 	uint8_t pad[3];
169 	uint8_t irq_index;
170 };
171 
172 struct dpni_cmd_get_irq_enable {
173 	uint32_t pad;
174 	uint8_t irq_index;
175 };
176 
177 struct dpni_rsp_get_irq_enable {
178 	uint8_t enabled;
179 };
180 
181 struct dpni_cmd_set_irq_mask {
182 	uint32_t mask;
183 	uint8_t irq_index;
184 };
185 
186 struct dpni_cmd_get_irq_mask {
187 	uint32_t pad;
188 	uint8_t irq_index;
189 };
190 
191 struct dpni_rsp_get_irq_mask {
192 	uint32_t mask;
193 };
194 
195 struct dpni_cmd_get_irq_status {
196 	uint32_t status;
197 	uint8_t irq_index;
198 };
199 
200 struct dpni_rsp_get_irq_status {
201 	uint32_t status;
202 };
203 
204 struct dpni_cmd_clear_irq_status {
205 	uint32_t status;
206 	uint8_t irq_index;
207 };
208 
209 struct dpni_rsp_get_attr {
210 	/* response word 0 */
211 	uint32_t options;
212 	uint8_t num_queues;
213 	uint8_t num_rx_tcs;
214 	uint8_t mac_filter_entries;
215 	uint8_t num_tx_tcs;
216 	/* response word 1 */
217 	uint8_t vlan_filter_entries;
218 	uint8_t pad1;
219 	uint8_t qos_entries;
220 	uint8_t pad2;
221 	uint16_t fs_entries;
222 	uint16_t pad3;
223 	/* response word 2 */
224 	uint8_t qos_key_size;
225 	uint8_t fs_key_size;
226 	uint16_t wriop_version;
227 	uint8_t num_cgs;
228 };
229 
230 #define DPNI_ERROR_ACTION_SHIFT		0
231 #define DPNI_ERROR_ACTION_SIZE		4
232 #define DPNI_FRAME_ANN_SHIFT		4
233 #define DPNI_FRAME_ANN_SIZE		1
234 
235 struct dpni_cmd_set_errors_behavior {
236 	uint32_t errors;
237 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
238 	uint8_t flags;
239 };
240 
241 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
242  * buffer layouts, but they all share the same parameters.
243  * If one of the functions changes, below structure needs to be split.
244  */
245 
246 #define DPNI_PASS_TS_SHIFT		0
247 #define DPNI_PASS_TS_SIZE		1
248 #define DPNI_PASS_PR_SHIFT		1
249 #define DPNI_PASS_PR_SIZE		1
250 #define DPNI_PASS_FS_SHIFT		2
251 #define DPNI_PASS_FS_SIZE		1
252 #define DPNI_PASS_SWO_SHIFT		3
253 #define DPNI_PASS_SWO_SIZE		1
254 
255 struct dpni_cmd_get_buffer_layout {
256 	uint8_t qtype;
257 };
258 
259 struct dpni_rsp_get_buffer_layout {
260 	/* response word 0 */
261 	uint8_t pad0[6];
262 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
263 	uint8_t flags;
264 	uint8_t pad1;
265 	/* response word 1 */
266 	uint16_t private_data_size;
267 	uint16_t data_align;
268 	uint16_t head_room;
269 	uint16_t tail_room;
270 };
271 
272 struct dpni_cmd_set_buffer_layout {
273 	/* cmd word 0 */
274 	uint8_t qtype;
275 	uint8_t pad0[3];
276 	uint16_t options;
277 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
278 	uint8_t flags;
279 	uint8_t pad1;
280 	/* cmd word 1 */
281 	uint16_t private_data_size;
282 	uint16_t data_align;
283 	uint16_t head_room;
284 	uint16_t tail_room;
285 };
286 
287 struct dpni_cmd_set_offload {
288 	uint8_t pad[3];
289 	uint8_t dpni_offload;
290 	uint32_t config;
291 };
292 
293 struct dpni_cmd_get_offload {
294 	uint8_t pad[3];
295 	uint8_t dpni_offload;
296 };
297 
298 struct dpni_rsp_get_offload {
299 	uint32_t pad;
300 	uint32_t config;
301 };
302 
303 struct dpni_cmd_get_qdid {
304 	uint8_t qtype;
305 };
306 
307 struct dpni_rsp_get_qdid {
308 	uint16_t qdid;
309 };
310 
311 struct dpni_rsp_get_sp_info {
312 	uint16_t spids[2];
313 };
314 
315 struct dpni_rsp_get_tx_data_offset {
316 	uint16_t data_offset;
317 };
318 
319 struct dpni_cmd_get_statistics {
320 	uint8_t page_number;
321 	uint16_t param;
322 };
323 
324 struct dpni_rsp_get_statistics {
325 	uint64_t counter[7];
326 };
327 
328 struct dpni_cmd_set_link_cfg {
329 	uint64_t pad0;
330 	uint32_t rate;
331 	uint32_t pad1;
332 	uint64_t options;
333 	uint64_t advertising;
334 };
335 
336 #define DPNI_LINK_STATE_SHIFT		0
337 #define DPNI_LINK_STATE_SIZE		1
338 #define DPNI_STATE_VALID_SHIFT		1
339 #define DPNI_STATE_VALID_SIZE		1
340 
341 struct dpni_rsp_get_link_state {
342 	uint32_t pad0;
343 	/* from LSB: up:1 */
344 	uint8_t flags;
345 	uint8_t pad1[3];
346 	uint32_t rate;
347 	uint32_t pad2;
348 	uint64_t options;
349 	uint64_t supported;
350 	uint64_t advertising;
351 };
352 
353 struct dpni_cmd_set_max_frame_length {
354 	uint16_t max_frame_length;
355 };
356 
357 struct dpni_rsp_get_max_frame_length {
358 	uint16_t max_frame_length;
359 };
360 
361 struct dpni_cmd_set_multicast_promisc {
362 	uint8_t enable;
363 };
364 
365 struct dpni_rsp_get_multicast_promisc {
366 	uint8_t enabled;
367 };
368 
369 struct dpni_cmd_set_unicast_promisc {
370 	uint8_t enable;
371 };
372 
373 struct dpni_rsp_get_unicast_promisc {
374 	uint8_t enabled;
375 };
376 
377 struct dpni_cmd_set_primary_mac_addr {
378 	uint16_t pad;
379 	uint8_t mac_addr[6];
380 };
381 
382 struct dpni_rsp_get_primary_mac_addr {
383 	uint16_t pad;
384 	uint8_t mac_addr[6];
385 };
386 
387 struct dpni_rsp_get_port_mac_addr {
388 	uint16_t pad;
389 	uint8_t mac_addr[6];
390 };
391 
392 struct dpni_cmd_add_mac_addr {
393 	uint16_t pad;
394 	uint8_t mac_addr[6];
395 };
396 
397 struct dpni_cmd_remove_mac_addr {
398 	uint16_t pad;
399 	uint8_t mac_addr[6];
400 };
401 
402 #define DPNI_UNICAST_FILTERS_SHIFT	0
403 #define DPNI_UNICAST_FILTERS_SIZE	1
404 #define DPNI_MULTICAST_FILTERS_SHIFT	1
405 #define DPNI_MULTICAST_FILTERS_SIZE	1
406 
407 struct dpni_cmd_clear_mac_filters {
408 	/* from LSB: unicast:1, multicast:1 */
409 	uint8_t flags;
410 };
411 
412 struct dpni_cmd_enable_vlan_filter {
413 	/* only the LSB */
414 	uint8_t en;
415 };
416 
417 struct dpni_cmd_vlan_id {
418 	uint32_t pad;
419 	uint16_t vlan_id;
420 };
421 
422 #define DPNI_SEPARATE_GRP_SHIFT 0
423 #define DPNI_SEPARATE_GRP_SIZE  1
424 #define DPNI_MODE_1_SHIFT		0
425 #define DPNI_MODE_1_SIZE		4
426 #define DPNI_MODE_2_SHIFT		4
427 #define DPNI_MODE_2_SIZE		4
428 
429 struct dpni_cmd_set_tx_priorities {
430 	uint16_t flags;
431 	uint8_t prio_group_A;
432 	uint8_t prio_group_B;
433 	uint32_t pad0;
434 	uint8_t modes[4];
435 	uint32_t pad1;
436 	uint64_t pad2;
437 	uint16_t delta_bandwidth[8];
438 };
439 
440 #define DPNI_DIST_MODE_SHIFT		0
441 #define DPNI_DIST_MODE_SIZE		4
442 #define DPNI_MISS_ACTION_SHIFT		4
443 #define DPNI_MISS_ACTION_SIZE		4
444 #define DPNI_KEEP_HASH_KEY_SHIFT	7
445 #define DPNI_KEEP_HASH_KEY_SIZE		1
446 #define DPNI_KEEP_ENTRIES_SHIFT		6
447 #define DPNI_KEEP_ENTRIES_SIZE		1
448 
449 struct dpni_cmd_set_rx_tc_dist {
450 	uint16_t dist_size;
451 	uint8_t tc_id;
452 	/* from LSB: dist_mode:4, miss_action:4 */
453 	uint8_t flags;
454 	uint8_t pad0;
455 	/* only the LSB */
456 	uint8_t keep_hash_key;
457 	uint16_t default_flow_id;
458 	uint64_t pad1[5];
459 	uint64_t key_cfg_iova;
460 };
461 
462 struct dpni_cmd_get_queue {
463 	uint8_t qtype;
464 	uint8_t tc;
465 	uint8_t index;
466 };
467 
468 #define DPNI_DEST_TYPE_SHIFT		0
469 #define DPNI_DEST_TYPE_SIZE		4
470 #define DPNI_CGID_VALID_SHIFT		5
471 #define DPNI_CGID_VALID_SIZE		1
472 #define DPNI_STASH_CTRL_SHIFT		6
473 #define DPNI_STASH_CTRL_SIZE		1
474 #define DPNI_HOLD_ACTIVE_SHIFT		7
475 #define DPNI_HOLD_ACTIVE_SIZE		1
476 
477 struct dpni_rsp_get_queue {
478 	/* response word 0 */
479 	uint64_t pad0;
480 	/* response word 1 */
481 	uint32_t dest_id;
482 	uint16_t pad1;
483 	uint8_t dest_prio;
484 	/* From LSB:
485 	 * dest_type:4, pad:1, cgid_valid:1, flc_stash_ctrl:1, hold_active:1
486 	 */
487 	uint8_t flags;
488 	/* response word 2 */
489 	uint64_t flc;
490 	/* response word 3 */
491 	uint64_t user_context;
492 	/* response word 4 */
493 	uint32_t fqid;
494 	uint16_t qdbin;
495 	uint16_t pad2;
496 	/* response word 5*/
497 	uint8_t cgid;
498 };
499 
500 struct dpni_cmd_set_queue {
501 	/* cmd word 0 */
502 	uint8_t qtype;
503 	uint8_t tc;
504 	uint8_t index;
505 	uint8_t options;
506 	uint32_t pad0;
507 	/* cmd word 1 */
508 	uint32_t dest_id;
509 	uint16_t pad1;
510 	uint8_t dest_prio;
511 	uint8_t flags;
512 	/* cmd word 2 */
513 	uint64_t flc;
514 	/* cmd word 3 */
515 	uint64_t user_context;
516 	/* cmd word 4 */
517 	uint8_t cgid;
518 };
519 
520 #define DPNI_DISCARD_ON_MISS_SHIFT	0
521 #define DPNI_DISCARD_ON_MISS_SIZE	1
522 #define DPNI_KEEP_QOS_ENTRIES_SHIFT		1
523 #define DPNI_KEEP_QOS_ENTRIES_SIZE		1
524 
525 struct dpni_cmd_set_qos_table {
526 	uint32_t pad;
527 	uint8_t default_tc;
528 	/* only the LSB */
529 	uint8_t discard_on_miss;
530 	uint16_t pad1[21];
531 	uint64_t key_cfg_iova;
532 };
533 
534 struct dpni_cmd_add_qos_entry {
535 	uint16_t pad;
536 	uint8_t tc_id;
537 	uint8_t key_size;
538 	uint16_t index;
539 	uint16_t pad2;
540 	uint64_t key_iova;
541 	uint64_t mask_iova;
542 };
543 
544 struct dpni_cmd_remove_qos_entry {
545 	uint8_t pad1[3];
546 	uint8_t key_size;
547 	uint32_t pad2;
548 	uint64_t key_iova;
549 	uint64_t mask_iova;
550 };
551 
552 struct dpni_cmd_add_fs_entry {
553 	uint16_t options;
554 	uint8_t tc_id;
555 	uint8_t key_size;
556 	uint16_t index;
557 	uint16_t flow_id;
558 	uint64_t key_iova;
559 	uint64_t mask_iova;
560 	uint64_t flc;
561 };
562 
563 struct dpni_cmd_remove_fs_entry {
564 	uint16_t pad1;
565 	uint8_t tc_id;
566 	uint8_t key_size;
567 	uint32_t pad2;
568 	uint64_t key_iova;
569 	uint64_t mask_iova;
570 };
571 
572 struct dpni_cmd_clear_fs_entries {
573 	uint16_t pad;
574 	uint8_t tc_id;
575 };
576 
577 #define DPNI_DROP_ENABLE_SHIFT	0
578 #define DPNI_DROP_ENABLE_SIZE	1
579 #define DPNI_DROP_UNITS_SHIFT	2
580 #define DPNI_DROP_UNITS_SIZE	2
581 
582 struct dpni_early_drop {
583 	/* from LSB: enable:1 units:2 */
584 	uint8_t flags;
585 	uint8_t pad0[3];
586 	uint32_t pad1;
587 	uint8_t green_drop_probability;
588 	uint8_t pad2[7];
589 	uint64_t green_max_threshold;
590 	uint64_t green_min_threshold;
591 	uint64_t pad3;
592 	uint8_t yellow_drop_probability;
593 	uint8_t pad4[7];
594 	uint64_t yellow_max_threshold;
595 	uint64_t yellow_min_threshold;
596 	uint64_t pad5;
597 	uint8_t red_drop_probability;
598 	uint8_t pad6[7];
599 	uint64_t red_max_threshold;
600 	uint64_t red_min_threshold;
601 };
602 
603 struct dpni_cmd_early_drop {
604 	uint8_t qtype;
605 	uint8_t tc;
606 	uint8_t pad[6];
607 	uint64_t early_drop_iova;
608 };
609 
610 struct dpni_rsp_get_api_version {
611 	uint16_t major;
612 	uint16_t minor;
613 };
614 
615 struct dpni_cmd_get_taildrop {
616 	uint8_t congestion_point;
617 	uint8_t qtype;
618 	uint8_t tc;
619 	uint8_t index;
620 };
621 
622 struct dpni_rsp_get_taildrop {
623 	/* cmd word 0 */
624 	uint64_t pad0;
625 	/* cmd word 1 */
626 	/* from LSB: enable:1 oal_lo:7 */
627 	uint8_t enable_oal_lo;
628 	/* from LSB: oal_hi:5 */
629 	uint8_t oal_hi;
630 	uint8_t units;
631 	uint8_t pad2;
632 	uint32_t threshold;
633 };
634 
635 #define DPNI_OAL_LO_SHIFT	1
636 #define DPNI_OAL_LO_SIZE	7
637 #define DPNI_OAL_HI_SHIFT	0
638 #define DPNI_OAL_HI_SIZE	5
639 
640 struct dpni_cmd_set_taildrop {
641 	/* cmd word 0 */
642 	uint8_t congestion_point;
643 	uint8_t qtype;
644 	uint8_t tc;
645 	uint8_t index;
646 	uint32_t pad0;
647 	/* cmd word 1 */
648 	/* from LSB: enable:1 oal_lo:7 */
649 	uint8_t enable_oal_lo;
650 	/* from LSB: oal_hi:5 */
651 	uint8_t oal_hi;
652 	uint8_t units;
653 	uint8_t pad2;
654 	uint32_t threshold;
655 };
656 
657 struct dpni_tx_confirmation_mode {
658 	uint32_t pad;
659 	uint8_t confirmation_mode;
660 };
661 
662 #define DPNI_DEST_TYPE_SHIFT		0
663 #define DPNI_DEST_TYPE_SIZE		4
664 #define DPNI_CONG_UNITS_SHIFT		4
665 #define DPNI_CONG_UNITS_SIZE		2
666 
667 struct dpni_cmd_set_congestion_notification {
668 	uint8_t qtype;
669 	uint8_t tc;
670 	uint8_t pad;
671 	uint8_t congestion_point;
672 	uint8_t cgid;
673 	uint8_t pad2[3];
674 	uint32_t dest_id;
675 	uint16_t notification_mode;
676 	uint8_t dest_priority;
677 	/* from LSB: dest_type: 4 units:2 */
678 	uint8_t type_units;
679 	uint64_t message_iova;
680 	uint64_t message_ctx;
681 	uint32_t threshold_entry;
682 	uint32_t threshold_exit;
683 };
684 
685 struct dpni_cmd_get_congestion_notification {
686 	uint8_t qtype;
687 	uint8_t tc;
688 	uint8_t pad;
689 	uint8_t congestion_point;
690 	uint8_t cgid;
691 };
692 
693 struct dpni_rsp_get_congestion_notification {
694 	uint64_t pad;
695 	uint32_t dest_id;
696 	uint16_t notification_mode;
697 	uint8_t dest_priority;
698 	/* from LSB: dest_type: 4 units:2 */
699 	uint8_t type_units;
700 	uint64_t message_iova;
701 	uint64_t message_ctx;
702 	uint32_t threshold_entry;
703 	uint32_t threshold_exit;
704 };
705 
706 struct dpni_cmd_set_opr {
707 	uint8_t pad0;
708 	uint8_t tc_id;
709 	uint8_t index;
710 	uint8_t options;
711 	uint8_t pad1[7];
712 	uint8_t oloe;
713 	uint8_t oeane;
714 	uint8_t olws;
715 	uint8_t oa;
716 	uint8_t oprrws;
717 };
718 
719 struct dpni_cmd_get_opr {
720 	uint8_t pad;
721 	uint8_t tc_id;
722 	uint8_t index;
723 };
724 
725 #define DPNI_RIP_SHIFT	0
726 #define DPNI_RIP_SIZE		1
727 #define DPNI_OPR_ENABLE_SHIFT	1
728 #define DPNI_OPR_ENABLE_SIZE	1
729 #define DPNI_TSEQ_NLIS_SHIFT	0
730 #define DPNI_TSEQ_NLIS_SIZE	1
731 #define DPNI_HSEQ_NLIS_SHIFT	0
732 #define DPNI_HSEQ_NLIS_SIZE	1
733 
734 struct dpni_rsp_get_opr {
735 	uint64_t pad0;
736 	/* from LSB: rip:1 enable:1 */
737 	uint8_t flags;
738 	uint16_t pad1;
739 	uint8_t oloe;
740 	uint8_t oeane;
741 	uint8_t olws;
742 	uint8_t oa;
743 	uint8_t oprrws;
744 	uint16_t nesn;
745 	uint16_t pad8;
746 	uint16_t ndsn;
747 	uint16_t pad2;
748 	uint16_t ea_tseq;
749 	/* only the LSB */
750 	uint8_t tseq_nlis;
751 	uint8_t pad3;
752 	uint16_t ea_hseq;
753 	/* only the LSB */
754 	uint8_t hseq_nlis;
755 	uint8_t pad4;
756 	uint16_t ea_hptr;
757 	uint16_t pad5;
758 	uint16_t ea_tptr;
759 	uint16_t pad6;
760 	uint16_t opr_vid;
761 	uint16_t pad7;
762 	uint16_t opr_id;
763 };
764 
765 struct dpni_cmd_add_custom_tpid {
766 	uint16_t	pad;
767 	uint16_t	tpid;
768 };
769 
770 struct dpni_cmd_remove_custom_tpid {
771 	uint16_t	pad;
772 	uint16_t	tpid;
773 };
774 
775 struct dpni_rsp_get_custom_tpid {
776 	uint16_t	tpid1;
777 	uint16_t	tpid2;
778 };
779 
780 #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
781 #define DPNI_RX_FS_DIST_ENABLE_SIZE		1
782 struct dpni_cmd_set_rx_fs_dist {
783 	uint16_t	dist_size;
784 	uint8_t		enable;
785 	uint8_t		tc;
786 	uint16_t	miss_flow_id;
787 	uint16_t	pad1;
788 	uint64_t	key_cfg_iova;
789 };
790 
791 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
792 #define DPNI_RX_HASH_DIST_ENABLE_SIZE		1
793 struct dpni_cmd_set_rx_hash_dist {
794 	uint16_t	dist_size;
795 	uint8_t		enable;
796 	uint8_t		tc_id;
797 	uint32_t	pad;
798 	uint64_t	key_cfg_iova;
799 };
800 
801 #pragma pack(pop)
802 #endif /* _FSL_DPNI_CMD_H */
803