1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 2 * 3 * Copyright 2013-2016 Freescale Semiconductor Inc. 4 * Copyright 2016-2023 NXP 5 * 6 */ 7 #ifndef _FSL_DPNI_CMD_H 8 #define _FSL_DPNI_CMD_H 9 10 /* DPNI Version */ 11 #define DPNI_VER_MAJOR 8 12 #define DPNI_VER_MINOR 4 13 14 #define DPNI_CMD_BASE_VERSION 1 15 #define DPNI_CMD_VERSION_2 2 16 #define DPNI_CMD_VERSION_3 3 17 #define DPNI_CMD_VERSION_4 4 18 #define DPNI_CMD_VERSION_5 5 19 #define DPNI_CMD_VERSION_6 6 20 #define DPNI_CMD_VERSION_7 7 21 #define DPNI_CMD_ID_OFFSET 4 22 23 #define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION) 24 #define DPNI_CMD_V2(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_2) 25 #define DPNI_CMD_V3(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_3) 26 #define DPNI_CMD_V4(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_4) 27 #define DPNI_CMD_V5(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_5) 28 #define DPNI_CMD_V6(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_6) 29 #define DPNI_CMD_V7(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_7) 30 31 /* Command IDs */ 32 #define DPNI_CMDID_OPEN DPNI_CMD(0x801) 33 #define DPNI_CMDID_CLOSE DPNI_CMD(0x800) 34 #define DPNI_CMDID_CREATE DPNI_CMD_V7(0x901) 35 #define DPNI_CMDID_DESTROY DPNI_CMD(0x981) 36 #define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01) 37 38 #define DPNI_CMDID_ENABLE DPNI_CMD(0x002) 39 #define DPNI_CMDID_DISABLE DPNI_CMD(0x003) 40 #define DPNI_CMDID_GET_ATTR DPNI_CMD_V6(0x004) 41 #define DPNI_CMDID_RESET DPNI_CMD(0x005) 42 #define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006) 43 44 #define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012) 45 #define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013) 46 #define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014) 47 #define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015) 48 #define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016) 49 #define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017) 50 51 #define DPNI_CMDID_SET_POOLS DPNI_CMD_V3(0x200) 52 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B) 53 54 #define DPNI_CMDID_GET_QDID DPNI_CMD(0x210) 55 #define DPNI_CMDID_GET_SP_INFO DPNI_CMD(0x211) 56 #define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212) 57 #define DPNI_CMDID_GET_LINK_STATE DPNI_CMD_V2(0x215) 58 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216) 59 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217) 60 #define DPNI_CMDID_SET_LINK_CFG DPNI_CMD_V2(0x21A) 61 #define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD_V3(0x21B) 62 63 #define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220) 64 #define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221) 65 #define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222) 66 #define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223) 67 #define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224) 68 #define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225) 69 #define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD_V2(0x226) 70 #define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227) 71 #define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228) 72 73 #define DPNI_CMDID_ENABLE_VLAN_FILTER DPNI_CMD(0x230) 74 #define DPNI_CMDID_ADD_VLAN_ID DPNI_CMD_V2(0x231) 75 #define DPNI_CMDID_REMOVE_VLAN_ID DPNI_CMD(0x232) 76 #define DPNI_CMDID_CLR_VLAN_FILTERS DPNI_CMD(0x233) 77 78 #define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD_V4(0x235) 79 80 #define DPNI_CMDID_SET_RX_TC_POLICING DPNI_CMD(0x23E) 81 82 #define DPNI_CMDID_SET_QOS_TBL DPNI_CMD_V2(0x240) 83 #define DPNI_CMDID_ADD_QOS_ENT DPNI_CMD_V2(0x241) 84 #define DPNI_CMDID_REMOVE_QOS_ENT DPNI_CMD(0x242) 85 #define DPNI_CMDID_CLR_QOS_TBL DPNI_CMD(0x243) 86 #define DPNI_CMDID_ADD_FS_ENT DPNI_CMD_V2(0x244) 87 #define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245) 88 #define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246) 89 90 #define DPNI_CMDID_SET_TX_PRIORITIES DPNI_CMD_V3(0x250) 91 #define DPNI_CMDID_GET_RX_TC_POLICING DPNI_CMD(0x251) 92 93 #define DPNI_CMDID_GET_STATISTICS DPNI_CMD_V4(0x25D) 94 #define DPNI_CMDID_RESET_STATISTICS DPNI_CMD(0x25E) 95 #define DPNI_CMDID_GET_QUEUE DPNI_CMD_V3(0x25F) 96 #define DPNI_CMDID_SET_QUEUE DPNI_CMD_V3(0x260) 97 #define DPNI_CMDID_GET_TAILDROP DPNI_CMD_V2(0x261) 98 #define DPNI_CMDID_SET_TAILDROP DPNI_CMD_V3(0x262) 99 100 #define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263) 101 102 #define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD_V2(0x264) 103 #define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD_V2(0x265) 104 105 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD_V3(0x267) 106 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD_V3(0x268) 107 #define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD_V3(0x269) 108 #define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD_V3(0x26A) 109 #define DPNI_CMDID_GET_OFFLOAD DPNI_CMD_V2(0x26B) 110 #define DPNI_CMDID_SET_OFFLOAD DPNI_CMD_V2(0x26C) 111 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD_V2(0x266) 112 #define DPNI_CMDID_GET_TX_CONFIRMATION_MODE DPNI_CMD_V2(0x26D) 113 #define DPNI_CMDID_SET_OPR DPNI_CMD_V2(0x26e) 114 #define DPNI_CMDID_GET_OPR DPNI_CMD_V2(0x26f) 115 #define DPNI_CMDID_LOAD_SW_SEQUENCE DPNI_CMD(0x270) 116 #define DPNI_CMDID_ENABLE_SW_SEQUENCE DPNI_CMD(0x271) 117 #define DPNI_CMDID_GET_SW_SEQUENCE_LAYOUT DPNI_CMD(0x272) 118 #define DPNI_CMDID_SET_RX_FS_DIST DPNI_CMD_V2(0x273) 119 #define DPNI_CMDID_SET_RX_HASH_DIST DPNI_CMD_V2(0x274) 120 #define DPNI_CMDID_ADD_CUSTOM_TPID DPNI_CMD(0x275) 121 #define DPNI_CMDID_REMOVE_CUSTOM_TPID DPNI_CMD(0x276) 122 #define DPNI_CMDID_GET_CUSTOM_TPID DPNI_CMD(0x277) 123 #define DPNI_CMDID_GET_LINK_CFG DPNI_CMD(0x278) 124 #define DPNI_CMDID_SET_SINGLE_STEP_CFG DPNI_CMD(0x279) 125 #define DPNI_CMDID_GET_SINGLE_STEP_CFG DPNI_CMD_V2(0x27a) 126 #define DPNI_CMDID_SET_PORT_CFG DPNI_CMD(0x27B) 127 #define DPNI_CMDID_GET_PORT_CFG DPNI_CMD(0x27C) 128 #define DPNI_CMDID_DUMP_TABLE DPNI_CMD(0x27D) 129 #define DPNI_CMDID_SET_SP_PROFILE DPNI_CMD(0x27E) 130 #define DPNI_CMDID_GET_QDID_EX DPNI_CMD(0x27F) 131 #define DPNI_CMDID_SP_ENABLE DPNI_CMD(0x280) 132 #define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x281) 133 #define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x282) 134 135 /* Macros for accessing command fields smaller than 1byte */ 136 #define DPNI_MASK(field) \ 137 GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \ 138 DPNI_##field##_SHIFT) 139 #define dpni_set_field(var, field, val) \ 140 ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field))) 141 #define dpni_get_field(var, field) \ 142 (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT) 143 144 #pragma pack(push, 1) 145 struct dpni_cmd_open { 146 uint32_t dpni_id; 147 }; 148 149 struct dpni_cmd_create { 150 uint32_t options; 151 uint8_t num_queues; 152 uint8_t num_tcs; 153 uint8_t mac_filter_entries; 154 uint8_t num_channels; 155 uint8_t vlan_filter_entries; 156 uint8_t pad2; 157 uint8_t qos_entries; 158 uint8_t pad3; 159 uint16_t fs_entries; 160 uint8_t num_rx_tcs; 161 uint8_t pad4; 162 uint8_t num_cgs; 163 uint16_t num_opr; 164 uint8_t dist_key_size; 165 }; 166 167 struct dpni_cmd_destroy { 168 uint32_t dpsw_id; 169 }; 170 171 #define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order)) 172 173 struct dpni_cmd_pool { 174 uint16_t dpbp_id; 175 uint8_t priority_mask; 176 uint8_t pad; 177 }; 178 179 struct dpni_cmd_set_pools { 180 uint8_t num_dpbp; 181 uint8_t backup_pool_mask; 182 uint8_t pad; 183 uint8_t pool_options; 184 struct dpni_cmd_pool pool[8]; 185 uint16_t buffer_size[8]; 186 }; 187 188 /* The enable indication is always the least significant bit */ 189 #define DPNI_ENABLE_SHIFT 0 190 #define DPNI_ENABLE_SIZE 1 191 192 struct dpni_rsp_is_enabled { 193 uint8_t enabled; 194 }; 195 196 struct dpni_cmd_set_irq_enable { 197 uint8_t enable; 198 uint8_t pad[3]; 199 uint8_t irq_index; 200 }; 201 202 struct dpni_cmd_get_irq_enable { 203 uint32_t pad; 204 uint8_t irq_index; 205 }; 206 207 struct dpni_rsp_get_irq_enable { 208 uint8_t enabled; 209 }; 210 211 struct dpni_cmd_set_irq_mask { 212 uint32_t mask; 213 uint8_t irq_index; 214 }; 215 216 struct dpni_cmd_get_irq_mask { 217 uint32_t pad; 218 uint8_t irq_index; 219 }; 220 221 struct dpni_rsp_get_irq_mask { 222 uint32_t mask; 223 }; 224 225 struct dpni_cmd_get_irq_status { 226 uint32_t status; 227 uint8_t irq_index; 228 }; 229 230 struct dpni_rsp_get_irq_status { 231 uint32_t status; 232 }; 233 234 struct dpni_cmd_clear_irq_status { 235 uint32_t status; 236 uint8_t irq_index; 237 }; 238 239 struct dpni_rsp_get_attr { 240 /* response word 0 */ 241 uint32_t options; 242 uint8_t num_queues; 243 uint8_t num_rx_tcs; 244 uint8_t mac_filter_entries; 245 uint8_t num_tx_tcs; 246 /* response word 1 */ 247 uint8_t vlan_filter_entries; 248 uint8_t num_channels; 249 uint8_t qos_entries; 250 uint8_t pad2; 251 uint16_t fs_entries; 252 uint16_t num_opr; 253 /* response word 2 */ 254 uint8_t qos_key_size; 255 uint8_t fs_key_size; 256 uint16_t wriop_version; 257 uint8_t num_cgs; 258 }; 259 260 #define DPNI_ERROR_ACTION_SHIFT 0 261 #define DPNI_ERROR_ACTION_SIZE 4 262 #define DPNI_FRAME_ANN_SHIFT 4 263 #define DPNI_FRAME_ANN_SIZE 1 264 265 struct dpni_cmd_set_errors_behavior { 266 uint32_t errors; 267 /* from least significant bit: error_action:4, set_frame_annotation:1 */ 268 uint8_t flags; 269 }; 270 271 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation 272 * buffer layouts, but they all share the same parameters. 273 * If one of the functions changes, below structure needs to be split. 274 */ 275 276 #define DPNI_PASS_TS_SHIFT 0 277 #define DPNI_PASS_TS_SIZE 1 278 #define DPNI_PASS_PR_SHIFT 1 279 #define DPNI_PASS_PR_SIZE 1 280 #define DPNI_PASS_FS_SHIFT 2 281 #define DPNI_PASS_FS_SIZE 1 282 #define DPNI_PASS_SWO_SHIFT 3 283 #define DPNI_PASS_SWO_SIZE 1 284 285 struct dpni_cmd_get_buffer_layout { 286 uint8_t qtype; 287 }; 288 289 struct dpni_rsp_get_buffer_layout { 290 /* response word 0 */ 291 uint8_t pad0[6]; 292 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 293 uint8_t flags; 294 uint8_t pad1; 295 /* response word 1 */ 296 uint16_t private_data_size; 297 uint16_t data_align; 298 uint16_t head_room; 299 uint16_t tail_room; 300 }; 301 302 struct dpni_cmd_set_buffer_layout { 303 /* cmd word 0 */ 304 uint8_t qtype; 305 uint8_t pad0[3]; 306 uint16_t options; 307 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 308 uint8_t flags; 309 uint8_t pad1; 310 /* cmd word 1 */ 311 uint16_t private_data_size; 312 uint16_t data_align; 313 uint16_t head_room; 314 uint16_t tail_room; 315 }; 316 317 struct dpni_cmd_set_offload { 318 uint8_t pad[3]; 319 uint8_t dpni_offload; 320 uint32_t config; 321 }; 322 323 struct dpni_cmd_get_offload { 324 uint8_t pad[3]; 325 uint8_t dpni_offload; 326 }; 327 328 struct dpni_rsp_get_offload { 329 uint32_t pad; 330 uint32_t config; 331 }; 332 333 struct dpni_cmd_get_qdid { 334 uint8_t qtype; 335 }; 336 337 struct dpni_rsp_get_qdid { 338 uint16_t qdid; 339 }; 340 341 struct dpni_rsp_get_qdid_ex { 342 uint16_t qdid[16]; 343 }; 344 345 struct dpni_rsp_get_sp_info { 346 uint16_t spids[2]; 347 }; 348 349 struct dpni_rsp_get_tx_data_offset { 350 uint16_t data_offset; 351 }; 352 353 struct dpni_cmd_get_statistics { 354 uint8_t page_number; 355 uint16_t param; 356 }; 357 358 struct dpni_rsp_get_statistics { 359 uint64_t counter[7]; 360 }; 361 362 struct dpni_cmd_set_link_cfg { 363 uint64_t pad0; 364 uint32_t rate; 365 uint32_t pad1; 366 uint64_t options; 367 uint64_t advertising; 368 }; 369 370 #define DPNI_LINK_STATE_SHIFT 0 371 #define DPNI_LINK_STATE_SIZE 1 372 #define DPNI_STATE_VALID_SHIFT 1 373 #define DPNI_STATE_VALID_SIZE 1 374 375 struct dpni_rsp_get_link_state { 376 uint32_t pad0; 377 /* from LSB: up:1 */ 378 uint8_t flags; 379 uint8_t pad1[3]; 380 uint32_t rate; 381 uint32_t pad2; 382 uint64_t options; 383 uint64_t supported; 384 uint64_t advertising; 385 }; 386 387 #define DPNI_COUPLED_SHIFT 0 388 #define DPNI_COUPLED_SIZE 1 389 #define DPNI_LNI_SHAPER_SHIFT 1 390 #define DPNI_LNI_SHAPER_SIZE 1 391 392 struct dpni_cmd_set_tx_shaping { 393 uint16_t tx_cr_max_burst_size; 394 uint16_t tx_er_max_burst_size; 395 uint32_t pad; 396 uint32_t tx_cr_rate_limit; 397 uint32_t tx_er_rate_limit; 398 /* from LSB: coupled:1, lni_shaper: 1*/ 399 uint8_t options; 400 uint8_t channel_id; 401 uint16_t oal; 402 }; 403 404 struct dpni_cmd_set_max_frame_length { 405 uint16_t max_frame_length; 406 }; 407 408 struct dpni_rsp_get_max_frame_length { 409 uint16_t max_frame_length; 410 }; 411 412 struct dpni_cmd_set_multicast_promisc { 413 uint8_t enable; 414 }; 415 416 struct dpni_rsp_get_multicast_promisc { 417 uint8_t enabled; 418 }; 419 420 struct dpni_cmd_set_unicast_promisc { 421 uint8_t enable; 422 }; 423 424 struct dpni_rsp_get_unicast_promisc { 425 uint8_t enabled; 426 }; 427 428 struct dpni_cmd_set_primary_mac_addr { 429 uint16_t pad; 430 uint8_t mac_addr[6]; 431 }; 432 433 struct dpni_rsp_get_primary_mac_addr { 434 uint16_t pad; 435 uint8_t mac_addr[6]; 436 }; 437 438 struct dpni_rsp_get_port_mac_addr { 439 uint16_t pad; 440 uint8_t mac_addr[6]; 441 }; 442 443 struct dpni_cmd_add_mac_addr { 444 uint8_t flags; 445 uint8_t pad; 446 uint8_t mac_addr[6]; 447 uint8_t tc_id; 448 uint8_t fq_id; 449 }; 450 451 struct dpni_cmd_remove_mac_addr { 452 uint16_t pad; 453 uint8_t mac_addr[6]; 454 }; 455 456 #define DPNI_UNICAST_FILTERS_SHIFT 0 457 #define DPNI_UNICAST_FILTERS_SIZE 1 458 #define DPNI_MULTICAST_FILTERS_SHIFT 1 459 #define DPNI_MULTICAST_FILTERS_SIZE 1 460 461 struct dpni_cmd_clear_mac_filters { 462 /* from LSB: unicast:1, multicast:1 */ 463 uint8_t flags; 464 }; 465 466 struct dpni_cmd_enable_vlan_filter { 467 /* only the LSB */ 468 uint8_t en; 469 }; 470 471 struct dpni_cmd_vlan_id { 472 uint8_t flags; 473 uint8_t tc_id; 474 uint8_t flow_id; 475 uint8_t pad; 476 uint16_t vlan_id; 477 }; 478 479 #define DPNI_SEPARATE_GRP_SHIFT 0 480 #define DPNI_SEPARATE_GRP_SIZE 1 481 #define DPNI_MODE_1_SHIFT 0 482 #define DPNI_MODE_1_SIZE 4 483 #define DPNI_MODE_2_SHIFT 4 484 #define DPNI_MODE_2_SIZE 4 485 486 struct dpni_cmd_set_tx_priorities { 487 uint16_t flags; 488 uint8_t prio_group_A; 489 uint8_t prio_group_B; 490 uint8_t channel_idx; 491 uint8_t pad0[3]; 492 uint8_t modes[4]; 493 uint32_t pad1; 494 uint64_t pad2; 495 uint16_t delta_bandwidth[8]; 496 }; 497 498 #define DPNI_DIST_MODE_SHIFT 0 499 #define DPNI_DIST_MODE_SIZE 4 500 #define DPNI_MISS_ACTION_SHIFT 4 501 #define DPNI_MISS_ACTION_SIZE 4 502 #define DPNI_KEEP_HASH_KEY_SHIFT 7 503 #define DPNI_KEEP_HASH_KEY_SIZE 1 504 #define DPNI_KEEP_ENTRIES_SHIFT 6 505 #define DPNI_KEEP_ENTRIES_SIZE 1 506 507 struct dpni_cmd_set_rx_tc_dist { 508 uint16_t dist_size; 509 uint8_t tc_id; 510 /* from LSB: dist_mode:4, miss_action:4 */ 511 uint8_t flags; 512 uint8_t pad0; 513 /* only the LSB */ 514 uint8_t keep_hash_key; 515 uint16_t default_flow_id; 516 uint64_t pad1[5]; 517 uint64_t key_cfg_iova; 518 }; 519 520 struct dpni_cmd_get_queue { 521 uint8_t qtype; 522 uint8_t tc; 523 uint8_t index; 524 uint8_t channel_id; 525 }; 526 527 #define DPNI_DEST_TYPE_SHIFT 0 528 #define DPNI_DEST_TYPE_SIZE 4 529 #define DPNI_CGID_VALID_SHIFT 5 530 #define DPNI_CGID_VALID_SIZE 1 531 #define DPNI_STASH_CTRL_SHIFT 6 532 #define DPNI_STASH_CTRL_SIZE 1 533 #define DPNI_HOLD_ACTIVE_SHIFT 7 534 #define DPNI_HOLD_ACTIVE_SIZE 1 535 536 struct dpni_rsp_get_queue { 537 /* response word 0 */ 538 uint64_t pad0; 539 /* response word 1 */ 540 uint32_t dest_id; 541 uint16_t pad1; 542 uint8_t dest_prio; 543 /* From LSB: 544 * dest_type:4, pad:1, cgid_valid:1, flc_stash_ctrl:1, hold_active:1 545 */ 546 uint8_t flags; 547 /* response word 2 */ 548 uint64_t flc; 549 /* response word 3 */ 550 uint64_t user_context; 551 /* response word 4 */ 552 uint32_t fqid; 553 uint16_t qdbin; 554 uint16_t pad2; 555 /* response word 5*/ 556 uint8_t cgid; 557 }; 558 559 struct dpni_cmd_set_queue { 560 /* cmd word 0 */ 561 uint8_t qtype; 562 uint8_t tc; 563 uint8_t index; 564 uint8_t options; 565 uint32_t pad0; 566 /* cmd word 1 */ 567 uint32_t dest_id; 568 uint16_t pad1; 569 uint8_t dest_prio; 570 uint8_t flags; 571 /* cmd word 2 */ 572 uint64_t flc; 573 /* cmd word 3 */ 574 uint64_t user_context; 575 /* cmd word 4 */ 576 uint8_t cgid; 577 uint8_t channel_id; 578 }; 579 580 #define DPNI_DISCARD_ON_MISS_SHIFT 0 581 #define DPNI_DISCARD_ON_MISS_SIZE 1 582 #define DPNI_KEEP_QOS_ENTRIES_SHIFT 1 583 #define DPNI_KEEP_QOS_ENTRIES_SIZE 1 584 585 struct dpni_cmd_set_qos_table { 586 uint32_t pad; 587 uint8_t default_tc; 588 /* only the LSB */ 589 uint8_t discard_on_miss; 590 uint16_t pad1[21]; 591 uint64_t key_cfg_iova; 592 }; 593 594 #define DPNI_QOS_OPT_SET_TC_ONLY 0x0 595 #define DPNI_QOS_OPT_SET_FLOW_ID 0x1 596 597 struct dpni_cmd_add_qos_entry { 598 uint8_t flags; 599 uint8_t flow_id; 600 uint8_t tc_id; 601 uint8_t key_size; 602 uint16_t index; 603 uint16_t pad2; 604 uint64_t key_iova; 605 uint64_t mask_iova; 606 }; 607 608 struct dpni_cmd_remove_qos_entry { 609 uint8_t pad1[3]; 610 uint8_t key_size; 611 uint32_t pad2; 612 uint64_t key_iova; 613 uint64_t mask_iova; 614 }; 615 616 struct dpni_cmd_add_fs_entry { 617 uint16_t options; 618 uint8_t tc_id; 619 uint8_t key_size; 620 uint16_t index; 621 uint16_t flow_id; 622 uint64_t key_iova; 623 uint64_t mask_iova; 624 uint64_t flc; 625 uint16_t redir_token; 626 }; 627 628 struct dpni_cmd_remove_fs_entry { 629 uint16_t pad1; 630 uint8_t tc_id; 631 uint8_t key_size; 632 uint32_t pad2; 633 uint64_t key_iova; 634 uint64_t mask_iova; 635 }; 636 637 struct dpni_cmd_clear_fs_entries { 638 uint16_t pad; 639 uint8_t tc_id; 640 }; 641 642 #define DPNI_MODE_SHIFT 0 643 #define DPNI_MODE_SIZE 4 644 #define DPNI_COLOR_SHIFT 4 645 #define DPNI_COLOR_SIZE 4 646 #define DPNI_UNITS_SHIFT 0 647 #define DPNI_UNITS_SIZE 4 648 649 struct dpni_cmd_set_rx_tc_policing { 650 /* from LSB: mode:4 color:4 */ 651 uint8_t mode_color; 652 /* from LSB: units: 4 */ 653 uint8_t units; 654 uint8_t tc_id; 655 uint8_t pad; 656 uint32_t options; 657 uint32_t cir; 658 uint32_t cbs; 659 uint32_t eir; 660 uint32_t ebs; 661 }; 662 663 struct dpni_cmd_get_rx_tc_policing { 664 uint16_t pad; 665 uint8_t tc_id; 666 }; 667 668 struct dpni_rsp_get_rx_tc_policing { 669 /* from LSB: mode:4 color:4 */ 670 uint8_t mode_color; 671 /* from LSB: units: 4 */ 672 uint8_t units; 673 uint16_t pad; 674 uint32_t options; 675 uint32_t cir; 676 uint32_t cbs; 677 uint32_t eir; 678 uint32_t ebs; 679 }; 680 681 #define DPNI_DROP_ENABLE_SHIFT 0 682 #define DPNI_DROP_ENABLE_SIZE 1 683 #define DPNI_DROP_UNITS_SHIFT 2 684 #define DPNI_DROP_UNITS_SIZE 2 685 686 struct dpni_early_drop { 687 /* from LSB: enable:1 units:2 */ 688 uint8_t flags; 689 uint8_t pad0[3]; 690 uint32_t pad1; 691 uint8_t green_drop_probability; 692 uint8_t pad2[7]; 693 uint64_t green_max_threshold; 694 uint64_t green_min_threshold; 695 uint64_t pad3; 696 uint8_t yellow_drop_probability; 697 uint8_t pad4[7]; 698 uint64_t yellow_max_threshold; 699 uint64_t yellow_min_threshold; 700 uint64_t pad5; 701 uint8_t red_drop_probability; 702 uint8_t pad6[7]; 703 uint64_t red_max_threshold; 704 uint64_t red_min_threshold; 705 }; 706 707 struct dpni_cmd_early_drop { 708 uint8_t qtype; 709 uint8_t tc; 710 uint8_t channel_id; 711 uint8_t pad[5]; 712 uint64_t early_drop_iova; 713 }; 714 715 struct dpni_rsp_get_api_version { 716 uint16_t major; 717 uint16_t minor; 718 }; 719 720 struct dpni_cmd_get_taildrop { 721 uint8_t congestion_point; 722 uint8_t qtype; 723 uint8_t tc; 724 uint8_t index; 725 }; 726 727 struct dpni_rsp_get_taildrop { 728 /* cmd word 0 */ 729 uint64_t pad0; 730 /* cmd word 1 */ 731 /* from LSB: enable:1 oal_lo:7 */ 732 uint8_t enable_oal_lo; 733 /* from LSB: oal_hi:5 */ 734 uint8_t oal_hi; 735 uint8_t units; 736 uint8_t pad2; 737 uint32_t threshold; 738 }; 739 740 #define DPNI_OAL_LO_SHIFT 1 741 #define DPNI_OAL_LO_SIZE 7 742 #define DPNI_OAL_HI_SHIFT 0 743 #define DPNI_OAL_HI_SIZE 5 744 745 struct dpni_cmd_set_taildrop { 746 /* cmd word 0 */ 747 uint8_t congestion_point; 748 uint8_t qtype; 749 uint8_t tc; 750 uint8_t index; 751 uint8_t channel_id; 752 uint8_t pad0[3]; 753 /* cmd word 1 */ 754 /* from LSB: enable:1 oal_lo:7 */ 755 uint8_t enable_oal_lo; 756 /* from LSB: oal_hi:5 */ 757 uint8_t oal_hi; 758 uint8_t units; 759 uint8_t pad2; 760 uint32_t threshold; 761 }; 762 763 struct dpni_tx_confirmation_mode { 764 uint8_t ceetm_ch_idx; 765 uint8_t pad1; 766 uint16_t pad2; 767 uint8_t confirmation_mode; 768 }; 769 770 struct dpni_queue_tx_confirmation_mode { 771 uint8_t ceetm_ch_idx; 772 uint8_t index; 773 uint16_t pad; 774 uint8_t confirmation_mode; 775 }; 776 777 #define DPNI_DEST_TYPE_SHIFT 0 778 #define DPNI_DEST_TYPE_SIZE 4 779 #define DPNI_CONG_UNITS_SHIFT 4 780 #define DPNI_CONG_UNITS_SIZE 2 781 782 struct dpni_cmd_set_congestion_notification { 783 uint8_t qtype; 784 uint8_t tc; 785 uint8_t channel_id; 786 uint8_t congestion_point; 787 uint8_t cgid; 788 uint8_t pad2[3]; 789 uint32_t dest_id; 790 uint16_t notification_mode; 791 uint8_t dest_priority; 792 /* from LSB: dest_type: 4 units:2 */ 793 uint8_t type_units; 794 uint64_t message_iova; 795 uint64_t message_ctx; 796 uint32_t threshold_entry; 797 uint32_t threshold_exit; 798 }; 799 800 struct dpni_cmd_get_congestion_notification { 801 uint8_t qtype; 802 uint8_t tc; 803 uint8_t channel_id; 804 uint8_t congestion_point; 805 uint8_t cgid; 806 }; 807 808 struct dpni_rsp_get_congestion_notification { 809 uint64_t pad; 810 uint32_t dest_id; 811 uint16_t notification_mode; 812 uint8_t dest_priority; 813 /* from LSB: dest_type: 4 units:2 */ 814 uint8_t type_units; 815 uint64_t message_iova; 816 uint64_t message_ctx; 817 uint32_t threshold_entry; 818 uint32_t threshold_exit; 819 }; 820 821 struct dpni_cmd_set_opr { 822 uint8_t opr_id; 823 uint8_t tc_id; 824 uint8_t index; 825 uint8_t options; 826 uint8_t pad1[7]; 827 uint8_t oloe; 828 uint8_t oeane; 829 uint8_t olws; 830 uint8_t oa; 831 uint8_t oprrws; 832 }; 833 834 struct dpni_cmd_get_opr { 835 uint8_t flags; 836 uint8_t tc_id; 837 uint8_t index; 838 uint8_t opr_id; 839 }; 840 841 #define DPNI_RIP_SHIFT 0 842 #define DPNI_RIP_SIZE 1 843 #define DPNI_OPR_ENABLE_SHIFT 1 844 #define DPNI_OPR_ENABLE_SIZE 1 845 #define DPNI_TSEQ_NLIS_SHIFT 0 846 #define DPNI_TSEQ_NLIS_SIZE 1 847 #define DPNI_HSEQ_NLIS_SHIFT 0 848 #define DPNI_HSEQ_NLIS_SIZE 1 849 850 struct dpni_rsp_get_opr { 851 uint64_t pad0; 852 /* from LSB: rip:1 enable:1 */ 853 uint8_t flags; 854 uint16_t pad1; 855 uint8_t oloe; 856 uint8_t oeane; 857 uint8_t olws; 858 uint8_t oa; 859 uint8_t oprrws; 860 uint16_t nesn; 861 uint16_t pad8; 862 uint16_t ndsn; 863 uint16_t pad2; 864 uint16_t ea_tseq; 865 /* only the LSB */ 866 uint8_t tseq_nlis; 867 uint8_t pad3; 868 uint16_t ea_hseq; 869 /* only the LSB */ 870 uint8_t hseq_nlis; 871 uint8_t pad4; 872 uint16_t ea_hptr; 873 uint16_t pad5; 874 uint16_t ea_tptr; 875 uint16_t pad6; 876 uint16_t opr_vid; 877 uint16_t pad7; 878 uint16_t opr_id; 879 }; 880 881 struct dpni_load_sw_sequence { 882 uint8_t dest; 883 uint8_t pad0[7]; 884 uint16_t ss_offset; 885 uint16_t pad1; 886 uint16_t ss_size; 887 uint16_t pad2; 888 uint64_t ss_iova; 889 }; 890 891 struct dpni_enable_sw_sequence { 892 uint8_t dest; 893 uint8_t pad0[7]; 894 uint16_t ss_offset; 895 uint16_t hxs; 896 uint8_t set_start; 897 uint8_t pad1[3]; 898 uint8_t param_offset; 899 uint8_t pad2[3]; 900 uint8_t param_size; 901 uint8_t pad3[3]; 902 uint64_t param_iova; 903 }; 904 905 struct dpni_get_sw_sequence_layout { 906 uint8_t src; 907 uint8_t pad0[7]; 908 uint64_t layout_iova; 909 }; 910 911 struct dpni_sw_sequence_layout_entry { 912 uint16_t ss_offset; 913 uint16_t ss_size; 914 uint8_t param_offset; 915 uint8_t param_size; 916 uint16_t pad; 917 }; 918 919 #define DPNI_RX_FS_DIST_ENABLE_SHIFT 0 920 #define DPNI_RX_FS_DIST_ENABLE_SIZE 1 921 struct dpni_cmd_set_rx_fs_dist { 922 uint16_t dist_size; 923 uint8_t enable; 924 uint8_t tc; 925 uint16_t miss_flow_id; 926 uint16_t pad1; 927 uint64_t key_cfg_iova; 928 }; 929 930 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT 0 931 #define DPNI_RX_HASH_DIST_ENABLE_SIZE 1 932 struct dpni_cmd_set_rx_hash_dist { 933 uint16_t dist_size; 934 uint8_t enable; 935 uint8_t tc_id; 936 uint32_t pad; 937 uint64_t key_cfg_iova; 938 }; 939 940 struct dpni_cmd_add_custom_tpid { 941 uint16_t pad; 942 uint16_t tpid; 943 }; 944 945 struct dpni_cmd_remove_custom_tpid { 946 uint16_t pad; 947 uint16_t tpid; 948 }; 949 950 struct dpni_rsp_get_custom_tpid { 951 uint16_t tpid1; 952 uint16_t tpid2; 953 }; 954 955 #define DPNI_PTP_ENABLE_SHIFT 0 956 #define DPNI_PTP_ENABLE_SIZE 1 957 #define DPNI_PTP_CH_UPDATE_SHIFT 1 958 #define DPNI_PTP_CH_UPDATE_SIZE 1 959 struct dpni_cmd_single_step_cfg { 960 uint16_t flags; 961 uint16_t offset; 962 uint32_t peer_delay; 963 }; 964 965 struct dpni_rsp_single_step_cfg { 966 uint16_t flags; 967 uint16_t offset; 968 uint32_t peer_delay; 969 uint32_t ptp_onestep_reg_base; 970 uint32_t pad0; 971 }; 972 973 #define DPNI_PORT_LOOPBACK_EN_SHIFT 0 974 #define DPNI_PORT_LOOPBACK_EN_SIZE 1 975 976 struct dpni_cmd_set_port_cfg { 977 uint32_t flags; 978 uint32_t bit_params; 979 }; 980 981 struct dpni_rsp_get_port_cfg { 982 uint32_t flags; 983 uint32_t bit_params; 984 }; 985 986 struct dpni_cmd_dump_table { 987 uint16_t table_type; 988 uint16_t table_index; 989 uint32_t pad0; 990 uint64_t iova_addr; 991 uint32_t iova_size; 992 }; 993 994 struct dpni_rsp_dump_table { 995 uint16_t num_entries; 996 }; 997 998 struct dump_table_header { 999 uint16_t table_type; 1000 uint16_t table_num_entries; 1001 uint16_t table_max_entries; 1002 uint8_t default_action; 1003 uint8_t match_type; 1004 uint8_t reserved[24]; 1005 }; 1006 1007 struct dump_table_entry { 1008 uint8_t key[DPNI_MAX_KEY_SIZE]; 1009 uint8_t mask[DPNI_MAX_KEY_SIZE]; 1010 uint8_t key_action; 1011 uint16_t result[3]; 1012 uint8_t reserved[21]; 1013 }; 1014 1015 #define MAX_SP_PROFILE_ID_SIZE 8 1016 1017 struct dpni_cmd_set_sp_profile { 1018 uint8_t sp_profile[MAX_SP_PROFILE_ID_SIZE]; 1019 uint8_t type; 1020 }; 1021 1022 struct dpni_cmd_sp_enable { 1023 uint8_t type; 1024 uint8_t en; 1025 }; 1026 1027 #pragma pack(pop) 1028 #endif /* _FSL_DPNI_CMD_H */ 1029