1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2014-2016 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright 2017-2019 NXP 5 * 6 */ 7 #ifndef __DPAA_ETHDEV_H__ 8 #define __DPAA_ETHDEV_H__ 9 10 /* System headers */ 11 #include <stdbool.h> 12 #include <rte_ethdev_driver.h> 13 #include <rte_event_eth_rx_adapter.h> 14 15 #include <fsl_usd.h> 16 #include <fsl_qman.h> 17 #include <fsl_bman.h> 18 #include <dpaa_of.h> 19 #include <netcfg.h> 20 21 #define MAX_DPAA_CORES 4 22 #define DPAA_MBUF_HW_ANNOTATION 64 23 #define DPAA_FD_PTA_SIZE 64 24 25 /* we will re-use the HEADROOM for annotation in RX */ 26 #define DPAA_HW_BUF_RESERVE 0 27 #define DPAA_PACKET_LAYOUT_ALIGN 64 28 29 /* Alignment to use for cpu-local structs to avoid coherency problems. */ 30 #define MAX_CACHELINE 64 31 32 #define DPAA_MAX_RX_PKT_LEN 10240 33 34 #define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */ 35 36 /* RX queue tail drop threshold (CGR Based) in frame count */ 37 #define CGR_RX_PERFQ_THRESH 256 38 #define CGR_TX_CGR_THRESH 512 39 40 /*max mac filter for memac(8) including primary mac addr*/ 41 #define DPAA_MAX_MAC_FILTER (MEMAC_NUM_OF_PADDRS + 1) 42 43 /*Maximum number of slots available in TX ring*/ 44 #define DPAA_TX_BURST_SIZE 7 45 46 /* Optimal burst size for RX and TX as default */ 47 #define DPAA_DEF_RX_BURST_SIZE 7 48 #define DPAA_DEF_TX_BURST_SIZE DPAA_TX_BURST_SIZE 49 50 #ifndef VLAN_TAG_SIZE 51 #define VLAN_TAG_SIZE 4 /** < Vlan Header Length */ 52 #endif 53 54 /* PCD frame queues */ 55 #define DPAA_DEFAULT_NUM_PCD_QUEUES 1 56 #define DPAA_VSP_PROFILE_MAX_NUM 8 57 #define DPAA_MAX_NUM_PCD_QUEUES DPAA_VSP_PROFILE_MAX_NUM 58 /*Same as VSP profile number*/ 59 60 #define DPAA_IF_TX_PRIORITY 3 61 #define DPAA_IF_RX_PRIORITY 0 62 #define DPAA_IF_DEBUG_PRIORITY 7 63 64 #define DPAA_IF_RX_ANNOTATION_STASH 1 65 #define DPAA_IF_RX_DATA_STASH 1 66 #define DPAA_IF_RX_CONTEXT_STASH 0 67 68 /* Each "debug" FQ is represented by one of these */ 69 #define DPAA_DEBUG_FQ_RX_ERROR 0 70 #define DPAA_DEBUG_FQ_TX_ERROR 1 71 72 #define DPAA_RSS_OFFLOAD_ALL ( \ 73 ETH_RSS_L2_PAYLOAD | \ 74 ETH_RSS_IP | \ 75 ETH_RSS_UDP | \ 76 ETH_RSS_TCP | \ 77 ETH_RSS_SCTP) 78 79 #define DPAA_TX_CKSUM_OFFLOAD_MASK ( \ 80 PKT_TX_IP_CKSUM | \ 81 PKT_TX_TCP_CKSUM | \ 82 PKT_TX_UDP_CKSUM) 83 84 /* DPAA Frame descriptor macros */ 85 86 #define DPAA_FD_CMD_FCO 0x80000000 87 /**< Frame queue Context Override */ 88 #define DPAA_FD_CMD_RPD 0x40000000 89 /**< Read Prepended Data */ 90 #define DPAA_FD_CMD_UPD 0x20000000 91 /**< Update Prepended Data */ 92 #define DPAA_FD_CMD_DTC 0x10000000 93 /**< Do IP/TCP/UDP Checksum */ 94 #define DPAA_FD_CMD_DCL4C 0x10000000 95 /**< Didn't calculate L4 Checksum */ 96 #define DPAA_FD_CMD_CFQ 0x00ffffff 97 /**< Confirmation Frame Queue */ 98 99 #define DPAA_DEFAULT_RXQ_VSP_ID 1 100 101 #define FMC_FILE "/tmp/fmc.bin" 102 103 /* Each network interface is represented by one of these */ 104 struct dpaa_if { 105 int valid; 106 char *name; 107 const struct fm_eth_port_cfg *cfg; 108 struct qman_fq *rx_queues; 109 struct qman_cgr *cgr_rx; 110 struct qman_fq *tx_queues; 111 struct qman_cgr *cgr_tx; 112 struct qman_fq debug_queues[2]; 113 uint16_t nb_rx_queues; 114 uint16_t nb_tx_queues; 115 uint32_t ifid; 116 struct dpaa_bp_info *bp_info; 117 struct rte_eth_fc_conf *fc_conf; 118 void *port_handle; 119 void *netenv_handle; 120 void *scheme_handle[2]; 121 uint32_t scheme_count; 122 123 void *vsp_handle[DPAA_VSP_PROFILE_MAX_NUM]; 124 uint32_t vsp_bpid[DPAA_VSP_PROFILE_MAX_NUM]; 125 }; 126 127 struct dpaa_if_stats { 128 /* Rx Statistics Counter */ 129 uint64_t reoct; /**<Rx Eth Octets Counter */ 130 uint64_t roct; /**<Rx Octet Counters */ 131 uint64_t raln; /**<Rx Alignment Error Counter */ 132 uint64_t rxpf; /**<Rx valid Pause Frame */ 133 uint64_t rfrm; /**<Rx Frame counter */ 134 uint64_t rfcs; /**<Rx frame check seq error */ 135 uint64_t rvlan; /**<Rx Vlan Frame Counter */ 136 uint64_t rerr; /**<Rx Frame error */ 137 uint64_t ruca; /**<Rx Unicast */ 138 uint64_t rmca; /**<Rx Multicast */ 139 uint64_t rbca; /**<Rx Broadcast */ 140 uint64_t rdrp; /**<Rx Dropped Packet */ 141 uint64_t rpkt; /**<Rx packet */ 142 uint64_t rund; /**<Rx undersized packets */ 143 uint32_t res_x[14]; 144 uint64_t rovr; /**<Rx oversized but good */ 145 uint64_t rjbr; /**<Rx oversized with bad csum */ 146 uint64_t rfrg; /**<Rx fragment Packet */ 147 uint64_t rcnp; /**<Rx control packets (0x8808 */ 148 uint64_t rdrntp; /**<Rx dropped due to FIFO overflow */ 149 uint32_t res01d0[12]; 150 /* Tx Statistics Counter */ 151 uint64_t teoct; /**<Tx eth octets */ 152 uint64_t toct; /**<Tx Octets */ 153 uint32_t res0210[2]; 154 uint64_t txpf; /**<Tx valid pause frame */ 155 uint64_t tfrm; /**<Tx frame counter */ 156 uint64_t tfcs; /**<Tx FCS error */ 157 uint64_t tvlan; /**<Tx Vlan Frame */ 158 uint64_t terr; /**<Tx frame error */ 159 uint64_t tuca; /**<Tx Unicast */ 160 uint64_t tmca; /**<Tx Multicast */ 161 uint64_t tbca; /**<Tx Broadcast */ 162 uint32_t res0258[2]; 163 uint64_t tpkt; /**<Tx Packet */ 164 uint64_t tund; /**<Tx Undersized */ 165 }; 166 167 __rte_internal 168 int 169 dpaa_eth_eventq_attach(const struct rte_eth_dev *dev, 170 int eth_rx_queue_id, 171 u16 ch_id, 172 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf); 173 174 __rte_internal 175 int 176 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev, 177 int eth_rx_queue_id); 178 179 enum qman_cb_dqrr_result 180 dpaa_rx_cb_parallel(void *event, 181 struct qman_portal *qm __always_unused, 182 struct qman_fq *fq, 183 const struct qm_dqrr_entry *dqrr, 184 void **bufs); 185 enum qman_cb_dqrr_result 186 dpaa_rx_cb_atomic(void *event, 187 struct qman_portal *qm __always_unused, 188 struct qman_fq *fq, 189 const struct qm_dqrr_entry *dqrr, 190 void **bufs); 191 192 /* PMD related logs */ 193 extern int dpaa_logtype_pmd; 194 195 #define DPAA_PMD_LOG(level, fmt, args...) \ 196 rte_log(RTE_LOG_ ## level, dpaa_logtype_pmd, "%s(): " fmt "\n", \ 197 __func__, ##args) 198 199 #define PMD_INIT_FUNC_TRACE() DPAA_PMD_LOG(DEBUG, " >>") 200 201 #define DPAA_PMD_DEBUG(fmt, args...) \ 202 DPAA_PMD_LOG(DEBUG, fmt, ## args) 203 #define DPAA_PMD_ERR(fmt, args...) \ 204 DPAA_PMD_LOG(ERR, fmt, ## args) 205 #define DPAA_PMD_INFO(fmt, args...) \ 206 DPAA_PMD_LOG(INFO, fmt, ## args) 207 #define DPAA_PMD_WARN(fmt, args...) \ 208 DPAA_PMD_LOG(WARNING, fmt, ## args) 209 210 /* DP Logs, toggled out at compile time if level lower than current level */ 211 #define DPAA_DP_LOG(level, fmt, args...) \ 212 RTE_LOG_DP(level, PMD, fmt, ## args) 213 214 #endif 215