xref: /dpdk/drivers/net/dpaa/dpaa_ethdev.h (revision 68a03efeed657e6e05f281479b33b51102797e15)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  *   Copyright (c) 2014-2016 Freescale Semiconductor, Inc. All rights reserved.
4  *   Copyright 2017-2019 NXP
5  *
6  */
7 #ifndef __DPAA_ETHDEV_H__
8 #define __DPAA_ETHDEV_H__
9 
10 /* System headers */
11 #include <stdbool.h>
12 #include <ethdev_driver.h>
13 #include <rte_event_eth_rx_adapter.h>
14 
15 #include <fsl_usd.h>
16 #include <fsl_qman.h>
17 #include <fsl_bman.h>
18 #include <dpaa_of.h>
19 #include <netcfg.h>
20 
21 #define MAX_DPAA_CORES			4
22 #define DPAA_MBUF_HW_ANNOTATION		64
23 #define DPAA_FD_PTA_SIZE		64
24 
25 /* we will re-use the HEADROOM for annotation in RX */
26 #define DPAA_HW_BUF_RESERVE	0
27 #define DPAA_PACKET_LAYOUT_ALIGN	64
28 
29 /* Alignment to use for cpu-local structs to avoid coherency problems. */
30 #define MAX_CACHELINE			64
31 
32 #define DPAA_MAX_RX_PKT_LEN  10240
33 
34 #define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */
35 
36 /* RX queue tail drop threshold (CGR Based) in frame count */
37 #define CGR_RX_PERFQ_THRESH 256
38 #define CGR_TX_CGR_THRESH 512
39 
40 /*max mac filter for memac(8) including primary mac addr*/
41 #define DPAA_MAX_MAC_FILTER (MEMAC_NUM_OF_PADDRS + 1)
42 
43 /*Maximum number of slots available in TX ring*/
44 #define DPAA_TX_BURST_SIZE	7
45 
46 /* Optimal burst size for RX and TX as default */
47 #define DPAA_DEF_RX_BURST_SIZE 7
48 #define DPAA_DEF_TX_BURST_SIZE DPAA_TX_BURST_SIZE
49 
50 #ifndef VLAN_TAG_SIZE
51 #define VLAN_TAG_SIZE   4 /** < Vlan Header Length */
52 #endif
53 
54 #define DPAA_ETH_MAX_LEN (RTE_ETHER_MTU + \
55 			  RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \
56 			  VLAN_TAG_SIZE)
57 
58 /* PCD frame queues */
59 #define DPAA_DEFAULT_NUM_PCD_QUEUES	1
60 #define DPAA_VSP_PROFILE_MAX_NUM	8
61 #define DPAA_MAX_NUM_PCD_QUEUES	DPAA_VSP_PROFILE_MAX_NUM
62 /*Same as VSP profile number*/
63 
64 #define DPAA_IF_TX_PRIORITY		3
65 #define DPAA_IF_RX_PRIORITY		0
66 #define DPAA_IF_DEBUG_PRIORITY		7
67 
68 #define DPAA_IF_RX_ANNOTATION_STASH	1
69 #define DPAA_IF_RX_DATA_STASH		1
70 #define DPAA_IF_RX_CONTEXT_STASH		0
71 
72 /* Each "debug" FQ is represented by one of these */
73 #define DPAA_DEBUG_FQ_RX_ERROR   0
74 #define DPAA_DEBUG_FQ_TX_ERROR   1
75 
76 #define DPAA_RSS_OFFLOAD_ALL ( \
77 	ETH_RSS_L2_PAYLOAD | \
78 	ETH_RSS_IP | \
79 	ETH_RSS_UDP | \
80 	ETH_RSS_TCP | \
81 	ETH_RSS_SCTP)
82 
83 #define DPAA_TX_CKSUM_OFFLOAD_MASK (             \
84 		PKT_TX_IP_CKSUM |                \
85 		PKT_TX_TCP_CKSUM |               \
86 		PKT_TX_UDP_CKSUM)
87 
88 /* DPAA Frame descriptor macros */
89 
90 #define DPAA_FD_CMD_FCO			0x80000000
91 /**< Frame queue Context Override */
92 #define DPAA_FD_CMD_RPD			0x40000000
93 /**< Read Prepended Data */
94 #define DPAA_FD_CMD_UPD			0x20000000
95 /**< Update Prepended Data */
96 #define DPAA_FD_CMD_DTC			0x10000000
97 /**< Do IP/TCP/UDP Checksum */
98 #define DPAA_FD_CMD_DCL4C		0x10000000
99 /**< Didn't calculate L4 Checksum */
100 #define DPAA_FD_CMD_CFQ			0x00ffffff
101 /**< Confirmation Frame Queue */
102 
103 #define DPAA_DEFAULT_RXQ_VSP_ID		1
104 
105 #define FMC_FILE "/tmp/fmc.bin"
106 
107 /* Each network interface is represented by one of these */
108 struct dpaa_if {
109 	int valid;
110 	char *name;
111 	const struct fm_eth_port_cfg *cfg;
112 	struct qman_fq *rx_queues;
113 	struct qman_cgr *cgr_rx;
114 	struct qman_fq *tx_queues;
115 	struct qman_cgr *cgr_tx;
116 	struct qman_fq debug_queues[2];
117 	uint16_t nb_rx_queues;
118 	uint16_t nb_tx_queues;
119 	uint32_t ifid;
120 	struct dpaa_bp_info *bp_info;
121 	struct rte_eth_fc_conf *fc_conf;
122 	void *port_handle;
123 	void *netenv_handle;
124 	void *scheme_handle[2];
125 	uint32_t scheme_count;
126 
127 	void *vsp_handle[DPAA_VSP_PROFILE_MAX_NUM];
128 	uint32_t vsp_bpid[DPAA_VSP_PROFILE_MAX_NUM];
129 };
130 
131 struct dpaa_if_stats {
132 	/* Rx Statistics Counter */
133 	uint64_t reoct;		/**<Rx Eth Octets Counter */
134 	uint64_t roct;		/**<Rx Octet Counters */
135 	uint64_t raln;		/**<Rx Alignment Error Counter */
136 	uint64_t rxpf;		/**<Rx valid Pause Frame */
137 	uint64_t rfrm;		/**<Rx Frame counter */
138 	uint64_t rfcs;		/**<Rx frame check seq error */
139 	uint64_t rvlan;		/**<Rx Vlan Frame Counter */
140 	uint64_t rerr;		/**<Rx Frame error */
141 	uint64_t ruca;		/**<Rx Unicast */
142 	uint64_t rmca;		/**<Rx Multicast */
143 	uint64_t rbca;		/**<Rx Broadcast */
144 	uint64_t rdrp;		/**<Rx Dropped Packet */
145 	uint64_t rpkt;		/**<Rx packet */
146 	uint64_t rund;		/**<Rx undersized packets */
147 	uint32_t res_x[14];
148 	uint64_t rovr;		/**<Rx oversized but good */
149 	uint64_t rjbr;		/**<Rx oversized with bad csum */
150 	uint64_t rfrg;		/**<Rx fragment Packet */
151 	uint64_t rcnp;		/**<Rx control packets (0x8808 */
152 	uint64_t rdrntp;	/**<Rx dropped due to FIFO overflow */
153 	uint32_t res01d0[12];
154 	/* Tx Statistics Counter */
155 	uint64_t teoct;		/**<Tx eth octets */
156 	uint64_t toct;		/**<Tx Octets */
157 	uint32_t res0210[2];
158 	uint64_t txpf;		/**<Tx valid pause frame */
159 	uint64_t tfrm;		/**<Tx frame counter */
160 	uint64_t tfcs;		/**<Tx FCS error */
161 	uint64_t tvlan;		/**<Tx Vlan Frame */
162 	uint64_t terr;		/**<Tx frame error */
163 	uint64_t tuca;		/**<Tx Unicast */
164 	uint64_t tmca;		/**<Tx Multicast */
165 	uint64_t tbca;		/**<Tx Broadcast */
166 	uint32_t res0258[2];
167 	uint64_t tpkt;		/**<Tx Packet */
168 	uint64_t tund;		/**<Tx Undersized */
169 };
170 
171 __rte_internal
172 int
173 dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
174 		int eth_rx_queue_id,
175 		u16 ch_id,
176 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
177 
178 __rte_internal
179 int
180 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
181 			   int eth_rx_queue_id);
182 
183 enum qman_cb_dqrr_result
184 dpaa_rx_cb_parallel(void *event,
185 		    struct qman_portal *qm __always_unused,
186 		    struct qman_fq *fq,
187 		    const struct qm_dqrr_entry *dqrr,
188 		    void **bufs);
189 enum qman_cb_dqrr_result
190 dpaa_rx_cb_atomic(void *event,
191 		  struct qman_portal *qm __always_unused,
192 		  struct qman_fq *fq,
193 		  const struct qm_dqrr_entry *dqrr,
194 		  void **bufs);
195 
196 /* PMD related logs */
197 extern int dpaa_logtype_pmd;
198 
199 #define DPAA_PMD_LOG(level, fmt, args...) \
200 	rte_log(RTE_LOG_ ## level, dpaa_logtype_pmd, "%s(): " fmt "\n", \
201 		__func__, ##args)
202 
203 #define PMD_INIT_FUNC_TRACE() DPAA_PMD_LOG(DEBUG, " >>")
204 
205 #define DPAA_PMD_DEBUG(fmt, args...) \
206 	DPAA_PMD_LOG(DEBUG, fmt, ## args)
207 #define DPAA_PMD_ERR(fmt, args...) \
208 	DPAA_PMD_LOG(ERR, fmt, ## args)
209 #define DPAA_PMD_INFO(fmt, args...) \
210 	DPAA_PMD_LOG(INFO, fmt, ## args)
211 #define DPAA_PMD_WARN(fmt, args...) \
212 	DPAA_PMD_LOG(WARNING, fmt, ## args)
213 
214 /* DP Logs, toggled out at compile time if level lower than current level */
215 #define DPAA_DP_LOG(level, fmt, args...) \
216 	RTE_LOG_DP(level, PMD, fmt, ## args)
217 
218 #endif
219