xref: /dpdk/drivers/net/dpaa/dpaa_ethdev.h (revision 10b71caecbe1cddcbb65c050ca775fba575e88db)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  *   Copyright (c) 2014-2016 Freescale Semiconductor, Inc. All rights reserved.
4  *   Copyright 2017-2019 NXP
5  *
6  */
7 #ifndef __DPAA_ETHDEV_H__
8 #define __DPAA_ETHDEV_H__
9 
10 /* System headers */
11 #include <stdbool.h>
12 #include <rte_ethdev_driver.h>
13 #include <rte_event_eth_rx_adapter.h>
14 
15 #include <fsl_usd.h>
16 #include <fsl_qman.h>
17 #include <fsl_bman.h>
18 #include <dpaa_of.h>
19 #include <netcfg.h>
20 
21 #define MAX_DPAA_CORES			4
22 #define DPAA_MBUF_HW_ANNOTATION		64
23 #define DPAA_FD_PTA_SIZE		64
24 
25 /* mbuf->seqn will be used to store event entry index for
26  * driver specific usage. For parallel mode queues, invalid
27  * index will be set and for atomic mode queues, valid value
28  * ranging from 1 to 16.
29  */
30 #define DPAA_INVALID_MBUF_SEQN  0
31 
32 /* we will re-use the HEADROOM for annotation in RX */
33 #define DPAA_HW_BUF_RESERVE	0
34 #define DPAA_PACKET_LAYOUT_ALIGN	64
35 
36 /* Alignment to use for cpu-local structs to avoid coherency problems. */
37 #define MAX_CACHELINE			64
38 
39 #define DPAA_MAX_RX_PKT_LEN  10240
40 
41 #define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */
42 
43 /* RX queue tail drop threshold (CGR Based) in frame count */
44 #define CGR_RX_PERFQ_THRESH 256
45 #define CGR_TX_CGR_THRESH 512
46 
47 /*max mac filter for memac(8) including primary mac addr*/
48 #define DPAA_MAX_MAC_FILTER (MEMAC_NUM_OF_PADDRS + 1)
49 
50 /*Maximum number of slots available in TX ring*/
51 #define DPAA_TX_BURST_SIZE	7
52 
53 /* Optimal burst size for RX and TX as default */
54 #define DPAA_DEF_RX_BURST_SIZE 7
55 #define DPAA_DEF_TX_BURST_SIZE DPAA_TX_BURST_SIZE
56 
57 #ifndef VLAN_TAG_SIZE
58 #define VLAN_TAG_SIZE   4 /** < Vlan Header Length */
59 #endif
60 
61 /* PCD frame queues */
62 #define DPAA_PCD_FQID_START		0x400
63 #define DPAA_PCD_FQID_MULTIPLIER	0x100
64 #define DPAA_DEFAULT_NUM_PCD_QUEUES	1
65 #define DPAA_MAX_NUM_PCD_QUEUES		4
66 
67 #define DPAA_IF_TX_PRIORITY		3
68 #define DPAA_IF_RX_PRIORITY		0
69 #define DPAA_IF_DEBUG_PRIORITY		7
70 
71 #define DPAA_IF_RX_ANNOTATION_STASH	1
72 #define DPAA_IF_RX_DATA_STASH		1
73 #define DPAA_IF_RX_CONTEXT_STASH		0
74 
75 /* Each "debug" FQ is represented by one of these */
76 #define DPAA_DEBUG_FQ_RX_ERROR   0
77 #define DPAA_DEBUG_FQ_TX_ERROR   1
78 
79 #define DPAA_RSS_OFFLOAD_ALL ( \
80 	ETH_RSS_L2_PAYLOAD | \
81 	ETH_RSS_IP | \
82 	ETH_RSS_UDP | \
83 	ETH_RSS_TCP | \
84 	ETH_RSS_SCTP)
85 
86 #define DPAA_TX_CKSUM_OFFLOAD_MASK (             \
87 		PKT_TX_IP_CKSUM |                \
88 		PKT_TX_TCP_CKSUM |               \
89 		PKT_TX_UDP_CKSUM)
90 
91 /* DPAA Frame descriptor macros */
92 
93 #define DPAA_FD_CMD_FCO			0x80000000
94 /**< Frame queue Context Override */
95 #define DPAA_FD_CMD_RPD			0x40000000
96 /**< Read Prepended Data */
97 #define DPAA_FD_CMD_UPD			0x20000000
98 /**< Update Prepended Data */
99 #define DPAA_FD_CMD_DTC			0x10000000
100 /**< Do IP/TCP/UDP Checksum */
101 #define DPAA_FD_CMD_DCL4C		0x10000000
102 /**< Didn't calculate L4 Checksum */
103 #define DPAA_FD_CMD_CFQ			0x00ffffff
104 /**< Confirmation Frame Queue */
105 
106 /* Each network interface is represented by one of these */
107 struct dpaa_if {
108 	int valid;
109 	char *name;
110 	const struct fm_eth_port_cfg *cfg;
111 	struct qman_fq *rx_queues;
112 	struct qman_cgr *cgr_rx;
113 	struct qman_fq *tx_queues;
114 	struct qman_cgr *cgr_tx;
115 	struct qman_fq debug_queues[2];
116 	uint16_t nb_rx_queues;
117 	uint16_t nb_tx_queues;
118 	uint32_t ifid;
119 	struct dpaa_bp_info *bp_info;
120 	struct rte_eth_fc_conf *fc_conf;
121 };
122 
123 struct dpaa_if_stats {
124 	/* Rx Statistics Counter */
125 	uint64_t reoct;		/**<Rx Eth Octets Counter */
126 	uint64_t roct;		/**<Rx Octet Counters */
127 	uint64_t raln;		/**<Rx Alignment Error Counter */
128 	uint64_t rxpf;		/**<Rx valid Pause Frame */
129 	uint64_t rfrm;		/**<Rx Frame counter */
130 	uint64_t rfcs;		/**<Rx frame check seq error */
131 	uint64_t rvlan;		/**<Rx Vlan Frame Counter */
132 	uint64_t rerr;		/**<Rx Frame error */
133 	uint64_t ruca;		/**<Rx Unicast */
134 	uint64_t rmca;		/**<Rx Multicast */
135 	uint64_t rbca;		/**<Rx Broadcast */
136 	uint64_t rdrp;		/**<Rx Dropped Packet */
137 	uint64_t rpkt;		/**<Rx packet */
138 	uint64_t rund;		/**<Rx undersized packets */
139 	uint32_t res_x[14];
140 	uint64_t rovr;		/**<Rx oversized but good */
141 	uint64_t rjbr;		/**<Rx oversized with bad csum */
142 	uint64_t rfrg;		/**<Rx fragment Packet */
143 	uint64_t rcnp;		/**<Rx control packets (0x8808 */
144 	uint64_t rdrntp;	/**<Rx dropped due to FIFO overflow */
145 	uint32_t res01d0[12];
146 	/* Tx Statistics Counter */
147 	uint64_t teoct;		/**<Tx eth octets */
148 	uint64_t toct;		/**<Tx Octets */
149 	uint32_t res0210[2];
150 	uint64_t txpf;		/**<Tx valid pause frame */
151 	uint64_t tfrm;		/**<Tx frame counter */
152 	uint64_t tfcs;		/**<Tx FCS error */
153 	uint64_t tvlan;		/**<Tx Vlan Frame */
154 	uint64_t terr;		/**<Tx frame error */
155 	uint64_t tuca;		/**<Tx Unicast */
156 	uint64_t tmca;		/**<Tx Multicast */
157 	uint64_t tbca;		/**<Tx Broadcast */
158 	uint32_t res0258[2];
159 	uint64_t tpkt;		/**<Tx Packet */
160 	uint64_t tund;		/**<Tx Undersized */
161 };
162 
163 __rte_internal
164 int
165 dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
166 		int eth_rx_queue_id,
167 		u16 ch_id,
168 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
169 
170 __rte_internal
171 int
172 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
173 			   int eth_rx_queue_id);
174 
175 enum qman_cb_dqrr_result
176 dpaa_rx_cb_parallel(void *event,
177 		    struct qman_portal *qm __always_unused,
178 		    struct qman_fq *fq,
179 		    const struct qm_dqrr_entry *dqrr,
180 		    void **bufs);
181 enum qman_cb_dqrr_result
182 dpaa_rx_cb_atomic(void *event,
183 		  struct qman_portal *qm __always_unused,
184 		  struct qman_fq *fq,
185 		  const struct qm_dqrr_entry *dqrr,
186 		  void **bufs);
187 
188 /* PMD related logs */
189 extern int dpaa_logtype_pmd;
190 
191 #define DPAA_PMD_LOG(level, fmt, args...) \
192 	rte_log(RTE_LOG_ ## level, dpaa_logtype_pmd, "%s(): " fmt "\n", \
193 		__func__, ##args)
194 
195 #define PMD_INIT_FUNC_TRACE() DPAA_PMD_LOG(DEBUG, " >>")
196 
197 #define DPAA_PMD_DEBUG(fmt, args...) \
198 	DPAA_PMD_LOG(DEBUG, fmt, ## args)
199 #define DPAA_PMD_ERR(fmt, args...) \
200 	DPAA_PMD_LOG(ERR, fmt, ## args)
201 #define DPAA_PMD_INFO(fmt, args...) \
202 	DPAA_PMD_LOG(INFO, fmt, ## args)
203 #define DPAA_PMD_WARN(fmt, args...) \
204 	DPAA_PMD_LOG(WARNING, fmt, ## args)
205 
206 /* DP Logs, toggled out at compile time if level lower than current level */
207 #define DPAA_DP_LOG(level, fmt, args...) \
208 	RTE_LOG_DP(level, PMD, fmt, ## args)
209 
210 #endif
211