1 /*- 2 * BSD LICENSE 3 * 4 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 5 * Copyright 2017 NXP. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 /* System headers */ 34 #include <stdio.h> 35 #include <inttypes.h> 36 #include <unistd.h> 37 #include <limits.h> 38 #include <sched.h> 39 #include <signal.h> 40 #include <pthread.h> 41 #include <sys/types.h> 42 #include <sys/syscall.h> 43 44 #include <rte_config.h> 45 #include <rte_byteorder.h> 46 #include <rte_common.h> 47 #include <rte_interrupts.h> 48 #include <rte_log.h> 49 #include <rte_debug.h> 50 #include <rte_pci.h> 51 #include <rte_atomic.h> 52 #include <rte_branch_prediction.h> 53 #include <rte_memory.h> 54 #include <rte_memzone.h> 55 #include <rte_tailq.h> 56 #include <rte_eal.h> 57 #include <rte_alarm.h> 58 #include <rte_ether.h> 59 #include <rte_ethdev.h> 60 #include <rte_malloc.h> 61 #include <rte_ring.h> 62 63 #include <rte_dpaa_bus.h> 64 #include <rte_dpaa_logs.h> 65 #include <dpaa_mempool.h> 66 67 #include <dpaa_ethdev.h> 68 #include <dpaa_rxtx.h> 69 70 #include <fsl_usd.h> 71 #include <fsl_qman.h> 72 #include <fsl_bman.h> 73 #include <fsl_fman.h> 74 75 /* Keep track of whether QMAN and BMAN have been globally initialized */ 76 static int is_global_init; 77 78 struct rte_dpaa_xstats_name_off { 79 char name[RTE_ETH_XSTATS_NAME_SIZE]; 80 uint32_t offset; 81 }; 82 83 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = { 84 {"rx_align_err", 85 offsetof(struct dpaa_if_stats, raln)}, 86 {"rx_valid_pause", 87 offsetof(struct dpaa_if_stats, rxpf)}, 88 {"rx_fcs_err", 89 offsetof(struct dpaa_if_stats, rfcs)}, 90 {"rx_vlan_frame", 91 offsetof(struct dpaa_if_stats, rvlan)}, 92 {"rx_frame_err", 93 offsetof(struct dpaa_if_stats, rerr)}, 94 {"rx_drop_err", 95 offsetof(struct dpaa_if_stats, rdrp)}, 96 {"rx_undersized", 97 offsetof(struct dpaa_if_stats, rund)}, 98 {"rx_oversize_err", 99 offsetof(struct dpaa_if_stats, rovr)}, 100 {"rx_fragment_pkt", 101 offsetof(struct dpaa_if_stats, rfrg)}, 102 {"tx_valid_pause", 103 offsetof(struct dpaa_if_stats, txpf)}, 104 {"tx_fcs_err", 105 offsetof(struct dpaa_if_stats, terr)}, 106 {"tx_vlan_frame", 107 offsetof(struct dpaa_if_stats, tvlan)}, 108 {"rx_undersized", 109 offsetof(struct dpaa_if_stats, tund)}, 110 }; 111 112 static int 113 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 114 { 115 struct dpaa_if *dpaa_intf = dev->data->dev_private; 116 117 PMD_INIT_FUNC_TRACE(); 118 119 if (mtu < ETHER_MIN_MTU) 120 return -EINVAL; 121 if (mtu > ETHER_MAX_LEN) 122 dev->data->dev_conf.rxmode.jumbo_frame = 1; 123 else 124 dev->data->dev_conf.rxmode.jumbo_frame = 0; 125 126 dev->data->dev_conf.rxmode.max_rx_pkt_len = mtu; 127 128 fman_if_set_maxfrm(dpaa_intf->fif, mtu); 129 130 return 0; 131 } 132 133 static int 134 dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused) 135 { 136 PMD_INIT_FUNC_TRACE(); 137 138 if (dev->data->dev_conf.rxmode.jumbo_frame == 1) { 139 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= 140 DPAA_MAX_RX_PKT_LEN) 141 return dpaa_mtu_set(dev, 142 dev->data->dev_conf.rxmode.max_rx_pkt_len); 143 else 144 return -1; 145 } 146 return 0; 147 } 148 149 static const uint32_t * 150 dpaa_supported_ptypes_get(struct rte_eth_dev *dev) 151 { 152 static const uint32_t ptypes[] = { 153 /*todo -= add more types */ 154 RTE_PTYPE_L2_ETHER, 155 RTE_PTYPE_L3_IPV4, 156 RTE_PTYPE_L3_IPV4_EXT, 157 RTE_PTYPE_L3_IPV6, 158 RTE_PTYPE_L3_IPV6_EXT, 159 RTE_PTYPE_L4_TCP, 160 RTE_PTYPE_L4_UDP, 161 RTE_PTYPE_L4_SCTP 162 }; 163 164 PMD_INIT_FUNC_TRACE(); 165 166 if (dev->rx_pkt_burst == dpaa_eth_queue_rx) 167 return ptypes; 168 return NULL; 169 } 170 171 static int dpaa_eth_dev_start(struct rte_eth_dev *dev) 172 { 173 struct dpaa_if *dpaa_intf = dev->data->dev_private; 174 175 PMD_INIT_FUNC_TRACE(); 176 177 /* Change tx callback to the real one */ 178 dev->tx_pkt_burst = dpaa_eth_queue_tx; 179 fman_if_enable_rx(dpaa_intf->fif); 180 181 return 0; 182 } 183 184 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev) 185 { 186 struct dpaa_if *dpaa_intf = dev->data->dev_private; 187 188 PMD_INIT_FUNC_TRACE(); 189 190 fman_if_disable_rx(dpaa_intf->fif); 191 dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 192 } 193 194 static void dpaa_eth_dev_close(struct rte_eth_dev *dev) 195 { 196 PMD_INIT_FUNC_TRACE(); 197 198 dpaa_eth_dev_stop(dev); 199 } 200 201 static int 202 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused, 203 char *fw_version, 204 size_t fw_size) 205 { 206 int ret; 207 FILE *svr_file = NULL; 208 unsigned int svr_ver = 0; 209 210 PMD_INIT_FUNC_TRACE(); 211 212 svr_file = fopen(DPAA_SOC_ID_FILE, "r"); 213 if (!svr_file) { 214 DPAA_PMD_ERR("Unable to open SoC device"); 215 return -ENOTSUP; /* Not supported on this infra */ 216 } 217 218 ret = fscanf(svr_file, "svr:%x", &svr_ver); 219 if (ret <= 0) { 220 DPAA_PMD_ERR("Unable to read SoC device"); 221 return -ENOTSUP; /* Not supported on this infra */ 222 } 223 224 ret = snprintf(fw_version, fw_size, 225 "svr:%x-fman-v%x", 226 svr_ver, 227 fman_ip_rev); 228 229 ret += 1; /* add the size of '\0' */ 230 if (fw_size < (uint32_t)ret) 231 return ret; 232 else 233 return 0; 234 } 235 236 static void dpaa_eth_dev_info(struct rte_eth_dev *dev, 237 struct rte_eth_dev_info *dev_info) 238 { 239 struct dpaa_if *dpaa_intf = dev->data->dev_private; 240 241 PMD_INIT_FUNC_TRACE(); 242 243 dev_info->max_rx_queues = dpaa_intf->nb_rx_queues; 244 dev_info->max_tx_queues = dpaa_intf->nb_tx_queues; 245 dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE; 246 dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN; 247 dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER; 248 dev_info->max_hash_mac_addrs = 0; 249 dev_info->max_vfs = 0; 250 dev_info->max_vmdq_pools = ETH_16_POOLS; 251 dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL; 252 dev_info->speed_capa = (ETH_LINK_SPEED_1G | 253 ETH_LINK_SPEED_10G); 254 dev_info->rx_offload_capa = 255 (DEV_RX_OFFLOAD_IPV4_CKSUM | 256 DEV_RX_OFFLOAD_UDP_CKSUM | 257 DEV_RX_OFFLOAD_TCP_CKSUM); 258 dev_info->tx_offload_capa = 259 (DEV_TX_OFFLOAD_IPV4_CKSUM | 260 DEV_TX_OFFLOAD_UDP_CKSUM | 261 DEV_TX_OFFLOAD_TCP_CKSUM); 262 } 263 264 static int dpaa_eth_link_update(struct rte_eth_dev *dev, 265 int wait_to_complete __rte_unused) 266 { 267 struct dpaa_if *dpaa_intf = dev->data->dev_private; 268 struct rte_eth_link *link = &dev->data->dev_link; 269 270 PMD_INIT_FUNC_TRACE(); 271 272 if (dpaa_intf->fif->mac_type == fman_mac_1g) 273 link->link_speed = 1000; 274 else if (dpaa_intf->fif->mac_type == fman_mac_10g) 275 link->link_speed = 10000; 276 else 277 DPAA_PMD_ERR("invalid link_speed: %s, %d", 278 dpaa_intf->name, dpaa_intf->fif->mac_type); 279 280 link->link_status = dpaa_intf->valid; 281 link->link_duplex = ETH_LINK_FULL_DUPLEX; 282 link->link_autoneg = ETH_LINK_AUTONEG; 283 return 0; 284 } 285 286 static int dpaa_eth_stats_get(struct rte_eth_dev *dev, 287 struct rte_eth_stats *stats) 288 { 289 struct dpaa_if *dpaa_intf = dev->data->dev_private; 290 291 PMD_INIT_FUNC_TRACE(); 292 293 fman_if_stats_get(dpaa_intf->fif, stats); 294 return 0; 295 } 296 297 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev) 298 { 299 struct dpaa_if *dpaa_intf = dev->data->dev_private; 300 301 PMD_INIT_FUNC_TRACE(); 302 303 fman_if_stats_reset(dpaa_intf->fif); 304 } 305 306 static int 307 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 308 unsigned int n) 309 { 310 struct dpaa_if *dpaa_intf = dev->data->dev_private; 311 unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings); 312 uint64_t values[sizeof(struct dpaa_if_stats) / 8]; 313 314 if (xstats == NULL) 315 return 0; 316 317 if (n < num) 318 return num; 319 320 fman_if_stats_get_all(dpaa_intf->fif, values, 321 sizeof(struct dpaa_if_stats) / 8); 322 323 for (i = 0; i < num; i++) { 324 xstats[i].id = i; 325 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8]; 326 } 327 return i; 328 } 329 330 static int 331 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 332 struct rte_eth_xstat_name *xstats_names, 333 __rte_unused unsigned int limit) 334 { 335 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 336 337 if (xstats_names != NULL) 338 for (i = 0; i < stat_cnt; i++) 339 snprintf(xstats_names[i].name, 340 sizeof(xstats_names[i].name), 341 "%s", 342 dpaa_xstats_strings[i].name); 343 344 return stat_cnt; 345 } 346 347 static int 348 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 349 uint64_t *values, unsigned int n) 350 { 351 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 352 uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8]; 353 354 if (!ids) { 355 struct dpaa_if *dpaa_intf = dev->data->dev_private; 356 357 if (n < stat_cnt) 358 return stat_cnt; 359 360 if (!values) 361 return 0; 362 363 fman_if_stats_get_all(dpaa_intf->fif, values_copy, 364 sizeof(struct dpaa_if_stats)); 365 366 for (i = 0; i < stat_cnt; i++) 367 values[i] = 368 values_copy[dpaa_xstats_strings[i].offset / 8]; 369 370 return stat_cnt; 371 } 372 373 dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt); 374 375 for (i = 0; i < n; i++) { 376 if (ids[i] >= stat_cnt) { 377 DPAA_PMD_ERR("id value isn't valid"); 378 return -1; 379 } 380 values[i] = values_copy[ids[i]]; 381 } 382 return n; 383 } 384 385 static int 386 dpaa_xstats_get_names_by_id( 387 struct rte_eth_dev *dev, 388 struct rte_eth_xstat_name *xstats_names, 389 const uint64_t *ids, 390 unsigned int limit) 391 { 392 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 393 struct rte_eth_xstat_name xstats_names_copy[stat_cnt]; 394 395 if (!ids) 396 return dpaa_xstats_get_names(dev, xstats_names, limit); 397 398 dpaa_xstats_get_names(dev, xstats_names_copy, limit); 399 400 for (i = 0; i < limit; i++) { 401 if (ids[i] >= stat_cnt) { 402 DPAA_PMD_ERR("id value isn't valid"); 403 return -1; 404 } 405 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 406 } 407 return limit; 408 } 409 410 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev) 411 { 412 struct dpaa_if *dpaa_intf = dev->data->dev_private; 413 414 PMD_INIT_FUNC_TRACE(); 415 416 fman_if_promiscuous_enable(dpaa_intf->fif); 417 } 418 419 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev) 420 { 421 struct dpaa_if *dpaa_intf = dev->data->dev_private; 422 423 PMD_INIT_FUNC_TRACE(); 424 425 fman_if_promiscuous_disable(dpaa_intf->fif); 426 } 427 428 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev) 429 { 430 struct dpaa_if *dpaa_intf = dev->data->dev_private; 431 432 PMD_INIT_FUNC_TRACE(); 433 434 fman_if_set_mcast_filter_table(dpaa_intf->fif); 435 } 436 437 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev) 438 { 439 struct dpaa_if *dpaa_intf = dev->data->dev_private; 440 441 PMD_INIT_FUNC_TRACE(); 442 443 fman_if_reset_mcast_filter_table(dpaa_intf->fif); 444 } 445 446 static 447 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 448 uint16_t nb_desc __rte_unused, 449 unsigned int socket_id __rte_unused, 450 const struct rte_eth_rxconf *rx_conf __rte_unused, 451 struct rte_mempool *mp) 452 { 453 struct dpaa_if *dpaa_intf = dev->data->dev_private; 454 455 PMD_INIT_FUNC_TRACE(); 456 457 DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx); 458 459 if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) { 460 struct fman_if_ic_params icp; 461 uint32_t fd_offset; 462 uint32_t bp_size; 463 464 if (!mp->pool_data) { 465 DPAA_PMD_ERR("Not an offloaded buffer pool!"); 466 return -1; 467 } 468 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 469 470 memset(&icp, 0, sizeof(icp)); 471 /* set ICEOF for to the default value , which is 0*/ 472 icp.iciof = DEFAULT_ICIOF; 473 icp.iceof = DEFAULT_RX_ICEOF; 474 icp.icsz = DEFAULT_ICSZ; 475 fman_if_set_ic_params(dpaa_intf->fif, &icp); 476 477 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE; 478 fman_if_set_fdoff(dpaa_intf->fif, fd_offset); 479 480 /* Buffer pool size should be equal to Dataroom Size*/ 481 bp_size = rte_pktmbuf_data_room_size(mp); 482 fman_if_set_bp(dpaa_intf->fif, mp->size, 483 dpaa_intf->bp_info->bpid, bp_size); 484 dpaa_intf->valid = 1; 485 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d", 486 dpaa_intf->name, fd_offset, 487 fman_if_get_fdoff(dpaa_intf->fif)); 488 } 489 dev->data->rx_queues[queue_idx] = &dpaa_intf->rx_queues[queue_idx]; 490 491 return 0; 492 } 493 494 static 495 void dpaa_eth_rx_queue_release(void *rxq __rte_unused) 496 { 497 PMD_INIT_FUNC_TRACE(); 498 } 499 500 static 501 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 502 uint16_t nb_desc __rte_unused, 503 unsigned int socket_id __rte_unused, 504 const struct rte_eth_txconf *tx_conf __rte_unused) 505 { 506 struct dpaa_if *dpaa_intf = dev->data->dev_private; 507 508 PMD_INIT_FUNC_TRACE(); 509 510 DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx); 511 dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx]; 512 return 0; 513 } 514 515 static void dpaa_eth_tx_queue_release(void *txq __rte_unused) 516 { 517 PMD_INIT_FUNC_TRACE(); 518 } 519 520 static int dpaa_link_down(struct rte_eth_dev *dev) 521 { 522 PMD_INIT_FUNC_TRACE(); 523 524 dpaa_eth_dev_stop(dev); 525 return 0; 526 } 527 528 static int dpaa_link_up(struct rte_eth_dev *dev) 529 { 530 PMD_INIT_FUNC_TRACE(); 531 532 dpaa_eth_dev_start(dev); 533 return 0; 534 } 535 536 static int 537 dpaa_flow_ctrl_set(struct rte_eth_dev *dev, 538 struct rte_eth_fc_conf *fc_conf) 539 { 540 struct dpaa_if *dpaa_intf = dev->data->dev_private; 541 struct rte_eth_fc_conf *net_fc; 542 543 PMD_INIT_FUNC_TRACE(); 544 545 if (!(dpaa_intf->fc_conf)) { 546 dpaa_intf->fc_conf = rte_zmalloc(NULL, 547 sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 548 if (!dpaa_intf->fc_conf) { 549 DPAA_PMD_ERR("unable to save flow control info"); 550 return -ENOMEM; 551 } 552 } 553 net_fc = dpaa_intf->fc_conf; 554 555 if (fc_conf->high_water < fc_conf->low_water) { 556 DPAA_PMD_ERR("Incorrect Flow Control Configuration"); 557 return -EINVAL; 558 } 559 560 if (fc_conf->mode == RTE_FC_NONE) { 561 return 0; 562 } else if (fc_conf->mode == RTE_FC_TX_PAUSE || 563 fc_conf->mode == RTE_FC_FULL) { 564 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water, 565 fc_conf->low_water, 566 dpaa_intf->bp_info->bpid); 567 if (fc_conf->pause_time) 568 fman_if_set_fc_quanta(dpaa_intf->fif, 569 fc_conf->pause_time); 570 } 571 572 /* Save the information in dpaa device */ 573 net_fc->pause_time = fc_conf->pause_time; 574 net_fc->high_water = fc_conf->high_water; 575 net_fc->low_water = fc_conf->low_water; 576 net_fc->send_xon = fc_conf->send_xon; 577 net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd; 578 net_fc->mode = fc_conf->mode; 579 net_fc->autoneg = fc_conf->autoneg; 580 581 return 0; 582 } 583 584 static int 585 dpaa_flow_ctrl_get(struct rte_eth_dev *dev, 586 struct rte_eth_fc_conf *fc_conf) 587 { 588 struct dpaa_if *dpaa_intf = dev->data->dev_private; 589 struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf; 590 int ret; 591 592 PMD_INIT_FUNC_TRACE(); 593 594 if (net_fc) { 595 fc_conf->pause_time = net_fc->pause_time; 596 fc_conf->high_water = net_fc->high_water; 597 fc_conf->low_water = net_fc->low_water; 598 fc_conf->send_xon = net_fc->send_xon; 599 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd; 600 fc_conf->mode = net_fc->mode; 601 fc_conf->autoneg = net_fc->autoneg; 602 return 0; 603 } 604 ret = fman_if_get_fc_threshold(dpaa_intf->fif); 605 if (ret) { 606 fc_conf->mode = RTE_FC_TX_PAUSE; 607 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 608 } else { 609 fc_conf->mode = RTE_FC_NONE; 610 } 611 612 return 0; 613 } 614 615 static int 616 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev, 617 struct ether_addr *addr, 618 uint32_t index, 619 __rte_unused uint32_t pool) 620 { 621 int ret; 622 struct dpaa_if *dpaa_intf = dev->data->dev_private; 623 624 PMD_INIT_FUNC_TRACE(); 625 626 ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index); 627 628 if (ret) 629 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:" 630 " err = %d", ret); 631 return 0; 632 } 633 634 static void 635 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev, 636 uint32_t index) 637 { 638 struct dpaa_if *dpaa_intf = dev->data->dev_private; 639 640 PMD_INIT_FUNC_TRACE(); 641 642 fman_if_clear_mac_addr(dpaa_intf->fif, index); 643 } 644 645 static void 646 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev, 647 struct ether_addr *addr) 648 { 649 int ret; 650 struct dpaa_if *dpaa_intf = dev->data->dev_private; 651 652 PMD_INIT_FUNC_TRACE(); 653 654 ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0); 655 if (ret) 656 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret); 657 } 658 659 static struct eth_dev_ops dpaa_devops = { 660 .dev_configure = dpaa_eth_dev_configure, 661 .dev_start = dpaa_eth_dev_start, 662 .dev_stop = dpaa_eth_dev_stop, 663 .dev_close = dpaa_eth_dev_close, 664 .dev_infos_get = dpaa_eth_dev_info, 665 .dev_supported_ptypes_get = dpaa_supported_ptypes_get, 666 667 .rx_queue_setup = dpaa_eth_rx_queue_setup, 668 .tx_queue_setup = dpaa_eth_tx_queue_setup, 669 .rx_queue_release = dpaa_eth_rx_queue_release, 670 .tx_queue_release = dpaa_eth_tx_queue_release, 671 672 .flow_ctrl_get = dpaa_flow_ctrl_get, 673 .flow_ctrl_set = dpaa_flow_ctrl_set, 674 675 .link_update = dpaa_eth_link_update, 676 .stats_get = dpaa_eth_stats_get, 677 .xstats_get = dpaa_dev_xstats_get, 678 .xstats_get_by_id = dpaa_xstats_get_by_id, 679 .xstats_get_names_by_id = dpaa_xstats_get_names_by_id, 680 .xstats_get_names = dpaa_xstats_get_names, 681 .xstats_reset = dpaa_eth_stats_reset, 682 .stats_reset = dpaa_eth_stats_reset, 683 .promiscuous_enable = dpaa_eth_promiscuous_enable, 684 .promiscuous_disable = dpaa_eth_promiscuous_disable, 685 .allmulticast_enable = dpaa_eth_multicast_enable, 686 .allmulticast_disable = dpaa_eth_multicast_disable, 687 .mtu_set = dpaa_mtu_set, 688 .dev_set_link_down = dpaa_link_down, 689 .dev_set_link_up = dpaa_link_up, 690 .mac_addr_add = dpaa_dev_add_mac_addr, 691 .mac_addr_remove = dpaa_dev_remove_mac_addr, 692 .mac_addr_set = dpaa_dev_set_mac_addr, 693 694 .fw_version_get = dpaa_fw_version_get, 695 }; 696 697 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf) 698 { 699 struct rte_eth_fc_conf *fc_conf; 700 int ret; 701 702 PMD_INIT_FUNC_TRACE(); 703 704 if (!(dpaa_intf->fc_conf)) { 705 dpaa_intf->fc_conf = rte_zmalloc(NULL, 706 sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 707 if (!dpaa_intf->fc_conf) { 708 DPAA_PMD_ERR("unable to save flow control info"); 709 return -ENOMEM; 710 } 711 } 712 fc_conf = dpaa_intf->fc_conf; 713 ret = fman_if_get_fc_threshold(dpaa_intf->fif); 714 if (ret) { 715 fc_conf->mode = RTE_FC_TX_PAUSE; 716 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 717 } else { 718 fc_conf->mode = RTE_FC_NONE; 719 } 720 721 return 0; 722 } 723 724 /* Initialise an Rx FQ */ 725 static int dpaa_rx_queue_init(struct qman_fq *fq, 726 uint32_t fqid) 727 { 728 struct qm_mcc_initfq opts; 729 int ret; 730 731 PMD_INIT_FUNC_TRACE(); 732 733 ret = qman_reserve_fqid(fqid); 734 if (ret) { 735 DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d", 736 fqid, ret); 737 return -EINVAL; 738 } 739 740 DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid); 741 ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 742 if (ret) { 743 DPAA_PMD_ERR("create rx fqid %d failed with ret: %d", 744 fqid, ret); 745 return ret; 746 } 747 748 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 749 QM_INITFQ_WE_CONTEXTA; 750 751 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY; 752 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING | 753 QM_FQCTRL_PREFERINCACHE; 754 opts.fqd.context_a.stashing.exclusive = 0; 755 opts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH; 756 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH; 757 opts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH; 758 759 /*Enable tail drop */ 760 opts.we_mask = opts.we_mask | QM_INITFQ_WE_TDTHRESH; 761 opts.fqd.fq_ctrl = opts.fqd.fq_ctrl | QM_FQCTRL_TDE; 762 qm_fqd_taildrop_set(&opts.fqd.td, CONG_THRESHOLD_RX_Q, 1); 763 764 ret = qman_init_fq(fq, 0, &opts); 765 if (ret) 766 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret); 767 return ret; 768 } 769 770 /* Initialise a Tx FQ */ 771 static int dpaa_tx_queue_init(struct qman_fq *fq, 772 struct fman_if *fman_intf) 773 { 774 struct qm_mcc_initfq opts; 775 int ret; 776 777 PMD_INIT_FUNC_TRACE(); 778 779 ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID | 780 QMAN_FQ_FLAG_TO_DCPORTAL, fq); 781 if (ret) { 782 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret); 783 return ret; 784 } 785 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 786 QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA; 787 opts.fqd.dest.channel = fman_intf->tx_channel_id; 788 opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY; 789 opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE; 790 opts.fqd.context_b = 0; 791 /* no tx-confirmation */ 792 opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi; 793 opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo; 794 DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid); 795 ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts); 796 if (ret) 797 DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret); 798 return ret; 799 } 800 801 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 802 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */ 803 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid) 804 { 805 struct qm_mcc_initfq opts; 806 int ret; 807 808 PMD_INIT_FUNC_TRACE(); 809 810 ret = qman_reserve_fqid(fqid); 811 if (ret) { 812 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d", 813 fqid, ret); 814 return -EINVAL; 815 } 816 /* "map" this Rx FQ to one of the interfaces Tx FQID */ 817 DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid); 818 ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 819 if (ret) { 820 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d", 821 fqid, ret); 822 return ret; 823 } 824 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL; 825 opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY; 826 ret = qman_init_fq(fq, 0, &opts); 827 if (ret) 828 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d", 829 fqid, ret); 830 return ret; 831 } 832 #endif 833 834 /* Initialise a network interface */ 835 static int 836 dpaa_dev_init(struct rte_eth_dev *eth_dev) 837 { 838 int num_cores, num_rx_fqs, fqid; 839 int loop, ret = 0; 840 int dev_id; 841 struct rte_dpaa_device *dpaa_device; 842 struct dpaa_if *dpaa_intf; 843 struct fm_eth_port_cfg *cfg; 844 struct fman_if *fman_intf; 845 struct fman_if_bpool *bp, *tmp_bp; 846 847 PMD_INIT_FUNC_TRACE(); 848 849 /* For secondary processes, the primary has done all the work */ 850 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 851 return 0; 852 853 dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device); 854 dev_id = dpaa_device->id.dev_id; 855 dpaa_intf = eth_dev->data->dev_private; 856 cfg = &dpaa_netcfg->port_cfg[dev_id]; 857 fman_intf = cfg->fman_if; 858 859 dpaa_intf->name = dpaa_device->name; 860 861 /* save fman_if & cfg in the interface struture */ 862 dpaa_intf->fif = fman_intf; 863 dpaa_intf->ifid = dev_id; 864 dpaa_intf->cfg = cfg; 865 866 /* Initialize Rx FQ's */ 867 if (getenv("DPAA_NUM_RX_QUEUES")) 868 num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES")); 869 else 870 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES; 871 872 /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX 873 * queues. 874 */ 875 if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) { 876 DPAA_PMD_ERR("Invalid number of RX queues\n"); 877 return -EINVAL; 878 } 879 880 dpaa_intf->rx_queues = rte_zmalloc(NULL, 881 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE); 882 for (loop = 0; loop < num_rx_fqs; loop++) { 883 fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid * 884 DPAA_PCD_FQID_MULTIPLIER + loop; 885 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop], fqid); 886 if (ret) 887 return ret; 888 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf; 889 } 890 dpaa_intf->nb_rx_queues = num_rx_fqs; 891 892 /* Initialise Tx FQs. Have as many Tx FQ's as number of cores */ 893 num_cores = rte_lcore_count(); 894 dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) * 895 num_cores, MAX_CACHELINE); 896 if (!dpaa_intf->tx_queues) 897 return -ENOMEM; 898 899 for (loop = 0; loop < num_cores; loop++) { 900 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop], 901 fman_intf); 902 if (ret) 903 return ret; 904 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf; 905 } 906 dpaa_intf->nb_tx_queues = num_cores; 907 908 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 909 dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 910 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err); 911 dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf; 912 dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 913 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err); 914 dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf; 915 #endif 916 917 DPAA_PMD_DEBUG("All frame queues created"); 918 919 /* Get the initial configuration for flow control */ 920 dpaa_fc_set_default(dpaa_intf); 921 922 /* reset bpool list, initialize bpool dynamically */ 923 list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) { 924 list_del(&bp->node); 925 free(bp); 926 } 927 928 /* Populate ethdev structure */ 929 eth_dev->dev_ops = &dpaa_devops; 930 eth_dev->rx_pkt_burst = dpaa_eth_queue_rx; 931 eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 932 933 /* Allocate memory for storing MAC addresses */ 934 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", 935 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0); 936 if (eth_dev->data->mac_addrs == NULL) { 937 DPAA_PMD_ERR("Failed to allocate %d bytes needed to " 938 "store MAC addresses", 939 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER); 940 rte_free(dpaa_intf->rx_queues); 941 rte_free(dpaa_intf->tx_queues); 942 dpaa_intf->rx_queues = NULL; 943 dpaa_intf->tx_queues = NULL; 944 dpaa_intf->nb_rx_queues = 0; 945 dpaa_intf->nb_tx_queues = 0; 946 return -ENOMEM; 947 } 948 949 /* copy the primary mac address */ 950 ether_addr_copy(&fman_intf->mac_addr, ð_dev->data->mac_addrs[0]); 951 952 RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n", 953 dpaa_device->name, 954 fman_intf->mac_addr.addr_bytes[0], 955 fman_intf->mac_addr.addr_bytes[1], 956 fman_intf->mac_addr.addr_bytes[2], 957 fman_intf->mac_addr.addr_bytes[3], 958 fman_intf->mac_addr.addr_bytes[4], 959 fman_intf->mac_addr.addr_bytes[5]); 960 961 /* Disable RX mode */ 962 fman_if_discard_rx_errors(fman_intf); 963 fman_if_disable_rx(fman_intf); 964 /* Disable promiscuous mode */ 965 fman_if_promiscuous_disable(fman_intf); 966 /* Disable multicast */ 967 fman_if_reset_mcast_filter_table(fman_intf); 968 /* Reset interface statistics */ 969 fman_if_stats_reset(fman_intf); 970 971 return 0; 972 } 973 974 static int 975 dpaa_dev_uninit(struct rte_eth_dev *dev) 976 { 977 struct dpaa_if *dpaa_intf = dev->data->dev_private; 978 979 PMD_INIT_FUNC_TRACE(); 980 981 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 982 return -EPERM; 983 984 if (!dpaa_intf) { 985 DPAA_PMD_WARN("Already closed or not started"); 986 return -1; 987 } 988 989 dpaa_eth_dev_close(dev); 990 991 /* release configuration memory */ 992 if (dpaa_intf->fc_conf) 993 rte_free(dpaa_intf->fc_conf); 994 995 rte_free(dpaa_intf->rx_queues); 996 dpaa_intf->rx_queues = NULL; 997 998 rte_free(dpaa_intf->tx_queues); 999 dpaa_intf->tx_queues = NULL; 1000 1001 /* free memory for storing MAC addresses */ 1002 rte_free(dev->data->mac_addrs); 1003 dev->data->mac_addrs = NULL; 1004 1005 dev->dev_ops = NULL; 1006 dev->rx_pkt_burst = NULL; 1007 dev->tx_pkt_burst = NULL; 1008 1009 return 0; 1010 } 1011 1012 static int 1013 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, 1014 struct rte_dpaa_device *dpaa_dev) 1015 { 1016 int diag; 1017 int ret; 1018 struct rte_eth_dev *eth_dev; 1019 1020 PMD_INIT_FUNC_TRACE(); 1021 1022 /* In case of secondary process, the device is already configured 1023 * and no further action is required, except portal initialization 1024 * and verifying secondary attachment to port name. 1025 */ 1026 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1027 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name); 1028 if (!eth_dev) 1029 return -ENOMEM; 1030 return 0; 1031 } 1032 1033 if (!is_global_init) { 1034 /* One time load of Qman/Bman drivers */ 1035 ret = qman_global_init(); 1036 if (ret) { 1037 DPAA_PMD_ERR("QMAN initialization failed: %d", 1038 ret); 1039 return ret; 1040 } 1041 ret = bman_global_init(); 1042 if (ret) { 1043 DPAA_PMD_ERR("BMAN initialization failed: %d", 1044 ret); 1045 return ret; 1046 } 1047 1048 is_global_init = 1; 1049 } 1050 1051 ret = rte_dpaa_portal_init((void *)1); 1052 if (ret) { 1053 DPAA_PMD_ERR("Unable to initialize portal"); 1054 return ret; 1055 } 1056 1057 eth_dev = rte_eth_dev_allocate(dpaa_dev->name); 1058 if (eth_dev == NULL) 1059 return -ENOMEM; 1060 1061 eth_dev->data->dev_private = rte_zmalloc( 1062 "ethdev private structure", 1063 sizeof(struct dpaa_if), 1064 RTE_CACHE_LINE_SIZE); 1065 if (!eth_dev->data->dev_private) { 1066 DPAA_PMD_ERR("Cannot allocate memzone for port data"); 1067 rte_eth_dev_release_port(eth_dev); 1068 return -ENOMEM; 1069 } 1070 1071 eth_dev->device = &dpaa_dev->device; 1072 eth_dev->device->driver = &dpaa_drv->driver; 1073 dpaa_dev->eth_dev = eth_dev; 1074 1075 /* Invoke PMD device initialization function */ 1076 diag = dpaa_dev_init(eth_dev); 1077 if (diag == 0) 1078 return 0; 1079 1080 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1081 rte_free(eth_dev->data->dev_private); 1082 1083 rte_eth_dev_release_port(eth_dev); 1084 return diag; 1085 } 1086 1087 static int 1088 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev) 1089 { 1090 struct rte_eth_dev *eth_dev; 1091 1092 PMD_INIT_FUNC_TRACE(); 1093 1094 eth_dev = dpaa_dev->eth_dev; 1095 dpaa_dev_uninit(eth_dev); 1096 1097 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1098 rte_free(eth_dev->data->dev_private); 1099 1100 rte_eth_dev_release_port(eth_dev); 1101 1102 return 0; 1103 } 1104 1105 static struct rte_dpaa_driver rte_dpaa_pmd = { 1106 .drv_type = FSL_DPAA_ETH, 1107 .probe = rte_dpaa_probe, 1108 .remove = rte_dpaa_remove, 1109 }; 1110 1111 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd); 1112