xref: /dpdk/drivers/net/dpaa/dpaa_ethdev.c (revision d2536b006d788039112f9646e4fb2a91ecb6ae45)
1d81734caSHemant Agrawal /* SPDX-License-Identifier: BSD-3-Clause
2ff9e112dSShreyansh Jain  *
3ff9e112dSShreyansh Jain  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
49124e65dSGagandeep Singh  *   Copyright 2017-2020 NXP
5ff9e112dSShreyansh Jain  *
6ff9e112dSShreyansh Jain  */
7ff9e112dSShreyansh Jain /* System headers */
8ff9e112dSShreyansh Jain #include <stdio.h>
9ff9e112dSShreyansh Jain #include <inttypes.h>
10ff9e112dSShreyansh Jain #include <unistd.h>
11ff9e112dSShreyansh Jain #include <limits.h>
12ff9e112dSShreyansh Jain #include <sched.h>
13ff9e112dSShreyansh Jain #include <signal.h>
14ff9e112dSShreyansh Jain #include <pthread.h>
15ff9e112dSShreyansh Jain #include <sys/types.h>
16ff9e112dSShreyansh Jain #include <sys/syscall.h>
17ee0fa755SRohit Raj #include <sys/ioctl.h>
18ff9e112dSShreyansh Jain 
196723c0fcSBruce Richardson #include <rte_string_fns.h>
20ff9e112dSShreyansh Jain #include <rte_byteorder.h>
21ff9e112dSShreyansh Jain #include <rte_common.h>
22ff9e112dSShreyansh Jain #include <rte_interrupts.h>
23ff9e112dSShreyansh Jain #include <rte_log.h>
24ff9e112dSShreyansh Jain #include <rte_debug.h>
25ff9e112dSShreyansh Jain #include <rte_pci.h>
26ff9e112dSShreyansh Jain #include <rte_atomic.h>
27ff9e112dSShreyansh Jain #include <rte_branch_prediction.h>
28ff9e112dSShreyansh Jain #include <rte_memory.h>
29ff9e112dSShreyansh Jain #include <rte_tailq.h>
30ff9e112dSShreyansh Jain #include <rte_eal.h>
31ff9e112dSShreyansh Jain #include <rte_alarm.h>
32ff9e112dSShreyansh Jain #include <rte_ether.h>
33df96fd0dSBruce Richardson #include <ethdev_driver.h>
34ff9e112dSShreyansh Jain #include <rte_malloc.h>
35ff9e112dSShreyansh Jain #include <rte_ring.h>
36ff9e112dSShreyansh Jain 
37a2f1da7dSDavid Marchand #include <bus_dpaa_driver.h>
38ff9e112dSShreyansh Jain #include <rte_dpaa_logs.h>
3937f9b54bSShreyansh Jain #include <dpaa_mempool.h>
40ff9e112dSShreyansh Jain 
41ff9e112dSShreyansh Jain #include <dpaa_ethdev.h>
4237f9b54bSShreyansh Jain #include <dpaa_rxtx.h>
434defbc8cSSachin Saxena #include <dpaa_flow.h>
448c3495f5SHemant Agrawal #include <rte_pmd_dpaa.h>
4537f9b54bSShreyansh Jain 
4637f9b54bSShreyansh Jain #include <fsl_usd.h>
4737f9b54bSShreyansh Jain #include <fsl_qman.h>
4837f9b54bSShreyansh Jain #include <fsl_bman.h>
4937f9b54bSShreyansh Jain #include <fsl_fman.h>
502aa10990SRohit Raj #include <process.h>
5177393f56SSachin Saxena #include <fmlib/fm_ext.h>
52ff9e112dSShreyansh Jain 
5389b9bb08SRohit Raj #define CHECK_INTERVAL         100  /* 100ms */
5489b9bb08SRohit Raj #define MAX_REPEAT_TIME        90   /* 9s (90 * 100ms) in total */
5589b9bb08SRohit Raj 
56c5836218SSunil Kumar Kori /* Supported Rx offloads */
57c5836218SSunil Kumar Kori static uint64_t dev_rx_offloads_sup =
58295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_SCATTER;
59c5836218SSunil Kumar Kori 
60c5836218SSunil Kumar Kori /* Rx offloads which cannot be disabled */
61c5836218SSunil Kumar Kori static uint64_t dev_rx_offloads_nodis =
62295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
63295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
64295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
65295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
66295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_RSS_HASH;
67c5836218SSunil Kumar Kori 
68c5836218SSunil Kumar Kori /* Supported Tx offloads */
691cd8d4ceSHemant Agrawal static uint64_t dev_tx_offloads_sup =
70295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_MT_LOCKFREE |
71295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
72c5836218SSunil Kumar Kori 
73c5836218SSunil Kumar Kori /* Tx offloads which cannot be disabled */
74c5836218SSunil Kumar Kori static uint64_t dev_tx_offloads_nodis =
75295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
76295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
77295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
78295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_SCTP_CKSUM |
79295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
80295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
81c5836218SSunil Kumar Kori 
82ff9e112dSShreyansh Jain /* Keep track of whether QMAN and BMAN have been globally initialized */
83ff9e112dSShreyansh Jain static int is_global_init;
844defbc8cSSachin Saxena static int fmc_q = 1;	/* Indicates the use of static fmc for distribution */
858d6fc8b6SHemant Agrawal static int default_q;	/* use default queue - FMC is not executed*/
860b5deefbSShreyansh Jain /* At present we only allow up to 4 push mode queues as default - as each of
870b5deefbSShreyansh Jain  * this queue need dedicated portal and we are short of portals.
880c504f69SHemant Agrawal  */
890b5deefbSShreyansh Jain #define DPAA_MAX_PUSH_MODE_QUEUE       8
900b5deefbSShreyansh Jain #define DPAA_DEFAULT_PUSH_MODE_QUEUE   4
910c504f69SHemant Agrawal 
920b5deefbSShreyansh Jain static int dpaa_push_mode_max_queue = DPAA_DEFAULT_PUSH_MODE_QUEUE;
930c504f69SHemant Agrawal static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
940c504f69SHemant Agrawal 
95ff9e112dSShreyansh Jain 
969124e65dSGagandeep Singh /* Per RX FQ Taildrop in frame count */
9762f53995SHemant Agrawal static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
9862f53995SHemant Agrawal 
999124e65dSGagandeep Singh /* Per TX FQ Taildrop in frame count, disabled by default */
1009124e65dSGagandeep Singh static unsigned int td_tx_threshold;
1019124e65dSGagandeep Singh 
102b21ed3e2SHemant Agrawal struct rte_dpaa_xstats_name_off {
103b21ed3e2SHemant Agrawal 	char name[RTE_ETH_XSTATS_NAME_SIZE];
104b21ed3e2SHemant Agrawal 	uint32_t offset;
105b21ed3e2SHemant Agrawal };
106b21ed3e2SHemant Agrawal 
107b21ed3e2SHemant Agrawal static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
108b21ed3e2SHemant Agrawal 	{"rx_align_err",
109b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, raln)},
110b21ed3e2SHemant Agrawal 	{"rx_valid_pause",
111b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rxpf)},
112b21ed3e2SHemant Agrawal 	{"rx_fcs_err",
113b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rfcs)},
114b21ed3e2SHemant Agrawal 	{"rx_vlan_frame",
115b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rvlan)},
116b21ed3e2SHemant Agrawal 	{"rx_frame_err",
117b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rerr)},
118b21ed3e2SHemant Agrawal 	{"rx_drop_err",
119b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rdrp)},
120b21ed3e2SHemant Agrawal 	{"rx_undersized",
121b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rund)},
122b21ed3e2SHemant Agrawal 	{"rx_oversize_err",
123b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rovr)},
124b21ed3e2SHemant Agrawal 	{"rx_fragment_pkt",
125b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rfrg)},
126b21ed3e2SHemant Agrawal 	{"tx_valid_pause",
127b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, txpf)},
128b21ed3e2SHemant Agrawal 	{"tx_fcs_err",
129b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, terr)},
130b21ed3e2SHemant Agrawal 	{"tx_vlan_frame",
131b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, tvlan)},
132b21ed3e2SHemant Agrawal 	{"rx_undersized",
133b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, tund)},
134*d2536b00SHemant Agrawal 	{"rx_frame_counter",
135*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfrc)},
136*d2536b00SHemant Agrawal 	{"rx_bad_frames_count",
137*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfbc)},
138*d2536b00SHemant Agrawal 	{"rx_large_frames_count",
139*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rlfc)},
140*d2536b00SHemant Agrawal 	{"rx_filter_frames_count",
141*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rffc)},
142*d2536b00SHemant Agrawal 	{"rx_frame_discrad_count",
143*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfdc)},
144*d2536b00SHemant Agrawal 	{"rx_frame_list_dma_err_count",
145*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfldec)},
146*d2536b00SHemant Agrawal 	{"rx_out_of_buffer_discard ",
147*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rodc)},
148*d2536b00SHemant Agrawal 	{"rx_buf_diallocate",
149*d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rbdc)},
150b21ed3e2SHemant Agrawal };
151b21ed3e2SHemant Agrawal 
1528c3495f5SHemant Agrawal static struct rte_dpaa_driver rte_dpaa_pmd;
153533c31ccSGagandeep Singh int dpaa_valid_dev;
154533c31ccSGagandeep Singh struct rte_mempool *dpaa_tx_sg_pool;
1558c3495f5SHemant Agrawal 
156bdad90d1SIvan Ilchenko static int
15716e2c27fSSunil Kumar Kori dpaa_eth_dev_info(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info);
15816e2c27fSSunil Kumar Kori 
1592aa10990SRohit Raj static int dpaa_eth_link_update(struct rte_eth_dev *dev,
1602aa10990SRohit Raj 				int wait_to_complete __rte_unused);
1612aa10990SRohit Raj 
1622aa10990SRohit Raj static void dpaa_interrupt_handler(void *param);
1632aa10990SRohit Raj 
1645e745593SSunil Kumar Kori static inline void
1655e745593SSunil Kumar Kori dpaa_poll_queue_default_config(struct qm_mcc_initfq *opts)
1665e745593SSunil Kumar Kori {
1675e745593SSunil Kumar Kori 	memset(opts, 0, sizeof(struct qm_mcc_initfq));
1685e745593SSunil Kumar Kori 	opts->we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
1695e745593SSunil Kumar Kori 	opts->fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
1705e745593SSunil Kumar Kori 			   QM_FQCTRL_PREFERINCACHE;
1715e745593SSunil Kumar Kori 	opts->fqd.context_a.stashing.exclusive = 0;
1725e745593SSunil Kumar Kori 	if (dpaa_svr_family != SVR_LS1046A_FAMILY)
1735e745593SSunil Kumar Kori 		opts->fqd.context_a.stashing.annotation_cl =
1745e745593SSunil Kumar Kori 						DPAA_IF_RX_ANNOTATION_STASH;
1755e745593SSunil Kumar Kori 	opts->fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
1765e745593SSunil Kumar Kori 	opts->fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
1775e745593SSunil Kumar Kori }
1785e745593SSunil Kumar Kori 
179ff9e112dSShreyansh Jain static int
1800cbec027SShreyansh Jain dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1810cbec027SShreyansh Jain {
18235b2d13fSOlivier Matz 	uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1839658ac3aSAshish Jain 				+ VLAN_TAG_SIZE;
18455576ac2SHemant Agrawal 	uint32_t buffsz = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
185ee0fa755SRohit Raj 	struct fman_if *fif = dev->process_private;
1860cbec027SShreyansh Jain 
1870cbec027SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1880cbec027SShreyansh Jain 
189ee0fa755SRohit Raj 	if (fif->is_shared_mac) {
190ee0fa755SRohit Raj 		DPAA_PMD_ERR("Cannot configure mtu from DPDK in VSP mode.");
191ee0fa755SRohit Raj 		return -ENOTSUP;
192ee0fa755SRohit Raj 	}
193ee0fa755SRohit Raj 
19455576ac2SHemant Agrawal 	/*
19555576ac2SHemant Agrawal 	 * Refuse mtu that requires the support of scattered packets
19655576ac2SHemant Agrawal 	 * when this feature has not been enabled before.
19755576ac2SHemant Agrawal 	 */
19855576ac2SHemant Agrawal 	if (dev->data->min_rx_buf_size &&
19955576ac2SHemant Agrawal 		!dev->data->scattered_rx && frame_size > buffsz) {
20055576ac2SHemant Agrawal 		DPAA_PMD_ERR("SG not enabled, will not fit in one buffer");
20155576ac2SHemant Agrawal 		return -EINVAL;
20255576ac2SHemant Agrawal 	}
20355576ac2SHemant Agrawal 
20455576ac2SHemant Agrawal 	/* check <seg size> * <max_seg>  >= max_frame */
20555576ac2SHemant Agrawal 	if (dev->data->min_rx_buf_size && dev->data->scattered_rx &&
20655576ac2SHemant Agrawal 		(frame_size > buffsz * DPAA_SGT_MAX_ENTRIES)) {
20755576ac2SHemant Agrawal 		DPAA_PMD_ERR("Too big to fit for Max SG list %d",
20855576ac2SHemant Agrawal 				buffsz * DPAA_SGT_MAX_ENTRIES);
20955576ac2SHemant Agrawal 		return -EINVAL;
21055576ac2SHemant Agrawal 	}
21155576ac2SHemant Agrawal 
2126b10d1f7SNipun Gupta 	fman_if_set_maxfrm(dev->process_private, frame_size);
2130cbec027SShreyansh Jain 
2140cbec027SShreyansh Jain 	return 0;
2150cbec027SShreyansh Jain }
2160cbec027SShreyansh Jain 
2170cbec027SShreyansh Jain static int
21816e2c27fSSunil Kumar Kori dpaa_eth_dev_configure(struct rte_eth_dev *dev)
219ff9e112dSShreyansh Jain {
22016e2c27fSSunil Kumar Kori 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
22116e2c27fSSunil Kumar Kori 	uint64_t rx_offloads = eth_conf->rxmode.offloads;
22216e2c27fSSunil Kumar Kori 	uint64_t tx_offloads = eth_conf->txmode.offloads;
223953b6fedSNipun Gupta 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
2242aa10990SRohit Raj 	struct rte_device *rdev = dev->device;
2257a292619SRohit Raj 	struct rte_eth_link *link = &dev->data->dev_link;
2262aa10990SRohit Raj 	struct rte_dpaa_device *dpaa_dev;
2272aa10990SRohit Raj 	struct fman_if *fif = dev->process_private;
2282aa10990SRohit Raj 	struct __fman_if *__fif;
2292aa10990SRohit Raj 	struct rte_intr_handle *intr_handle;
2301bb4a528SFerruh Yigit 	uint32_t max_rx_pktlen;
2317a292619SRohit Raj 	int speed, duplex;
232ee0fa755SRohit Raj 	int ret, rx_status, socket_fd;
233ee0fa755SRohit Raj 	struct ifreq ifr;
2349658ac3aSAshish Jain 
235ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
236ff9e112dSShreyansh Jain 
2372aa10990SRohit Raj 	dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
238d61138d4SHarman Kalra 	intr_handle = dpaa_dev->intr_handle;
2392aa10990SRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
2402aa10990SRohit Raj 
241953b6fedSNipun Gupta 	/* Check if interface is enabled in case of shared MAC */
242953b6fedSNipun Gupta 	if (fif->is_shared_mac) {
243953b6fedSNipun Gupta 		rx_status = fman_if_get_rx_status(fif);
244953b6fedSNipun Gupta 		if (!rx_status) {
245953b6fedSNipun Gupta 			DPAA_PMD_ERR("%s Interface not enabled in kernel!",
246953b6fedSNipun Gupta 				     dpaa_intf->name);
247953b6fedSNipun Gupta 			return -EHOSTDOWN;
248953b6fedSNipun Gupta 		}
249ee0fa755SRohit Raj 
250ee0fa755SRohit Raj 		socket_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_IP);
251ee0fa755SRohit Raj 		if (socket_fd == -1) {
252ee0fa755SRohit Raj 			DPAA_PMD_ERR("Cannot open IF socket");
253ee0fa755SRohit Raj 			return -errno;
254ee0fa755SRohit Raj 		}
255ee0fa755SRohit Raj 
256ee0fa755SRohit Raj 		strncpy(ifr.ifr_name, dpaa_intf->name, IFNAMSIZ - 1);
257ee0fa755SRohit Raj 
258ee0fa755SRohit Raj 		if (ioctl(socket_fd, SIOCGIFMTU, &ifr) < 0) {
259ee0fa755SRohit Raj 			DPAA_PMD_ERR("Cannot get interface mtu");
260ee0fa755SRohit Raj 			close(socket_fd);
261ee0fa755SRohit Raj 			return -errno;
262ee0fa755SRohit Raj 		}
263ee0fa755SRohit Raj 
264ee0fa755SRohit Raj 		close(socket_fd);
265ee0fa755SRohit Raj 		DPAA_PMD_INFO("Using kernel configured mtu size(%u)",
266ee0fa755SRohit Raj 			     ifr.ifr_mtu);
267ee0fa755SRohit Raj 
268ee0fa755SRohit Raj 		eth_conf->rxmode.mtu = ifr.ifr_mtu;
269953b6fedSNipun Gupta 	}
270953b6fedSNipun Gupta 
2711cd8d4ceSHemant Agrawal 	/* Rx offloads which are enabled by default */
272c5836218SSunil Kumar Kori 	if (dev_rx_offloads_nodis & ~rx_offloads) {
2731cd8d4ceSHemant Agrawal 		DPAA_PMD_INFO(
2741cd8d4ceSHemant Agrawal 		"Some of rx offloads enabled by default - requested 0x%" PRIx64
2751cd8d4ceSHemant Agrawal 		" fixed are 0x%" PRIx64,
276c5836218SSunil Kumar Kori 		rx_offloads, dev_rx_offloads_nodis);
27716e2c27fSSunil Kumar Kori 	}
27816e2c27fSSunil Kumar Kori 
2791cd8d4ceSHemant Agrawal 	/* Tx offloads which are enabled by default */
280c5836218SSunil Kumar Kori 	if (dev_tx_offloads_nodis & ~tx_offloads) {
2811cd8d4ceSHemant Agrawal 		DPAA_PMD_INFO(
2821cd8d4ceSHemant Agrawal 		"Some of tx offloads enabled by default - requested 0x%" PRIx64
2831cd8d4ceSHemant Agrawal 		" fixed are 0x%" PRIx64,
284c5836218SSunil Kumar Kori 		tx_offloads, dev_tx_offloads_nodis);
28516e2c27fSSunil Kumar Kori 	}
28616e2c27fSSunil Kumar Kori 
2871bb4a528SFerruh Yigit 	max_rx_pktlen = eth_conf->rxmode.mtu + RTE_ETHER_HDR_LEN +
2881bb4a528SFerruh Yigit 			RTE_ETHER_CRC_LEN + VLAN_TAG_SIZE;
2891bb4a528SFerruh Yigit 	if (max_rx_pktlen > DPAA_MAX_RX_PKT_LEN) {
290deeec8efSHemant Agrawal 		DPAA_PMD_INFO("enabling jumbo override conf max len=%d "
291deeec8efSHemant Agrawal 			"supported is %d",
2921bb4a528SFerruh Yigit 			max_rx_pktlen, DPAA_MAX_RX_PKT_LEN);
2931bb4a528SFerruh Yigit 		max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
29425f85419SShreyansh Jain 	}
295deeec8efSHemant Agrawal 
296ee0fa755SRohit Raj 	if (!fif->is_shared_mac)
2971bb4a528SFerruh Yigit 		fman_if_set_maxfrm(dev->process_private, max_rx_pktlen);
29855576ac2SHemant Agrawal 
299295968d1SFerruh Yigit 	if (rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
30055576ac2SHemant Agrawal 		DPAA_PMD_DEBUG("enabling scatter mode");
3016b10d1f7SNipun Gupta 		fman_if_set_sg(dev->process_private, 1);
30255576ac2SHemant Agrawal 		dev->data->scattered_rx = 1;
30355576ac2SHemant Agrawal 	}
30455576ac2SHemant Agrawal 
305f5fe3eedSJun Yang 	if (!(default_q || fmc_q)) {
306f5fe3eedSJun Yang 		if (dpaa_fm_config(dev,
307f5fe3eedSJun Yang 			eth_conf->rx_adv_conf.rss_conf.rss_hf)) {
308f5fe3eedSJun Yang 			dpaa_write_fm_config_to_file();
3091ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("FM port configuration: Failed");
310f5fe3eedSJun Yang 			return -1;
311f5fe3eedSJun Yang 		}
312f5fe3eedSJun Yang 		dpaa_write_fm_config_to_file();
313f5fe3eedSJun Yang 	}
314f5fe3eedSJun Yang 
3152aa10990SRohit Raj 	/* if the interrupts were configured on this devices*/
316d61138d4SHarman Kalra 	if (intr_handle && rte_intr_fd_get(intr_handle)) {
3172aa10990SRohit Raj 		if (dev->data->dev_conf.intr_conf.lsc != 0)
3182aa10990SRohit Raj 			rte_intr_callback_register(intr_handle,
3192aa10990SRohit Raj 					   dpaa_interrupt_handler,
3202aa10990SRohit Raj 					   (void *)dev);
3212aa10990SRohit Raj 
322d61138d4SHarman Kalra 		ret = dpaa_intr_enable(__fif->node_name,
323d61138d4SHarman Kalra 				       rte_intr_fd_get(intr_handle));
3242aa10990SRohit Raj 		if (ret) {
3252aa10990SRohit Raj 			if (dev->data->dev_conf.intr_conf.lsc != 0) {
3262aa10990SRohit Raj 				rte_intr_callback_unregister(intr_handle,
3272aa10990SRohit Raj 					dpaa_interrupt_handler,
3282aa10990SRohit Raj 					(void *)dev);
3292aa10990SRohit Raj 				if (ret == EINVAL)
3300fcdbde0SHemant Agrawal 					DPAA_PMD_ERR("Failed to enable interrupt: Not Supported");
3312aa10990SRohit Raj 				else
3320fcdbde0SHemant Agrawal 					DPAA_PMD_ERR("Failed to enable interrupt");
3332aa10990SRohit Raj 			}
3342aa10990SRohit Raj 			dev->data->dev_conf.intr_conf.lsc = 0;
3352aa10990SRohit Raj 			dev->data->dev_flags &= ~RTE_ETH_DEV_INTR_LSC;
3362aa10990SRohit Raj 		}
3372aa10990SRohit Raj 	}
3387a292619SRohit Raj 
3397a292619SRohit Raj 	/* Wait for link status to get updated */
3407a292619SRohit Raj 	if (!link->link_status)
3417a292619SRohit Raj 		sleep(1);
3427a292619SRohit Raj 
3437a292619SRohit Raj 	/* Configure link only if link is UP*/
3447a292619SRohit Raj 	if (link->link_status) {
345295968d1SFerruh Yigit 		if (eth_conf->link_speeds == RTE_ETH_LINK_SPEED_AUTONEG) {
3467a292619SRohit Raj 			/* Start autoneg only if link is not in autoneg mode */
3477a292619SRohit Raj 			if (!link->link_autoneg)
3487a292619SRohit Raj 				dpaa_restart_link_autoneg(__fif->node_name);
349295968d1SFerruh Yigit 		} else if (eth_conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) {
350295968d1SFerruh Yigit 			switch (eth_conf->link_speeds &  RTE_ETH_LINK_SPEED_FIXED) {
351295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_10M_HD:
352295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_10M;
353295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_HALF_DUPLEX;
3547a292619SRohit Raj 				break;
355295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_10M:
356295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_10M;
357295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3587a292619SRohit Raj 				break;
359295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_100M_HD:
360295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_100M;
361295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_HALF_DUPLEX;
3627a292619SRohit Raj 				break;
363295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_100M:
364295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_100M;
365295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3667a292619SRohit Raj 				break;
367295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_1G:
368295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_1G;
369295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3707a292619SRohit Raj 				break;
371295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_2_5G:
372295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_2_5G;
373295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3747a292619SRohit Raj 				break;
375295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_10G:
376295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_10G;
377295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3787a292619SRohit Raj 				break;
3797a292619SRohit Raj 			default:
380295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_NONE;
381295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3827a292619SRohit Raj 				break;
3837a292619SRohit Raj 			}
3847a292619SRohit Raj 			/* Set link speed */
3857a292619SRohit Raj 			dpaa_update_link_speed(__fif->node_name, speed, duplex);
3867a292619SRohit Raj 		} else {
3877a292619SRohit Raj 			/* Manual autoneg - custom advertisement speed. */
3880fcdbde0SHemant Agrawal 			DPAA_PMD_ERR("Custom Advertisement speeds not supported");
3897a292619SRohit Raj 		}
3907a292619SRohit Raj 	}
3917a292619SRohit Raj 
392ff9e112dSShreyansh Jain 	return 0;
393ff9e112dSShreyansh Jain }
394ff9e112dSShreyansh Jain 
395a7bdc3bdSShreyansh Jain static const uint32_t *
396ba6a168aSSivaramakrishnan Venkat dpaa_supported_ptypes_get(struct rte_eth_dev *dev, size_t *no_of_elements)
397a7bdc3bdSShreyansh Jain {
398a7bdc3bdSShreyansh Jain 	static const uint32_t ptypes[] = {
399a7bdc3bdSShreyansh Jain 		RTE_PTYPE_L2_ETHER,
400ec503d8fSHemant Agrawal 		RTE_PTYPE_L2_ETHER_VLAN,
401ec503d8fSHemant Agrawal 		RTE_PTYPE_L2_ETHER_ARP,
402ec503d8fSHemant Agrawal 		RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
403ec503d8fSHemant Agrawal 		RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
404ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_ICMP,
405ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_TCP,
406ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_UDP,
407ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_FRAG,
408a7bdc3bdSShreyansh Jain 		RTE_PTYPE_L4_TCP,
409a7bdc3bdSShreyansh Jain 		RTE_PTYPE_L4_UDP,
410e7524271SGagandeep Singh 		RTE_PTYPE_L4_SCTP,
4112e3ddb56SSivaramakrishnan Venkat 		RTE_PTYPE_TUNNEL_ESP,
412a7bdc3bdSShreyansh Jain 	};
413a7bdc3bdSShreyansh Jain 
414a7bdc3bdSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
415a7bdc3bdSShreyansh Jain 
416ba6a168aSSivaramakrishnan Venkat 	if (dev->rx_pkt_burst == dpaa_eth_queue_rx) {
417ba6a168aSSivaramakrishnan Venkat 		*no_of_elements = RTE_DIM(ptypes);
418a7bdc3bdSShreyansh Jain 		return ptypes;
419ba6a168aSSivaramakrishnan Venkat 	}
420a7bdc3bdSShreyansh Jain 	return NULL;
421a7bdc3bdSShreyansh Jain }
422a7bdc3bdSShreyansh Jain 
4232aa10990SRohit Raj static void dpaa_interrupt_handler(void *param)
4242aa10990SRohit Raj {
4252aa10990SRohit Raj 	struct rte_eth_dev *dev = param;
4262aa10990SRohit Raj 	struct rte_device *rdev = dev->device;
4272aa10990SRohit Raj 	struct rte_dpaa_device *dpaa_dev;
4282aa10990SRohit Raj 	struct rte_intr_handle *intr_handle;
4292aa10990SRohit Raj 	uint64_t buf;
4302aa10990SRohit Raj 	int bytes_read;
4312aa10990SRohit Raj 
4322aa10990SRohit Raj 	dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
433d61138d4SHarman Kalra 	intr_handle = dpaa_dev->intr_handle;
4342aa10990SRohit Raj 
435aedd054cSHarman Kalra 	if (rte_intr_fd_get(intr_handle) < 0)
436aedd054cSHarman Kalra 		return;
437aedd054cSHarman Kalra 
438d61138d4SHarman Kalra 	bytes_read = read(rte_intr_fd_get(intr_handle), &buf,
439d61138d4SHarman Kalra 			  sizeof(uint64_t));
4402aa10990SRohit Raj 	if (bytes_read < 0)
4411ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Error reading eventfd");
4422aa10990SRohit Raj 	dpaa_eth_link_update(dev, 0);
4435723fbedSFerruh Yigit 	rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
4442aa10990SRohit Raj }
4452aa10990SRohit Raj 
446ff9e112dSShreyansh Jain static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
447ff9e112dSShreyansh Jain {
44837f9b54bSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
449*d2536b00SHemant Agrawal 	struct fman_if *fif = dev->process_private;
450f1d381b4SJie Hai 	uint16_t i;
45137f9b54bSShreyansh Jain 
452ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
453ff9e112dSShreyansh Jain 
454f5fe3eedSJun Yang 	if (!(default_q || fmc_q))
455f5fe3eedSJun Yang 		dpaa_write_fm_config_to_file();
456f5fe3eedSJun Yang 
457ff9e112dSShreyansh Jain 	/* Change tx callback to the real one */
4589124e65dSGagandeep Singh 	if (dpaa_intf->cgr_tx)
4599124e65dSGagandeep Singh 		dev->tx_pkt_burst = dpaa_eth_queue_tx_slow;
4609124e65dSGagandeep Singh 	else
46137f9b54bSShreyansh Jain 		dev->tx_pkt_burst = dpaa_eth_queue_tx;
4629124e65dSGagandeep Singh 
463*d2536b00SHemant Agrawal 	fman_if_bmi_stats_enable(fif);
464*d2536b00SHemant Agrawal 	fman_if_bmi_stats_reset(fif);
465*d2536b00SHemant Agrawal 	fman_if_enable_rx(fif);
466ff9e112dSShreyansh Jain 
467f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_rx_queues; i++)
468f1d381b4SJie Hai 		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
469f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_tx_queues; i++)
470f1d381b4SJie Hai 		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
471f1d381b4SJie Hai 
472ff9e112dSShreyansh Jain 	return 0;
473ff9e112dSShreyansh Jain }
474ff9e112dSShreyansh Jain 
47562024eb8SIvan Ilchenko static int dpaa_eth_dev_stop(struct rte_eth_dev *dev)
476ff9e112dSShreyansh Jain {
4776b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
478f1d381b4SJie Hai 	uint16_t i;
47937f9b54bSShreyansh Jain 
48037f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
481b8f5d2aeSThomas Monjalon 	dev->data->dev_started = 0;
48237f9b54bSShreyansh Jain 
483*d2536b00SHemant Agrawal 	if (!fif->is_shared_mac) {
484*d2536b00SHemant Agrawal 		fman_if_bmi_stats_disable(fif);
4856b10d1f7SNipun Gupta 		fman_if_disable_rx(fif);
486*d2536b00SHemant Agrawal 	}
48737f9b54bSShreyansh Jain 	dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
48862024eb8SIvan Ilchenko 
489f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_rx_queues; i++)
490f1d381b4SJie Hai 		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
491f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_tx_queues; i++)
492f1d381b4SJie Hai 		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
493f1d381b4SJie Hai 
49462024eb8SIvan Ilchenko 	return 0;
495ff9e112dSShreyansh Jain }
496ff9e112dSShreyansh Jain 
497b142387bSThomas Monjalon static int dpaa_eth_dev_close(struct rte_eth_dev *dev)
49837f9b54bSShreyansh Jain {
4992aa10990SRohit Raj 	struct fman_if *fif = dev->process_private;
5002aa10990SRohit Raj 	struct __fman_if *__fif;
5012aa10990SRohit Raj 	struct rte_device *rdev = dev->device;
5022aa10990SRohit Raj 	struct rte_dpaa_device *dpaa_dev;
5032aa10990SRohit Raj 	struct rte_intr_handle *intr_handle;
5047a292619SRohit Raj 	struct rte_eth_link *link = &dev->data->dev_link;
5052defb114SSachin Saxena 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
5062defb114SSachin Saxena 	int loop;
50762024eb8SIvan Ilchenko 	int ret;
5082aa10990SRohit Raj 
50937f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
51037f9b54bSShreyansh Jain 
5112defb114SSachin Saxena 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
5122defb114SSachin Saxena 		return 0;
5132defb114SSachin Saxena 
5142defb114SSachin Saxena 	if (!dpaa_intf) {
5152defb114SSachin Saxena 		DPAA_PMD_WARN("Already closed or not started");
5162defb114SSachin Saxena 		return -1;
5172defb114SSachin Saxena 	}
5182defb114SSachin Saxena 
5192defb114SSachin Saxena 	/* DPAA FM deconfig */
5202defb114SSachin Saxena 	if (!(default_q || fmc_q)) {
5212defb114SSachin Saxena 		if (dpaa_fm_deconfig(dpaa_intf, dev->process_private))
5221ec9a3afSHemant Agrawal 			DPAA_PMD_WARN("DPAA FM deconfig failed");
5232defb114SSachin Saxena 	}
5242defb114SSachin Saxena 
5252aa10990SRohit Raj 	dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
526d61138d4SHarman Kalra 	intr_handle = dpaa_dev->intr_handle;
5272aa10990SRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
5282aa10990SRohit Raj 
52962024eb8SIvan Ilchenko 	ret = dpaa_eth_dev_stop(dev);
5302aa10990SRohit Raj 
5317a292619SRohit Raj 	/* Reset link to autoneg */
5327a292619SRohit Raj 	if (link->link_status && !link->link_autoneg)
5337a292619SRohit Raj 		dpaa_restart_link_autoneg(__fif->node_name);
5347a292619SRohit Raj 
535d61138d4SHarman Kalra 	if (intr_handle && rte_intr_fd_get(intr_handle) &&
5362aa10990SRohit Raj 	    dev->data->dev_conf.intr_conf.lsc != 0) {
5372aa10990SRohit Raj 		dpaa_intr_disable(__fif->node_name);
5382aa10990SRohit Raj 		rte_intr_callback_unregister(intr_handle,
5392aa10990SRohit Raj 					     dpaa_interrupt_handler,
5402aa10990SRohit Raj 					     (void *)dev);
5412aa10990SRohit Raj 	}
542b142387bSThomas Monjalon 
5432defb114SSachin Saxena 	/* release configuration memory */
5442defb114SSachin Saxena 	rte_free(dpaa_intf->fc_conf);
5452defb114SSachin Saxena 
5462defb114SSachin Saxena 	/* Release RX congestion Groups */
5472defb114SSachin Saxena 	if (dpaa_intf->cgr_rx) {
5482defb114SSachin Saxena 		for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
5492defb114SSachin Saxena 			qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
5502defb114SSachin Saxena 	}
5512defb114SSachin Saxena 
5522defb114SSachin Saxena 	rte_free(dpaa_intf->cgr_rx);
5532defb114SSachin Saxena 	dpaa_intf->cgr_rx = NULL;
5542defb114SSachin Saxena 	/* Release TX congestion Groups */
5552defb114SSachin Saxena 	if (dpaa_intf->cgr_tx) {
5562defb114SSachin Saxena 		for (loop = 0; loop < MAX_DPAA_CORES; loop++)
5572defb114SSachin Saxena 			qman_delete_cgr(&dpaa_intf->cgr_tx[loop]);
5582defb114SSachin Saxena 		rte_free(dpaa_intf->cgr_tx);
5592defb114SSachin Saxena 		dpaa_intf->cgr_tx = NULL;
5602defb114SSachin Saxena 	}
5612defb114SSachin Saxena 
5622defb114SSachin Saxena 	rte_free(dpaa_intf->rx_queues);
5632defb114SSachin Saxena 	dpaa_intf->rx_queues = NULL;
5642defb114SSachin Saxena 
5652defb114SSachin Saxena 	rte_free(dpaa_intf->tx_queues);
5662defb114SSachin Saxena 	dpaa_intf->tx_queues = NULL;
5672defb114SSachin Saxena 
56862024eb8SIvan Ilchenko 	return ret;
56937f9b54bSShreyansh Jain }
57037f9b54bSShreyansh Jain 
571cf0fab1dSHemant Agrawal static int
572cf0fab1dSHemant Agrawal dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
573cf0fab1dSHemant Agrawal 		     char *fw_version,
574cf0fab1dSHemant Agrawal 		     size_t fw_size)
575cf0fab1dSHemant Agrawal {
576cf0fab1dSHemant Agrawal 	int ret;
577cf0fab1dSHemant Agrawal 	FILE *svr_file = NULL;
578cf0fab1dSHemant Agrawal 	unsigned int svr_ver = 0;
579cf0fab1dSHemant Agrawal 
580cf0fab1dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
581cf0fab1dSHemant Agrawal 
582cf0fab1dSHemant Agrawal 	svr_file = fopen(DPAA_SOC_ID_FILE, "r");
583cf0fab1dSHemant Agrawal 	if (!svr_file) {
584cf0fab1dSHemant Agrawal 		DPAA_PMD_ERR("Unable to open SoC device");
585cf0fab1dSHemant Agrawal 		return -ENOTSUP; /* Not supported on this infra */
586cf0fab1dSHemant Agrawal 	}
5873b59b73dSHemant Agrawal 	if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
5883b59b73dSHemant Agrawal 		dpaa_svr_family = svr_ver & SVR_MASK;
5893b59b73dSHemant Agrawal 	else
590cf0fab1dSHemant Agrawal 		DPAA_PMD_ERR("Unable to read SoC device");
591cf0fab1dSHemant Agrawal 
592a8e78906SHemant Agrawal 	fclose(svr_file);
593cf0fab1dSHemant Agrawal 
594a8e78906SHemant Agrawal 	ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
595a8e78906SHemant Agrawal 		       svr_ver, fman_ip_rev);
596d345d6c9SFerruh Yigit 	if (ret < 0)
597d345d6c9SFerruh Yigit 		return -EINVAL;
598a8e78906SHemant Agrawal 
599d345d6c9SFerruh Yigit 	ret += 1; /* add the size of '\0' */
600d345d6c9SFerruh Yigit 	if (fw_size < (size_t)ret)
601cf0fab1dSHemant Agrawal 		return ret;
602cf0fab1dSHemant Agrawal 	else
603cf0fab1dSHemant Agrawal 		return 0;
604cf0fab1dSHemant Agrawal }
605cf0fab1dSHemant Agrawal 
606bdad90d1SIvan Ilchenko static int dpaa_eth_dev_info(struct rte_eth_dev *dev,
607799db456SShreyansh Jain 			     struct rte_eth_dev_info *dev_info)
608799db456SShreyansh Jain {
609799db456SShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
6106b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
611799db456SShreyansh Jain 
61236528452SHemant Agrawal 	DPAA_PMD_DEBUG(": %s", dpaa_intf->name);
613799db456SShreyansh Jain 
614799db456SShreyansh Jain 	dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
615799db456SShreyansh Jain 	dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
616799db456SShreyansh Jain 	dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
617799db456SShreyansh Jain 	dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
618799db456SShreyansh Jain 	dev_info->max_hash_mac_addrs = 0;
619799db456SShreyansh Jain 	dev_info->max_vfs = 0;
620295968d1SFerruh Yigit 	dev_info->max_vmdq_pools = RTE_ETH_16_POOLS;
6214fa5e0bbSShreyansh Jain 	dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
622c1752a36SSachin Saxena 
6236b10d1f7SNipun Gupta 	if (fif->mac_type == fman_mac_1g) {
624295968d1SFerruh Yigit 		dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M_HD
625295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10M
626295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M_HD
627295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M
628295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_1G;
6296b10d1f7SNipun Gupta 	} else if (fif->mac_type == fman_mac_2_5g) {
630295968d1SFerruh Yigit 		dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M_HD
631295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10M
632295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M_HD
633295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M
634295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_1G
635295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_2_5G;
6366b10d1f7SNipun Gupta 	} else if (fif->mac_type == fman_mac_10g) {
637295968d1SFerruh Yigit 		dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M_HD
638295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10M
639295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M_HD
640295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M
641295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_1G
642295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_2_5G
643295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10G;
644bdad90d1SIvan Ilchenko 	} else {
645c1752a36SSachin Saxena 		DPAA_PMD_ERR("invalid link_speed: %s, %d",
6466b10d1f7SNipun Gupta 			     dpaa_intf->name, fif->mac_type);
647bdad90d1SIvan Ilchenko 		return -EINVAL;
648bdad90d1SIvan Ilchenko 	}
649c1752a36SSachin Saxena 
650c5836218SSunil Kumar Kori 	dev_info->rx_offload_capa = dev_rx_offloads_sup |
651c5836218SSunil Kumar Kori 					dev_rx_offloads_nodis;
652c5836218SSunil Kumar Kori 	dev_info->tx_offload_capa = dev_tx_offloads_sup |
653c5836218SSunil Kumar Kori 					dev_tx_offloads_nodis;
6542c01a48aSShreyansh Jain 	dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE;
6552c01a48aSShreyansh Jain 	dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE;
656e35ead33SHemant Agrawal 	dev_info->default_rxportconf.nb_queues = 1;
657e35ead33SHemant Agrawal 	dev_info->default_txportconf.nb_queues = 1;
658e35ead33SHemant Agrawal 	dev_info->default_txportconf.ring_size = CGR_TX_CGR_THRESH;
659e35ead33SHemant Agrawal 	dev_info->default_rxportconf.ring_size = CGR_RX_PERFQ_THRESH;
660bdad90d1SIvan Ilchenko 
661bdad90d1SIvan Ilchenko 	return 0;
662799db456SShreyansh Jain }
663799db456SShreyansh Jain 
6642e6f5657SApeksha Gupta static int
6652e6f5657SApeksha Gupta dpaa_dev_rx_burst_mode_get(struct rte_eth_dev *dev,
6662e6f5657SApeksha Gupta 			__rte_unused uint16_t queue_id,
6672e6f5657SApeksha Gupta 			struct rte_eth_burst_mode *mode)
6682e6f5657SApeksha Gupta {
6692e6f5657SApeksha Gupta 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
6702e6f5657SApeksha Gupta 	int ret = -EINVAL;
6712e6f5657SApeksha Gupta 	unsigned int i;
6722e6f5657SApeksha Gupta 	const struct burst_info {
6732e6f5657SApeksha Gupta 		uint64_t flags;
6742e6f5657SApeksha Gupta 		const char *output;
6752e6f5657SApeksha Gupta 	} rx_offload_map[] = {
676295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_SCATTER, " Scattered,"},
677295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_IPV4_CKSUM, " IPV4 csum,"},
678295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_UDP_CKSUM, " UDP csum,"},
679295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_TCP_CKSUM, " TCP csum,"},
680295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"},
681295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_RSS_HASH, " RSS,"}
6822e6f5657SApeksha Gupta 	};
6832e6f5657SApeksha Gupta 
6842e6f5657SApeksha Gupta 	/* Update Rx offload info */
6852e6f5657SApeksha Gupta 	for (i = 0; i < RTE_DIM(rx_offload_map); i++) {
6862e6f5657SApeksha Gupta 		if (eth_conf->rxmode.offloads & rx_offload_map[i].flags) {
6872e6f5657SApeksha Gupta 			snprintf(mode->info, sizeof(mode->info), "%s",
6882e6f5657SApeksha Gupta 				rx_offload_map[i].output);
6892e6f5657SApeksha Gupta 			ret = 0;
6902e6f5657SApeksha Gupta 			break;
6912e6f5657SApeksha Gupta 		}
6922e6f5657SApeksha Gupta 	}
6932e6f5657SApeksha Gupta 	return ret;
6942e6f5657SApeksha Gupta }
6952e6f5657SApeksha Gupta 
6962e6f5657SApeksha Gupta static int
6972e6f5657SApeksha Gupta dpaa_dev_tx_burst_mode_get(struct rte_eth_dev *dev,
6982e6f5657SApeksha Gupta 			__rte_unused uint16_t queue_id,
6992e6f5657SApeksha Gupta 			struct rte_eth_burst_mode *mode)
7002e6f5657SApeksha Gupta {
7012e6f5657SApeksha Gupta 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
7022e6f5657SApeksha Gupta 	int ret = -EINVAL;
7032e6f5657SApeksha Gupta 	unsigned int i;
7042e6f5657SApeksha Gupta 	const struct burst_info {
7052e6f5657SApeksha Gupta 		uint64_t flags;
7062e6f5657SApeksha Gupta 		const char *output;
7072e6f5657SApeksha Gupta 	} tx_offload_map[] = {
708295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_MT_LOCKFREE, " MT lockfree,"},
709295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE, " MBUF free disable,"},
710295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_IPV4_CKSUM, " IPV4 csum,"},
711295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_UDP_CKSUM, " UDP csum,"},
712295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_TCP_CKSUM, " TCP csum,"},
713295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_SCTP_CKSUM, " SCTP csum,"},
714295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"},
715295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_MULTI_SEGS, " Scattered,"}
7162e6f5657SApeksha Gupta 	};
7172e6f5657SApeksha Gupta 
7182e6f5657SApeksha Gupta 	/* Update Tx offload info */
7192e6f5657SApeksha Gupta 	for (i = 0; i < RTE_DIM(tx_offload_map); i++) {
7202e6f5657SApeksha Gupta 		if (eth_conf->txmode.offloads & tx_offload_map[i].flags) {
7212e6f5657SApeksha Gupta 			snprintf(mode->info, sizeof(mode->info), "%s",
7222e6f5657SApeksha Gupta 				tx_offload_map[i].output);
7232e6f5657SApeksha Gupta 			ret = 0;
7242e6f5657SApeksha Gupta 			break;
7252e6f5657SApeksha Gupta 		}
7262e6f5657SApeksha Gupta 	}
7272e6f5657SApeksha Gupta 	return ret;
7282e6f5657SApeksha Gupta }
7292e6f5657SApeksha Gupta 
730e124a69fSShreyansh Jain static int dpaa_eth_link_update(struct rte_eth_dev *dev,
73189b9bb08SRohit Raj 				int wait_to_complete)
732e124a69fSShreyansh Jain {
733e124a69fSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
734e124a69fSShreyansh Jain 	struct rte_eth_link *link = &dev->data->dev_link;
7356b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
7362aa10990SRohit Raj 	struct __fman_if *__fif = container_of(fif, struct __fman_if, __if);
7377a292619SRohit Raj 	int ret, ioctl_version;
73889b9bb08SRohit Raj 	uint8_t count;
739e124a69fSShreyansh Jain 
740e124a69fSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
741e124a69fSShreyansh Jain 
7427a292619SRohit Raj 	ioctl_version = dpaa_get_ioctl_version_number();
7437a292619SRohit Raj 
7447a292619SRohit Raj 	if (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC) {
74589b9bb08SRohit Raj 		for (count = 0; count <= MAX_REPEAT_TIME; count++) {
7467a292619SRohit Raj 			ret = dpaa_get_link_status(__fif->node_name, link);
7477a292619SRohit Raj 			if (ret)
7487a292619SRohit Raj 				return ret;
749295968d1SFerruh Yigit 			if (link->link_status == RTE_ETH_LINK_DOWN &&
75089b9bb08SRohit Raj 			    wait_to_complete)
75189b9bb08SRohit Raj 				rte_delay_ms(CHECK_INTERVAL);
75289b9bb08SRohit Raj 			else
75389b9bb08SRohit Raj 				break;
75489b9bb08SRohit Raj 		}
7557a292619SRohit Raj 	} else {
7567a292619SRohit Raj 		link->link_status = dpaa_intf->valid;
7577a292619SRohit Raj 	}
7587a292619SRohit Raj 
7597a292619SRohit Raj 	if (ioctl_version < 2) {
760295968d1SFerruh Yigit 		link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
761295968d1SFerruh Yigit 		link->link_autoneg = RTE_ETH_LINK_AUTONEG;
7627a292619SRohit Raj 
7636b10d1f7SNipun Gupta 		if (fif->mac_type == fman_mac_1g)
764295968d1SFerruh Yigit 			link->link_speed = RTE_ETH_SPEED_NUM_1G;
7656b10d1f7SNipun Gupta 		else if (fif->mac_type == fman_mac_2_5g)
766295968d1SFerruh Yigit 			link->link_speed = RTE_ETH_SPEED_NUM_2_5G;
7676b10d1f7SNipun Gupta 		else if (fif->mac_type == fman_mac_10g)
768295968d1SFerruh Yigit 			link->link_speed = RTE_ETH_SPEED_NUM_10G;
769e124a69fSShreyansh Jain 		else
770e124a69fSShreyansh Jain 			DPAA_PMD_ERR("invalid link_speed: %s, %d",
7716b10d1f7SNipun Gupta 				     dpaa_intf->name, fif->mac_type);
7722aa10990SRohit Raj 	}
7732aa10990SRohit Raj 
7741ec9a3afSHemant Agrawal 	DPAA_PMD_INFO("Port %d Link is %s", dev->data->port_id,
7752aa10990SRohit Raj 		      link->link_status ? "Up" : "Down");
776e124a69fSShreyansh Jain 	return 0;
777e124a69fSShreyansh Jain }
778e124a69fSShreyansh Jain 
779d5b0924bSMatan Azrad static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
780e1ad3a05SShreyansh Jain 			       struct rte_eth_stats *stats)
781e1ad3a05SShreyansh Jain {
782e1ad3a05SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
783e1ad3a05SShreyansh Jain 
7846b10d1f7SNipun Gupta 	fman_if_stats_get(dev->process_private, stats);
785d5b0924bSMatan Azrad 	return 0;
786e1ad3a05SShreyansh Jain }
787e1ad3a05SShreyansh Jain 
7889970a9adSIgor Romanov static int dpaa_eth_stats_reset(struct rte_eth_dev *dev)
789e1ad3a05SShreyansh Jain {
790e1ad3a05SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
791e1ad3a05SShreyansh Jain 
7926b10d1f7SNipun Gupta 	fman_if_stats_reset(dev->process_private);
793*d2536b00SHemant Agrawal 	fman_if_bmi_stats_reset(dev->process_private);
7949970a9adSIgor Romanov 
7959970a9adSIgor Romanov 	return 0;
796e1ad3a05SShreyansh Jain }
79795ef603dSShreyansh Jain 
798b21ed3e2SHemant Agrawal static int
799b21ed3e2SHemant Agrawal dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
800b21ed3e2SHemant Agrawal 		    unsigned int n)
801b21ed3e2SHemant Agrawal {
802*d2536b00SHemant Agrawal 	unsigned int i = 0, j, num = RTE_DIM(dpaa_xstats_strings);
803b21ed3e2SHemant Agrawal 	uint64_t values[sizeof(struct dpaa_if_stats) / 8];
804*d2536b00SHemant Agrawal 	unsigned int bmi_count = sizeof(struct dpaa_if_rx_bmi_stats) / 4;
805b21ed3e2SHemant Agrawal 
806b21ed3e2SHemant Agrawal 	if (n < num)
807b21ed3e2SHemant Agrawal 		return num;
808b21ed3e2SHemant Agrawal 
809339c1025SHemant Agrawal 	if (xstats == NULL)
810339c1025SHemant Agrawal 		return 0;
811339c1025SHemant Agrawal 
8126b10d1f7SNipun Gupta 	fman_if_stats_get_all(dev->process_private, values,
813b21ed3e2SHemant Agrawal 			      sizeof(struct dpaa_if_stats) / 8);
814b21ed3e2SHemant Agrawal 
815*d2536b00SHemant Agrawal 	for (i = 0; i < num - (bmi_count - 1); i++) {
816b21ed3e2SHemant Agrawal 		xstats[i].id = i;
817b21ed3e2SHemant Agrawal 		xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
818b21ed3e2SHemant Agrawal 	}
819*d2536b00SHemant Agrawal 	fman_if_bmi_stats_get_all(dev->process_private, values);
820*d2536b00SHemant Agrawal 	for (j = 0; i < num; i++, j++) {
821*d2536b00SHemant Agrawal 		xstats[i].id = i;
822*d2536b00SHemant Agrawal 		xstats[i].value = values[j];
823*d2536b00SHemant Agrawal 	}
824*d2536b00SHemant Agrawal 
825b21ed3e2SHemant Agrawal 	return i;
826b21ed3e2SHemant Agrawal }
827b21ed3e2SHemant Agrawal 
828b21ed3e2SHemant Agrawal static int
829b21ed3e2SHemant Agrawal dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
830b21ed3e2SHemant Agrawal 		      struct rte_eth_xstat_name *xstats_names,
8315c3fc73eSHemant Agrawal 		      unsigned int limit)
832b21ed3e2SHemant Agrawal {
833b21ed3e2SHemant Agrawal 	unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
834b21ed3e2SHemant Agrawal 
8355c3fc73eSHemant Agrawal 	if (limit < stat_cnt)
8365c3fc73eSHemant Agrawal 		return stat_cnt;
8375c3fc73eSHemant Agrawal 
838b21ed3e2SHemant Agrawal 	if (xstats_names != NULL)
839b21ed3e2SHemant Agrawal 		for (i = 0; i < stat_cnt; i++)
8406723c0fcSBruce Richardson 			strlcpy(xstats_names[i].name,
8416723c0fcSBruce Richardson 				dpaa_xstats_strings[i].name,
8426723c0fcSBruce Richardson 				sizeof(xstats_names[i].name));
843b21ed3e2SHemant Agrawal 
844b21ed3e2SHemant Agrawal 	return stat_cnt;
845b21ed3e2SHemant Agrawal }
846b21ed3e2SHemant Agrawal 
847b21ed3e2SHemant Agrawal static int
848b21ed3e2SHemant Agrawal dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
849b21ed3e2SHemant Agrawal 		      uint64_t *values, unsigned int n)
850b21ed3e2SHemant Agrawal {
851*d2536b00SHemant Agrawal 	unsigned int i, j, stat_cnt = RTE_DIM(dpaa_xstats_strings);
852b21ed3e2SHemant Agrawal 	uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
853*d2536b00SHemant Agrawal 	unsigned int bmi_count = sizeof(struct dpaa_if_rx_bmi_stats) / 4;
854b21ed3e2SHemant Agrawal 
855b21ed3e2SHemant Agrawal 	if (!ids) {
856b21ed3e2SHemant Agrawal 		if (n < stat_cnt)
857b21ed3e2SHemant Agrawal 			return stat_cnt;
858b21ed3e2SHemant Agrawal 
859b21ed3e2SHemant Agrawal 		if (!values)
860b21ed3e2SHemant Agrawal 			return 0;
861b21ed3e2SHemant Agrawal 
8626b10d1f7SNipun Gupta 		fman_if_stats_get_all(dev->process_private, values_copy,
8635c3fc73eSHemant Agrawal 				      sizeof(struct dpaa_if_stats) / 8);
864b21ed3e2SHemant Agrawal 
865*d2536b00SHemant Agrawal 		for (i = 0; i < stat_cnt - (bmi_count - 1); i++)
866b21ed3e2SHemant Agrawal 			values[i] =
867b21ed3e2SHemant Agrawal 				values_copy[dpaa_xstats_strings[i].offset / 8];
868b21ed3e2SHemant Agrawal 
869*d2536b00SHemant Agrawal 		fman_if_bmi_stats_get_all(dev->process_private, values);
870*d2536b00SHemant Agrawal 		for (j = 0; i < stat_cnt; i++, j++)
871*d2536b00SHemant Agrawal 			values[i] = values_copy[j];
872*d2536b00SHemant Agrawal 
873b21ed3e2SHemant Agrawal 		return stat_cnt;
874b21ed3e2SHemant Agrawal 	}
875b21ed3e2SHemant Agrawal 
876b21ed3e2SHemant Agrawal 	dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
877b21ed3e2SHemant Agrawal 
878b21ed3e2SHemant Agrawal 	for (i = 0; i < n; i++) {
879b21ed3e2SHemant Agrawal 		if (ids[i] >= stat_cnt) {
880b21ed3e2SHemant Agrawal 			DPAA_PMD_ERR("id value isn't valid");
881b21ed3e2SHemant Agrawal 			return -1;
882b21ed3e2SHemant Agrawal 		}
883b21ed3e2SHemant Agrawal 		values[i] = values_copy[ids[i]];
884b21ed3e2SHemant Agrawal 	}
885b21ed3e2SHemant Agrawal 	return n;
886b21ed3e2SHemant Agrawal }
887b21ed3e2SHemant Agrawal 
888b21ed3e2SHemant Agrawal static int
889b21ed3e2SHemant Agrawal dpaa_xstats_get_names_by_id(
890b21ed3e2SHemant Agrawal 	struct rte_eth_dev *dev,
891b21ed3e2SHemant Agrawal 	const uint64_t *ids,
8928c9f976fSAndrew Rybchenko 	struct rte_eth_xstat_name *xstats_names,
893b21ed3e2SHemant Agrawal 	unsigned int limit)
894b21ed3e2SHemant Agrawal {
895b21ed3e2SHemant Agrawal 	unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
896b21ed3e2SHemant Agrawal 	struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
897b21ed3e2SHemant Agrawal 
898b21ed3e2SHemant Agrawal 	if (!ids)
899b21ed3e2SHemant Agrawal 		return dpaa_xstats_get_names(dev, xstats_names, limit);
900b21ed3e2SHemant Agrawal 
901b21ed3e2SHemant Agrawal 	dpaa_xstats_get_names(dev, xstats_names_copy, limit);
902b21ed3e2SHemant Agrawal 
903b21ed3e2SHemant Agrawal 	for (i = 0; i < limit; i++) {
904b21ed3e2SHemant Agrawal 		if (ids[i] >= stat_cnt) {
905b21ed3e2SHemant Agrawal 			DPAA_PMD_ERR("id value isn't valid");
906b21ed3e2SHemant Agrawal 			return -1;
907b21ed3e2SHemant Agrawal 		}
908b21ed3e2SHemant Agrawal 		strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
909b21ed3e2SHemant Agrawal 	}
910b21ed3e2SHemant Agrawal 	return limit;
911b21ed3e2SHemant Agrawal }
912b21ed3e2SHemant Agrawal 
9139039c812SAndrew Rybchenko static int dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
91495ef603dSShreyansh Jain {
91595ef603dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
91695ef603dSShreyansh Jain 
9176b10d1f7SNipun Gupta 	fman_if_promiscuous_enable(dev->process_private);
9189039c812SAndrew Rybchenko 
9199039c812SAndrew Rybchenko 	return 0;
92095ef603dSShreyansh Jain }
92195ef603dSShreyansh Jain 
9229039c812SAndrew Rybchenko static int dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
92395ef603dSShreyansh Jain {
92495ef603dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
92595ef603dSShreyansh Jain 
9266b10d1f7SNipun Gupta 	fman_if_promiscuous_disable(dev->process_private);
9279039c812SAndrew Rybchenko 
9289039c812SAndrew Rybchenko 	return 0;
92995ef603dSShreyansh Jain }
93095ef603dSShreyansh Jain 
931ca041cd4SIvan Ilchenko static int dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
93244dd70a3SShreyansh Jain {
93344dd70a3SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
93444dd70a3SShreyansh Jain 
9356b10d1f7SNipun Gupta 	fman_if_set_mcast_filter_table(dev->process_private);
936ca041cd4SIvan Ilchenko 
937ca041cd4SIvan Ilchenko 	return 0;
93844dd70a3SShreyansh Jain }
93944dd70a3SShreyansh Jain 
940ca041cd4SIvan Ilchenko static int dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
94144dd70a3SShreyansh Jain {
94244dd70a3SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
94344dd70a3SShreyansh Jain 
9446b10d1f7SNipun Gupta 	fman_if_reset_mcast_filter_table(dev->process_private);
945ca041cd4SIvan Ilchenko 
946ca041cd4SIvan Ilchenko 	return 0;
94744dd70a3SShreyansh Jain }
94844dd70a3SShreyansh Jain 
949e4abd4ffSJun Yang static void dpaa_fman_if_pool_setup(struct rte_eth_dev *dev)
950e4abd4ffSJun Yang {
951e4abd4ffSJun Yang 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
952e4abd4ffSJun Yang 	struct fman_if_ic_params icp;
953e4abd4ffSJun Yang 	uint32_t fd_offset;
954e4abd4ffSJun Yang 	uint32_t bp_size;
955e4abd4ffSJun Yang 
956e4abd4ffSJun Yang 	memset(&icp, 0, sizeof(icp));
957e4abd4ffSJun Yang 	/* set ICEOF for to the default value , which is 0*/
958e4abd4ffSJun Yang 	icp.iciof = DEFAULT_ICIOF;
959e4abd4ffSJun Yang 	icp.iceof = DEFAULT_RX_ICEOF;
960e4abd4ffSJun Yang 	icp.icsz = DEFAULT_ICSZ;
961e4abd4ffSJun Yang 	fman_if_set_ic_params(dev->process_private, &icp);
962e4abd4ffSJun Yang 
963e4abd4ffSJun Yang 	fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
964e4abd4ffSJun Yang 	fman_if_set_fdoff(dev->process_private, fd_offset);
965e4abd4ffSJun Yang 
966e4abd4ffSJun Yang 	/* Buffer pool size should be equal to Dataroom Size*/
967e4abd4ffSJun Yang 	bp_size = rte_pktmbuf_data_room_size(dpaa_intf->bp_info->mp);
968e4abd4ffSJun Yang 
969e4abd4ffSJun Yang 	fman_if_set_bp(dev->process_private,
970e4abd4ffSJun Yang 		       dpaa_intf->bp_info->mp->size,
971e4abd4ffSJun Yang 		       dpaa_intf->bp_info->bpid, bp_size);
972e4abd4ffSJun Yang }
973e4abd4ffSJun Yang 
974e4abd4ffSJun Yang static inline int dpaa_eth_rx_queue_bp_check(struct rte_eth_dev *dev,
975e4abd4ffSJun Yang 					     int8_t vsp_id, uint32_t bpid)
976e4abd4ffSJun Yang {
977e4abd4ffSJun Yang 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
978e4abd4ffSJun Yang 	struct fman_if *fif = dev->process_private;
979e4abd4ffSJun Yang 
980e4abd4ffSJun Yang 	if (fif->num_profiles) {
981e4abd4ffSJun Yang 		if (vsp_id < 0)
982e4abd4ffSJun Yang 			vsp_id = fif->base_profile_id;
983e4abd4ffSJun Yang 	} else {
984e4abd4ffSJun Yang 		if (vsp_id < 0)
985e4abd4ffSJun Yang 			vsp_id = 0;
986e4abd4ffSJun Yang 	}
987e4abd4ffSJun Yang 
988e4abd4ffSJun Yang 	if (dpaa_intf->vsp_bpid[vsp_id] &&
989e4abd4ffSJun Yang 		bpid != dpaa_intf->vsp_bpid[vsp_id]) {
990e4abd4ffSJun Yang 		DPAA_PMD_ERR("Various MPs are assigned to RXQs with same VSP");
991e4abd4ffSJun Yang 
992e4abd4ffSJun Yang 		return -1;
993e4abd4ffSJun Yang 	}
994e4abd4ffSJun Yang 
995e4abd4ffSJun Yang 	return 0;
996e4abd4ffSJun Yang }
997e4abd4ffSJun Yang 
99837f9b54bSShreyansh Jain static
99937f9b54bSShreyansh Jain int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
100062f53995SHemant Agrawal 			    uint16_t nb_desc,
100137f9b54bSShreyansh Jain 			    unsigned int socket_id __rte_unused,
1002e335cce4SHemant Agrawal 			    const struct rte_eth_rxconf *rx_conf,
100337f9b54bSShreyansh Jain 			    struct rte_mempool *mp)
100437f9b54bSShreyansh Jain {
100537f9b54bSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
10066b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
100762f53995SHemant Agrawal 	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
10080c504f69SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
10095edc61eeSRohit Raj 	u32 ch_id, flags = 0;
10100c504f69SHemant Agrawal 	int ret;
101155576ac2SHemant Agrawal 	u32 buffsz = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM;
10121bb4a528SFerruh Yigit 	uint32_t max_rx_pktlen;
101337f9b54bSShreyansh Jain 
101437f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
101537f9b54bSShreyansh Jain 
10166fd3639aSHemant Agrawal 	if (queue_idx >= dev->data->nb_rx_queues) {
10176fd3639aSHemant Agrawal 		rte_errno = EOVERFLOW;
10186fd3639aSHemant Agrawal 		DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
10196fd3639aSHemant Agrawal 		      (void *)dev, queue_idx, dev->data->nb_rx_queues);
10206fd3639aSHemant Agrawal 		return -rte_errno;
10216fd3639aSHemant Agrawal 	}
10226fd3639aSHemant Agrawal 
1023e335cce4SHemant Agrawal 	/* Rx deferred start is not supported */
1024e335cce4SHemant Agrawal 	if (rx_conf->rx_deferred_start) {
1025e335cce4SHemant Agrawal 		DPAA_PMD_ERR("%p:Rx deferred start not supported", (void *)dev);
1026e335cce4SHemant Agrawal 		return -EINVAL;
1027e335cce4SHemant Agrawal 	}
10282cf9264fSHemant Agrawal 	rxq->nb_desc = UINT16_MAX;
10292cf9264fSHemant Agrawal 	rxq->offloads = rx_conf->offloads;
1030e335cce4SHemant Agrawal 
10316fd3639aSHemant Agrawal 	DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)",
10326fd3639aSHemant Agrawal 			queue_idx, rxq->fqid);
103337f9b54bSShreyansh Jain 
1034e4abd4ffSJun Yang 	if (!fif->num_profiles) {
1035e4abd4ffSJun Yang 		if (dpaa_intf->bp_info && dpaa_intf->bp_info->bp &&
1036e4abd4ffSJun Yang 			dpaa_intf->bp_info->mp != mp) {
1037e4abd4ffSJun Yang 			DPAA_PMD_WARN("Multiple pools on same interface not"
1038e4abd4ffSJun Yang 				      " supported");
1039e4abd4ffSJun Yang 			return -EINVAL;
1040e4abd4ffSJun Yang 		}
1041e4abd4ffSJun Yang 	} else {
1042e4abd4ffSJun Yang 		if (dpaa_eth_rx_queue_bp_check(dev, rxq->vsp_id,
1043e4abd4ffSJun Yang 			DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid)) {
1044e4abd4ffSJun Yang 			return -EINVAL;
1045e4abd4ffSJun Yang 		}
1046e4abd4ffSJun Yang 	}
1047e4abd4ffSJun Yang 
1048376fb49eSNipun Gupta 	if (dpaa_intf->bp_info && dpaa_intf->bp_info->bp &&
1049376fb49eSNipun Gupta 	    dpaa_intf->bp_info->mp != mp) {
1050376fb49eSNipun Gupta 		DPAA_PMD_WARN("Multiple pools on same interface not supported");
1051376fb49eSNipun Gupta 		return -EINVAL;
1052376fb49eSNipun Gupta 	}
1053376fb49eSNipun Gupta 
10541bb4a528SFerruh Yigit 	max_rx_pktlen = dev->data->mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN +
10551bb4a528SFerruh Yigit 		VLAN_TAG_SIZE;
105655576ac2SHemant Agrawal 	/* Max packet can fit in single buffer */
10571bb4a528SFerruh Yigit 	if (max_rx_pktlen <= buffsz) {
105855576ac2SHemant Agrawal 		;
105955576ac2SHemant Agrawal 	} else if (dev->data->dev_conf.rxmode.offloads &
1060295968d1SFerruh Yigit 			RTE_ETH_RX_OFFLOAD_SCATTER) {
10611bb4a528SFerruh Yigit 		if (max_rx_pktlen > buffsz * DPAA_SGT_MAX_ENTRIES) {
10621bb4a528SFerruh Yigit 			DPAA_PMD_ERR("Maximum Rx packet size %d too big to fit "
106355576ac2SHemant Agrawal 				"MaxSGlist %d",
10641bb4a528SFerruh Yigit 				max_rx_pktlen, buffsz * DPAA_SGT_MAX_ENTRIES);
106555576ac2SHemant Agrawal 			rte_errno = EOVERFLOW;
106655576ac2SHemant Agrawal 			return -rte_errno;
106755576ac2SHemant Agrawal 		}
106855576ac2SHemant Agrawal 	} else {
106955576ac2SHemant Agrawal 		DPAA_PMD_WARN("The requested maximum Rx packet size (%u) is"
107055576ac2SHemant Agrawal 		     " larger than a single mbuf (%u) and scattered"
107165afdda0SRohit Raj 		     " mode has not been requested", max_rx_pktlen, buffsz);
107255576ac2SHemant Agrawal 	}
107355576ac2SHemant Agrawal 
107437f9b54bSShreyansh Jain 	dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
107537f9b54bSShreyansh Jain 
1076e4abd4ffSJun Yang 	/* For shared interface, it's done in kernel, skip.*/
1077e4abd4ffSJun Yang 	if (!fif->is_shared_mac)
1078e4abd4ffSJun Yang 		dpaa_fman_if_pool_setup(dev);
107937f9b54bSShreyansh Jain 
1080e4abd4ffSJun Yang 	if (fif->num_profiles) {
1081e4abd4ffSJun Yang 		int8_t vsp_id = rxq->vsp_id;
108237f9b54bSShreyansh Jain 
1083e4abd4ffSJun Yang 		if (vsp_id >= 0) {
1084e4abd4ffSJun Yang 			ret = dpaa_port_vsp_update(dpaa_intf, fmc_q, vsp_id,
1085e4abd4ffSJun Yang 					DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid,
108665afdda0SRohit Raj 					fif, buffsz + RTE_PKTMBUF_HEADROOM);
1087e4abd4ffSJun Yang 			if (ret) {
1088e4abd4ffSJun Yang 				DPAA_PMD_ERR("dpaa_port_vsp_update failed");
1089e4abd4ffSJun Yang 				return ret;
109037f9b54bSShreyansh Jain 			}
1091e4abd4ffSJun Yang 		} else {
1092e4abd4ffSJun Yang 			DPAA_PMD_INFO("Base profile is associated to"
10931ec9a3afSHemant Agrawal 				" RXQ fqid:%d", rxq->fqid);
1094e4abd4ffSJun Yang 			if (fif->is_shared_mac) {
1095e4abd4ffSJun Yang 				DPAA_PMD_ERR("Fatal: Base profile is associated"
1096e4abd4ffSJun Yang 					     " to shared interface on DPDK.");
1097e4abd4ffSJun Yang 				return -EINVAL;
1098e4abd4ffSJun Yang 			}
1099e4abd4ffSJun Yang 			dpaa_intf->vsp_bpid[fif->base_profile_id] =
1100e4abd4ffSJun Yang 				DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid;
1101e4abd4ffSJun Yang 		}
1102e4abd4ffSJun Yang 	} else {
1103e4abd4ffSJun Yang 		dpaa_intf->vsp_bpid[0] =
1104e4abd4ffSJun Yang 			DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid;
1105e4abd4ffSJun Yang 	}
1106e4abd4ffSJun Yang 
1107e4abd4ffSJun Yang 	dpaa_intf->valid = 1;
110855576ac2SHemant Agrawal 	DPAA_PMD_DEBUG("if:%s sg_on = %d, max_frm =%d", dpaa_intf->name,
11091bb4a528SFerruh Yigit 		fman_if_get_sg_enable(fif), max_rx_pktlen);
11100c504f69SHemant Agrawal 	/* checking if push mode only, no error check for now */
1111a6a75240SNipun Gupta 	if (!rxq->is_static &&
1112a6a75240SNipun Gupta 	    dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
1113b9c94167SNipun Gupta 		struct qman_portal *qp;
1114a6a75240SNipun Gupta 		int q_fd;
1115b9c94167SNipun Gupta 
11160c504f69SHemant Agrawal 		dpaa_push_queue_idx++;
11170c504f69SHemant Agrawal 		opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
11180c504f69SHemant Agrawal 		opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
11190c504f69SHemant Agrawal 				   QM_FQCTRL_CTXASTASHING |
11200c504f69SHemant Agrawal 				   QM_FQCTRL_PREFERINCACHE;
11210c504f69SHemant Agrawal 		opts.fqd.context_a.stashing.exclusive = 0;
11227be78d02SJosh Soref 		/* In multicore scenario stashing becomes a bottleneck on LS1046.
1123b9083ea5SNipun Gupta 		 * So do not enable stashing in this case
1124b9083ea5SNipun Gupta 		 */
1125b9083ea5SNipun Gupta 		if (dpaa_svr_family != SVR_LS1046A_FAMILY)
11260c504f69SHemant Agrawal 			opts.fqd.context_a.stashing.annotation_cl =
11270c504f69SHemant Agrawal 						DPAA_IF_RX_ANNOTATION_STASH;
11280c504f69SHemant Agrawal 		opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
11290c504f69SHemant Agrawal 		opts.fqd.context_a.stashing.context_cl =
11300c504f69SHemant Agrawal 						DPAA_IF_RX_CONTEXT_STASH;
113162f53995SHemant Agrawal 
11320c504f69SHemant Agrawal 		/*Create a channel and associate given queue with the channel*/
11335edc61eeSRohit Raj 		qman_alloc_pool_range(&ch_id, 1, 1, 0);
11345edc61eeSRohit Raj 		rxq->ch_id = (u16)ch_id;
11355edc61eeSRohit Raj 
11360c504f69SHemant Agrawal 		opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
11370c504f69SHemant Agrawal 		opts.fqd.dest.channel = rxq->ch_id;
11380c504f69SHemant Agrawal 		opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
11390c504f69SHemant Agrawal 		flags = QMAN_INITFQ_FLAG_SCHED;
11400c504f69SHemant Agrawal 
11410c504f69SHemant Agrawal 		/* Configure tail drop */
11420c504f69SHemant Agrawal 		if (dpaa_intf->cgr_rx) {
11430c504f69SHemant Agrawal 			opts.we_mask |= QM_INITFQ_WE_CGID;
11440c504f69SHemant Agrawal 			opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
11450c504f69SHemant Agrawal 			opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
11460c504f69SHemant Agrawal 		}
11470c504f69SHemant Agrawal 		ret = qman_init_fq(rxq, flags, &opts);
11486fd3639aSHemant Agrawal 		if (ret) {
11496fd3639aSHemant Agrawal 			DPAA_PMD_ERR("Channel/Q association failed. fqid 0x%x "
11506fd3639aSHemant Agrawal 				"ret:%d(%s)", rxq->fqid, ret, strerror(ret));
11516fd3639aSHemant Agrawal 			return ret;
11526fd3639aSHemant Agrawal 		}
115319b4aba2SHemant Agrawal 		if (dpaa_svr_family == SVR_LS1043A_FAMILY) {
115419b4aba2SHemant Agrawal 			rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb_no_prefetch;
115519b4aba2SHemant Agrawal 		} else {
1156b9083ea5SNipun Gupta 			rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb;
1157b9083ea5SNipun Gupta 			rxq->cb.dqrr_prepare = dpaa_rx_cb_prepare;
115819b4aba2SHemant Agrawal 		}
115919b4aba2SHemant Agrawal 
11600c504f69SHemant Agrawal 		rxq->is_static = true;
1161b9c94167SNipun Gupta 
1162b9c94167SNipun Gupta 		/* Allocate qman specific portals */
1163a6a75240SNipun Gupta 		qp = fsl_qman_fq_portal_create(&q_fd);
1164b9c94167SNipun Gupta 		if (!qp) {
1165b9c94167SNipun Gupta 			DPAA_PMD_ERR("Unable to alloc fq portal");
1166b9c94167SNipun Gupta 			return -1;
1167b9c94167SNipun Gupta 		}
1168b9c94167SNipun Gupta 		rxq->qp = qp;
1169a6a75240SNipun Gupta 
1170a6a75240SNipun Gupta 		/* Set up the device interrupt handler */
1171d61138d4SHarman Kalra 		if (dev->intr_handle == NULL) {
1172a6a75240SNipun Gupta 			struct rte_dpaa_device *dpaa_dev;
1173a6a75240SNipun Gupta 			struct rte_device *rdev = dev->device;
1174a6a75240SNipun Gupta 
1175a6a75240SNipun Gupta 			dpaa_dev = container_of(rdev, struct rte_dpaa_device,
1176a6a75240SNipun Gupta 						device);
1177d61138d4SHarman Kalra 			dev->intr_handle = dpaa_dev->intr_handle;
1178d61138d4SHarman Kalra 			if (rte_intr_vec_list_alloc(dev->intr_handle,
1179d61138d4SHarman Kalra 					NULL, dpaa_push_mode_max_queue)) {
1180a6a75240SNipun Gupta 				DPAA_PMD_ERR("intr_vec alloc failed");
1181a6a75240SNipun Gupta 				return -ENOMEM;
1182a6a75240SNipun Gupta 			}
1183d61138d4SHarman Kalra 			if (rte_intr_nb_efd_set(dev->intr_handle,
1184d61138d4SHarman Kalra 					dpaa_push_mode_max_queue))
1185d61138d4SHarman Kalra 				return -rte_errno;
1186d61138d4SHarman Kalra 
1187d61138d4SHarman Kalra 			if (rte_intr_max_intr_set(dev->intr_handle,
1188d61138d4SHarman Kalra 					dpaa_push_mode_max_queue))
1189d61138d4SHarman Kalra 				return -rte_errno;
1190a6a75240SNipun Gupta 		}
1191a6a75240SNipun Gupta 
1192d61138d4SHarman Kalra 		if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_EXT))
1193d61138d4SHarman Kalra 			return -rte_errno;
1194d61138d4SHarman Kalra 
1195d61138d4SHarman Kalra 		if (rte_intr_vec_list_index_set(dev->intr_handle,
1196d61138d4SHarman Kalra 						queue_idx, queue_idx + 1))
1197d61138d4SHarman Kalra 			return -rte_errno;
1198d61138d4SHarman Kalra 
1199d61138d4SHarman Kalra 		if (rte_intr_efds_index_set(dev->intr_handle, queue_idx,
1200d61138d4SHarman Kalra 						   q_fd))
1201d61138d4SHarman Kalra 			return -rte_errno;
1202d61138d4SHarman Kalra 
1203a6a75240SNipun Gupta 		rxq->q_fd = q_fd;
12040c504f69SHemant Agrawal 	}
1205e1797f4bSAkhil Goyal 	rxq->bp_array = rte_dpaa_bpid_info;
120662f53995SHemant Agrawal 	dev->data->rx_queues[queue_idx] = rxq;
120762f53995SHemant Agrawal 
120862f53995SHemant Agrawal 	/* configure the CGR size as per the desc size */
120962f53995SHemant Agrawal 	if (dpaa_intf->cgr_rx) {
121062f53995SHemant Agrawal 		struct qm_mcc_initcgr cgr_opts = {0};
121162f53995SHemant Agrawal 
12122cf9264fSHemant Agrawal 		rxq->nb_desc = nb_desc;
121362f53995SHemant Agrawal 		/* Enable tail drop with cgr on this queue */
121462f53995SHemant Agrawal 		qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
121562f53995SHemant Agrawal 		ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
121662f53995SHemant Agrawal 		if (ret) {
121762f53995SHemant Agrawal 			DPAA_PMD_WARN(
121862f53995SHemant Agrawal 				"rx taildrop modify fail on fqid %d (ret=%d)",
121962f53995SHemant Agrawal 				rxq->fqid, ret);
122062f53995SHemant Agrawal 		}
122162f53995SHemant Agrawal 	}
122295d226f0SNipun Gupta 	/* Enable main queue to receive error packets also by default */
122395d226f0SNipun Gupta 	fman_if_set_err_fqid(fif, rxq->fqid);
122437f9b54bSShreyansh Jain 	return 0;
122537f9b54bSShreyansh Jain }
122637f9b54bSShreyansh Jain 
12271e06b6dcSHemant Agrawal int
122877b7b81eSNeil Horman dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
12295e745593SSunil Kumar Kori 		int eth_rx_queue_id,
12305e745593SSunil Kumar Kori 		u16 ch_id,
12315e745593SSunil Kumar Kori 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
12325e745593SSunil Kumar Kori {
12335e745593SSunil Kumar Kori 	int ret;
12345e745593SSunil Kumar Kori 	u32 flags = 0;
12355e745593SSunil Kumar Kori 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
12365e745593SSunil Kumar Kori 	struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
12375e745593SSunil Kumar Kori 	struct qm_mcc_initfq opts = {0};
12385e745593SSunil Kumar Kori 
12391af8b0b2SDavid Marchand 	if (dpaa_push_mode_max_queue) {
12401af8b0b2SDavid Marchand 		DPAA_PMD_WARN("PUSH mode q and EVENTDEV are not compatible");
12411af8b0b2SDavid Marchand 		DPAA_PMD_WARN("PUSH mode already enabled for first %d queues.",
12425e745593SSunil Kumar Kori 			      dpaa_push_mode_max_queue);
12431af8b0b2SDavid Marchand 		DPAA_PMD_WARN("To disable set DPAA_PUSH_QUEUES_NUMBER to 0");
12441af8b0b2SDavid Marchand 	}
12455e745593SSunil Kumar Kori 
12465e745593SSunil Kumar Kori 	dpaa_poll_queue_default_config(&opts);
12475e745593SSunil Kumar Kori 
12485e745593SSunil Kumar Kori 	switch (queue_conf->ev.sched_type) {
12495e745593SSunil Kumar Kori 	case RTE_SCHED_TYPE_ATOMIC:
12505e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
12515e745593SSunil Kumar Kori 		/* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
12525e745593SSunil Kumar Kori 		 * configuration with HOLD_ACTIVE setting
12535e745593SSunil Kumar Kori 		 */
12545e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
12555e745593SSunil Kumar Kori 		rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_atomic;
12565e745593SSunil Kumar Kori 		break;
12575e745593SSunil Kumar Kori 	case RTE_SCHED_TYPE_ORDERED:
12581ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Ordered queue schedule type is not supported");
12595e745593SSunil Kumar Kori 		return -1;
12605e745593SSunil Kumar Kori 	default:
12615e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
12625e745593SSunil Kumar Kori 		rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_parallel;
12635e745593SSunil Kumar Kori 		break;
12645e745593SSunil Kumar Kori 	}
12655e745593SSunil Kumar Kori 
12665e745593SSunil Kumar Kori 	opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
12675e745593SSunil Kumar Kori 	opts.fqd.dest.channel = ch_id;
12685e745593SSunil Kumar Kori 	opts.fqd.dest.wq = queue_conf->ev.priority;
12695e745593SSunil Kumar Kori 
12705e745593SSunil Kumar Kori 	if (dpaa_intf->cgr_rx) {
12715e745593SSunil Kumar Kori 		opts.we_mask |= QM_INITFQ_WE_CGID;
12725e745593SSunil Kumar Kori 		opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
12735e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
12745e745593SSunil Kumar Kori 	}
12755e745593SSunil Kumar Kori 
12765e745593SSunil Kumar Kori 	flags = QMAN_INITFQ_FLAG_SCHED;
12775e745593SSunil Kumar Kori 
12785e745593SSunil Kumar Kori 	ret = qman_init_fq(rxq, flags, &opts);
12795e745593SSunil Kumar Kori 	if (ret) {
12806fd3639aSHemant Agrawal 		DPAA_PMD_ERR("Ev-Channel/Q association failed. fqid 0x%x "
12816fd3639aSHemant Agrawal 				"ret:%d(%s)", rxq->fqid, ret, strerror(ret));
12825e745593SSunil Kumar Kori 		return ret;
12835e745593SSunil Kumar Kori 	}
12845e745593SSunil Kumar Kori 
12855e745593SSunil Kumar Kori 	/* copy configuration which needs to be filled during dequeue */
12865e745593SSunil Kumar Kori 	memcpy(&rxq->ev, &queue_conf->ev, sizeof(struct rte_event));
12875e745593SSunil Kumar Kori 	dev->data->rx_queues[eth_rx_queue_id] = rxq;
12885e745593SSunil Kumar Kori 
12895e745593SSunil Kumar Kori 	return ret;
12905e745593SSunil Kumar Kori }
12915e745593SSunil Kumar Kori 
12921e06b6dcSHemant Agrawal int
129377b7b81eSNeil Horman dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
12945e745593SSunil Kumar Kori 		int eth_rx_queue_id)
12955e745593SSunil Kumar Kori {
1296ee6647e0SGagandeep Singh 	struct qm_mcc_initfq opts = {0};
12975e745593SSunil Kumar Kori 	int ret;
12985e745593SSunil Kumar Kori 	u32 flags = 0;
12995e745593SSunil Kumar Kori 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
13005e745593SSunil Kumar Kori 	struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
13015e745593SSunil Kumar Kori 
1302ee6647e0SGagandeep Singh 	qman_retire_fq(rxq, NULL);
1303ee6647e0SGagandeep Singh 	qman_oos_fq(rxq);
13045e745593SSunil Kumar Kori 	ret = qman_init_fq(rxq, flags, &opts);
13055e745593SSunil Kumar Kori 	if (ret) {
1306ee6647e0SGagandeep Singh 		DPAA_PMD_ERR("detach rx fqid %d failed with ret: %d",
13075e745593SSunil Kumar Kori 			     rxq->fqid, ret);
13085e745593SSunil Kumar Kori 	}
13095e745593SSunil Kumar Kori 
13105e745593SSunil Kumar Kori 	rxq->cb.dqrr_dpdk_cb = NULL;
13115e745593SSunil Kumar Kori 	dev->data->rx_queues[eth_rx_queue_id] = NULL;
13125e745593SSunil Kumar Kori 
13135e745593SSunil Kumar Kori 	return 0;
13145e745593SSunil Kumar Kori }
13155e745593SSunil Kumar Kori 
131637f9b54bSShreyansh Jain static
131737f9b54bSShreyansh Jain int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
131837f9b54bSShreyansh Jain 			    uint16_t nb_desc __rte_unused,
131937f9b54bSShreyansh Jain 		unsigned int socket_id __rte_unused,
1320e335cce4SHemant Agrawal 		const struct rte_eth_txconf *tx_conf)
132137f9b54bSShreyansh Jain {
132237f9b54bSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
13232cf9264fSHemant Agrawal 	struct qman_fq *txq = &dpaa_intf->tx_queues[queue_idx];
132437f9b54bSShreyansh Jain 
132537f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
132637f9b54bSShreyansh Jain 
1327e335cce4SHemant Agrawal 	/* Tx deferred start is not supported */
1328e335cce4SHemant Agrawal 	if (tx_conf->tx_deferred_start) {
1329e335cce4SHemant Agrawal 		DPAA_PMD_ERR("%p:Tx deferred start not supported", (void *)dev);
1330e335cce4SHemant Agrawal 		return -EINVAL;
1331e335cce4SHemant Agrawal 	}
13322cf9264fSHemant Agrawal 	txq->nb_desc = UINT16_MAX;
13332cf9264fSHemant Agrawal 	txq->offloads = tx_conf->offloads;
13342cf9264fSHemant Agrawal 
13356fd3639aSHemant Agrawal 	if (queue_idx >= dev->data->nb_tx_queues) {
13366fd3639aSHemant Agrawal 		rte_errno = EOVERFLOW;
13376fd3639aSHemant Agrawal 		DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
13386fd3639aSHemant Agrawal 		      (void *)dev, queue_idx, dev->data->nb_tx_queues);
13396fd3639aSHemant Agrawal 		return -rte_errno;
13406fd3639aSHemant Agrawal 	}
13416fd3639aSHemant Agrawal 
13426fd3639aSHemant Agrawal 	DPAA_PMD_INFO("Tx queue setup for queue index: %d fq_id (0x%x)",
13432cf9264fSHemant Agrawal 			queue_idx, txq->fqid);
13442cf9264fSHemant Agrawal 	dev->data->tx_queues[queue_idx] = txq;
13459124e65dSGagandeep Singh 
134637f9b54bSShreyansh Jain 	return 0;
134737f9b54bSShreyansh Jain }
134837f9b54bSShreyansh Jain 
1349b005d729SHemant Agrawal static uint32_t
13508d7d4fcdSKonstantin Ananyev dpaa_dev_rx_queue_count(void *rx_queue)
1351b005d729SHemant Agrawal {
13528d7d4fcdSKonstantin Ananyev 	struct qman_fq *rxq = rx_queue;
1353b005d729SHemant Agrawal 	u32 frm_cnt = 0;
1354b005d729SHemant Agrawal 
1355b005d729SHemant Agrawal 	PMD_INIT_FUNC_TRACE();
1356b005d729SHemant Agrawal 
1357b005d729SHemant Agrawal 	if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
13588d7d4fcdSKonstantin Ananyev 		DPAA_PMD_DEBUG("RX frame count for q(%p) is %u",
13598d7d4fcdSKonstantin Ananyev 			       rx_queue, frm_cnt);
1360b005d729SHemant Agrawal 	}
1361b005d729SHemant Agrawal 	return frm_cnt;
1362b005d729SHemant Agrawal }
1363b005d729SHemant Agrawal 
1364e124a69fSShreyansh Jain static int dpaa_link_down(struct rte_eth_dev *dev)
1365e124a69fSShreyansh Jain {
1366f231d48dSRohit Raj 	struct fman_if *fif = dev->process_private;
1367f231d48dSRohit Raj 	struct __fman_if *__fif;
1368f231d48dSRohit Raj 
1369e124a69fSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1370e124a69fSShreyansh Jain 
1371f231d48dSRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
1372f231d48dSRohit Raj 
1373f231d48dSRohit Raj 	if (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
1374295968d1SFerruh Yigit 		dpaa_update_link_status(__fif->node_name, RTE_ETH_LINK_DOWN);
1375f231d48dSRohit Raj 	else
137662024eb8SIvan Ilchenko 		return dpaa_eth_dev_stop(dev);
1377e124a69fSShreyansh Jain 	return 0;
1378e124a69fSShreyansh Jain }
1379e124a69fSShreyansh Jain 
1380e124a69fSShreyansh Jain static int dpaa_link_up(struct rte_eth_dev *dev)
1381e124a69fSShreyansh Jain {
1382f231d48dSRohit Raj 	struct fman_if *fif = dev->process_private;
1383f231d48dSRohit Raj 	struct __fman_if *__fif;
1384f231d48dSRohit Raj 
1385e124a69fSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1386e124a69fSShreyansh Jain 
1387f231d48dSRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
1388f231d48dSRohit Raj 
1389f231d48dSRohit Raj 	if (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
1390295968d1SFerruh Yigit 		dpaa_update_link_status(__fif->node_name, RTE_ETH_LINK_UP);
1391f231d48dSRohit Raj 	else
1392e124a69fSShreyansh Jain 		dpaa_eth_dev_start(dev);
1393e124a69fSShreyansh Jain 	return 0;
1394e124a69fSShreyansh Jain }
1395e124a69fSShreyansh Jain 
1396fe6c6032SShreyansh Jain static int
139712a4678aSShreyansh Jain dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
139812a4678aSShreyansh Jain 		   struct rte_eth_fc_conf *fc_conf)
139912a4678aSShreyansh Jain {
140012a4678aSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
140112a4678aSShreyansh Jain 	struct rte_eth_fc_conf *net_fc;
140212a4678aSShreyansh Jain 
140312a4678aSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
140412a4678aSShreyansh Jain 
140512a4678aSShreyansh Jain 	if (!(dpaa_intf->fc_conf)) {
140612a4678aSShreyansh Jain 		dpaa_intf->fc_conf = rte_zmalloc(NULL,
140712a4678aSShreyansh Jain 			sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
140812a4678aSShreyansh Jain 		if (!dpaa_intf->fc_conf) {
140912a4678aSShreyansh Jain 			DPAA_PMD_ERR("unable to save flow control info");
141012a4678aSShreyansh Jain 			return -ENOMEM;
141112a4678aSShreyansh Jain 		}
141212a4678aSShreyansh Jain 	}
141312a4678aSShreyansh Jain 	net_fc = dpaa_intf->fc_conf;
141412a4678aSShreyansh Jain 
141512a4678aSShreyansh Jain 	if (fc_conf->high_water < fc_conf->low_water) {
141612a4678aSShreyansh Jain 		DPAA_PMD_ERR("Incorrect Flow Control Configuration");
141712a4678aSShreyansh Jain 		return -EINVAL;
141812a4678aSShreyansh Jain 	}
141912a4678aSShreyansh Jain 
1420295968d1SFerruh Yigit 	if (fc_conf->mode == RTE_ETH_FC_NONE) {
142112a4678aSShreyansh Jain 		return 0;
1422295968d1SFerruh Yigit 	} else if (fc_conf->mode == RTE_ETH_FC_TX_PAUSE ||
1423295968d1SFerruh Yigit 		 fc_conf->mode == RTE_ETH_FC_FULL) {
14246b10d1f7SNipun Gupta 		fman_if_set_fc_threshold(dev->process_private,
14256b10d1f7SNipun Gupta 					 fc_conf->high_water,
142612a4678aSShreyansh Jain 					 fc_conf->low_water,
142712a4678aSShreyansh Jain 					 dpaa_intf->bp_info->bpid);
142812a4678aSShreyansh Jain 		if (fc_conf->pause_time)
14296b10d1f7SNipun Gupta 			fman_if_set_fc_quanta(dev->process_private,
143012a4678aSShreyansh Jain 					      fc_conf->pause_time);
143112a4678aSShreyansh Jain 	}
143212a4678aSShreyansh Jain 
143312a4678aSShreyansh Jain 	/* Save the information in dpaa device */
143412a4678aSShreyansh Jain 	net_fc->pause_time = fc_conf->pause_time;
143512a4678aSShreyansh Jain 	net_fc->high_water = fc_conf->high_water;
143612a4678aSShreyansh Jain 	net_fc->low_water = fc_conf->low_water;
143712a4678aSShreyansh Jain 	net_fc->send_xon = fc_conf->send_xon;
143812a4678aSShreyansh Jain 	net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
143912a4678aSShreyansh Jain 	net_fc->mode = fc_conf->mode;
144012a4678aSShreyansh Jain 	net_fc->autoneg = fc_conf->autoneg;
144112a4678aSShreyansh Jain 
144212a4678aSShreyansh Jain 	return 0;
144312a4678aSShreyansh Jain }
144412a4678aSShreyansh Jain 
144512a4678aSShreyansh Jain static int
144612a4678aSShreyansh Jain dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
144712a4678aSShreyansh Jain 		   struct rte_eth_fc_conf *fc_conf)
144812a4678aSShreyansh Jain {
144912a4678aSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
145012a4678aSShreyansh Jain 	struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
145112a4678aSShreyansh Jain 	int ret;
145212a4678aSShreyansh Jain 
145312a4678aSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
145412a4678aSShreyansh Jain 
145512a4678aSShreyansh Jain 	if (net_fc) {
145612a4678aSShreyansh Jain 		fc_conf->pause_time = net_fc->pause_time;
145712a4678aSShreyansh Jain 		fc_conf->high_water = net_fc->high_water;
145812a4678aSShreyansh Jain 		fc_conf->low_water = net_fc->low_water;
145912a4678aSShreyansh Jain 		fc_conf->send_xon = net_fc->send_xon;
146012a4678aSShreyansh Jain 		fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
146112a4678aSShreyansh Jain 		fc_conf->mode = net_fc->mode;
146212a4678aSShreyansh Jain 		fc_conf->autoneg = net_fc->autoneg;
146312a4678aSShreyansh Jain 		return 0;
146412a4678aSShreyansh Jain 	}
14656b10d1f7SNipun Gupta 	ret = fman_if_get_fc_threshold(dev->process_private);
146612a4678aSShreyansh Jain 	if (ret) {
1467295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_TX_PAUSE;
14686b10d1f7SNipun Gupta 		fc_conf->pause_time =
14696b10d1f7SNipun Gupta 			fman_if_get_fc_quanta(dev->process_private);
147012a4678aSShreyansh Jain 	} else {
1471295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_NONE;
147212a4678aSShreyansh Jain 	}
147312a4678aSShreyansh Jain 
147412a4678aSShreyansh Jain 	return 0;
147512a4678aSShreyansh Jain }
147612a4678aSShreyansh Jain 
147712a4678aSShreyansh Jain static int
1478fe6c6032SShreyansh Jain dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
14796d13ea8eSOlivier Matz 			     struct rte_ether_addr *addr,
1480fe6c6032SShreyansh Jain 			     uint32_t index,
1481fe6c6032SShreyansh Jain 			     __rte_unused uint32_t pool)
1482fe6c6032SShreyansh Jain {
1483fe6c6032SShreyansh Jain 	int ret;
1484fe6c6032SShreyansh Jain 
1485fe6c6032SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1486fe6c6032SShreyansh Jain 
14876b10d1f7SNipun Gupta 	ret = fman_if_add_mac_addr(dev->process_private,
14886b10d1f7SNipun Gupta 				   addr->addr_bytes, index);
1489fe6c6032SShreyansh Jain 
1490fe6c6032SShreyansh Jain 	if (ret)
1491b7c7ff6eSStephen Hemminger 		DPAA_PMD_ERR("Adding the MAC ADDR failed: err = %d", ret);
1492fe6c6032SShreyansh Jain 	return 0;
1493fe6c6032SShreyansh Jain }
1494fe6c6032SShreyansh Jain 
1495fe6c6032SShreyansh Jain static void
1496fe6c6032SShreyansh Jain dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
1497fe6c6032SShreyansh Jain 			  uint32_t index)
1498fe6c6032SShreyansh Jain {
1499fe6c6032SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1500fe6c6032SShreyansh Jain 
15016b10d1f7SNipun Gupta 	fman_if_clear_mac_addr(dev->process_private, index);
1502fe6c6032SShreyansh Jain }
1503fe6c6032SShreyansh Jain 
1504caccf8b3SOlivier Matz static int
1505fe6c6032SShreyansh Jain dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
15066d13ea8eSOlivier Matz 		       struct rte_ether_addr *addr)
1507fe6c6032SShreyansh Jain {
1508fe6c6032SShreyansh Jain 	int ret;
1509fe6c6032SShreyansh Jain 
1510fe6c6032SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1511fe6c6032SShreyansh Jain 
15126b10d1f7SNipun Gupta 	ret = fman_if_add_mac_addr(dev->process_private, addr->addr_bytes, 0);
1513fe6c6032SShreyansh Jain 	if (ret)
1514b7c7ff6eSStephen Hemminger 		DPAA_PMD_ERR("Setting the MAC ADDR failed %d", ret);
1515caccf8b3SOlivier Matz 
1516caccf8b3SOlivier Matz 	return ret;
1517fe6c6032SShreyansh Jain }
1518fe6c6032SShreyansh Jain 
1519627e677dSSachin Saxena static int
1520627e677dSSachin Saxena dpaa_dev_rss_hash_update(struct rte_eth_dev *dev,
1521627e677dSSachin Saxena 			 struct rte_eth_rss_conf *rss_conf)
1522627e677dSSachin Saxena {
1523627e677dSSachin Saxena 	struct rte_eth_dev_data *data = dev->data;
1524627e677dSSachin Saxena 	struct rte_eth_conf *eth_conf = &data->dev_conf;
1525627e677dSSachin Saxena 
1526627e677dSSachin Saxena 	PMD_INIT_FUNC_TRACE();
1527627e677dSSachin Saxena 
1528627e677dSSachin Saxena 	if (!(default_q || fmc_q)) {
1529627e677dSSachin Saxena 		if (dpaa_fm_config(dev, rss_conf->rss_hf)) {
15301ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("FM port configuration: Failed");
1531627e677dSSachin Saxena 			return -1;
1532627e677dSSachin Saxena 		}
1533627e677dSSachin Saxena 		eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1534627e677dSSachin Saxena 	} else {
15351ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Function not supported");
1536627e677dSSachin Saxena 		return -ENOTSUP;
1537627e677dSSachin Saxena 	}
1538627e677dSSachin Saxena 	return 0;
1539627e677dSSachin Saxena }
1540627e677dSSachin Saxena 
1541627e677dSSachin Saxena static int
1542627e677dSSachin Saxena dpaa_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1543627e677dSSachin Saxena 			   struct rte_eth_rss_conf *rss_conf)
1544627e677dSSachin Saxena {
1545627e677dSSachin Saxena 	struct rte_eth_dev_data *data = dev->data;
1546627e677dSSachin Saxena 	struct rte_eth_conf *eth_conf = &data->dev_conf;
1547627e677dSSachin Saxena 
1548627e677dSSachin Saxena 	/* dpaa does not support rss_key, so length should be 0*/
1549627e677dSSachin Saxena 	rss_conf->rss_key_len = 0;
1550627e677dSSachin Saxena 	rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1551627e677dSSachin Saxena 	return 0;
1552627e677dSSachin Saxena }
1553627e677dSSachin Saxena 
1554b1b5d6c9SNipun Gupta static int dpaa_dev_queue_intr_enable(struct rte_eth_dev *dev,
1555b1b5d6c9SNipun Gupta 				      uint16_t queue_id)
1556b1b5d6c9SNipun Gupta {
1557b1b5d6c9SNipun Gupta 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
1558b1b5d6c9SNipun Gupta 	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
1559b1b5d6c9SNipun Gupta 
1560b1b5d6c9SNipun Gupta 	if (!rxq->is_static)
1561b1b5d6c9SNipun Gupta 		return -EINVAL;
1562b1b5d6c9SNipun Gupta 
1563b1b5d6c9SNipun Gupta 	return qman_fq_portal_irqsource_add(rxq->qp, QM_PIRQ_DQRI);
1564b1b5d6c9SNipun Gupta }
1565b1b5d6c9SNipun Gupta 
1566b1b5d6c9SNipun Gupta static int dpaa_dev_queue_intr_disable(struct rte_eth_dev *dev,
1567b1b5d6c9SNipun Gupta 				       uint16_t queue_id)
1568b1b5d6c9SNipun Gupta {
1569b1b5d6c9SNipun Gupta 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
1570b1b5d6c9SNipun Gupta 	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
1571b1b5d6c9SNipun Gupta 	uint32_t temp;
1572b1b5d6c9SNipun Gupta 	ssize_t temp1;
1573b1b5d6c9SNipun Gupta 
1574b1b5d6c9SNipun Gupta 	if (!rxq->is_static)
1575b1b5d6c9SNipun Gupta 		return -EINVAL;
1576b1b5d6c9SNipun Gupta 
1577b1b5d6c9SNipun Gupta 	qman_fq_portal_irqsource_remove(rxq->qp, ~0);
1578b1b5d6c9SNipun Gupta 
1579b1b5d6c9SNipun Gupta 	temp1 = read(rxq->q_fd, &temp, sizeof(temp));
1580b1b5d6c9SNipun Gupta 	if (temp1 != sizeof(temp))
158105500852SVanshika Shukla 		DPAA_PMD_DEBUG("read did not return anything");
1582b1b5d6c9SNipun Gupta 
1583b1b5d6c9SNipun Gupta 	qman_fq_portal_thread_irq(rxq->qp);
1584b1b5d6c9SNipun Gupta 
1585b1b5d6c9SNipun Gupta 	return 0;
1586b1b5d6c9SNipun Gupta }
1587b1b5d6c9SNipun Gupta 
15882cf9264fSHemant Agrawal static void
15892cf9264fSHemant Agrawal dpaa_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
15902cf9264fSHemant Agrawal 	struct rte_eth_rxq_info *qinfo)
15912cf9264fSHemant Agrawal {
15922cf9264fSHemant Agrawal 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
15932cf9264fSHemant Agrawal 	struct qman_fq *rxq;
1594378cd488SHemant Agrawal 	int ret;
15952cf9264fSHemant Agrawal 
15962cf9264fSHemant Agrawal 	rxq = dev->data->rx_queues[queue_id];
15972cf9264fSHemant Agrawal 
15982cf9264fSHemant Agrawal 	qinfo->mp = dpaa_intf->bp_info->mp;
15992cf9264fSHemant Agrawal 	qinfo->scattered_rx = dev->data->scattered_rx;
16002cf9264fSHemant Agrawal 	qinfo->nb_desc = rxq->nb_desc;
1601378cd488SHemant Agrawal 
1602378cd488SHemant Agrawal 	/* Report the HW Rx buffer length to user */
1603378cd488SHemant Agrawal 	ret = fman_if_get_maxfrm(dev->process_private);
1604378cd488SHemant Agrawal 	if (ret > 0)
1605378cd488SHemant Agrawal 		qinfo->rx_buf_size = ret;
1606378cd488SHemant Agrawal 
16072cf9264fSHemant Agrawal 	qinfo->conf.rx_free_thresh = 1;
16082cf9264fSHemant Agrawal 	qinfo->conf.rx_drop_en = 1;
16092cf9264fSHemant Agrawal 	qinfo->conf.rx_deferred_start = 0;
16102cf9264fSHemant Agrawal 	qinfo->conf.offloads = rxq->offloads;
16112cf9264fSHemant Agrawal }
16122cf9264fSHemant Agrawal 
16132cf9264fSHemant Agrawal static void
16142cf9264fSHemant Agrawal dpaa_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
16152cf9264fSHemant Agrawal 	struct rte_eth_txq_info *qinfo)
16162cf9264fSHemant Agrawal {
16172cf9264fSHemant Agrawal 	struct qman_fq *txq;
16182cf9264fSHemant Agrawal 
16192cf9264fSHemant Agrawal 	txq = dev->data->tx_queues[queue_id];
16202cf9264fSHemant Agrawal 
16212cf9264fSHemant Agrawal 	qinfo->nb_desc = txq->nb_desc;
16222cf9264fSHemant Agrawal 	qinfo->conf.tx_thresh.pthresh = 0;
16232cf9264fSHemant Agrawal 	qinfo->conf.tx_thresh.hthresh = 0;
16242cf9264fSHemant Agrawal 	qinfo->conf.tx_thresh.wthresh = 0;
16252cf9264fSHemant Agrawal 
16262cf9264fSHemant Agrawal 	qinfo->conf.tx_free_thresh = 0;
16272cf9264fSHemant Agrawal 	qinfo->conf.tx_rs_thresh = 0;
16282cf9264fSHemant Agrawal 	qinfo->conf.offloads = txq->offloads;
16292cf9264fSHemant Agrawal 	qinfo->conf.tx_deferred_start = 0;
16302cf9264fSHemant Agrawal }
16312cf9264fSHemant Agrawal 
1632ff9e112dSShreyansh Jain static struct eth_dev_ops dpaa_devops = {
1633ff9e112dSShreyansh Jain 	.dev_configure		  = dpaa_eth_dev_configure,
1634ff9e112dSShreyansh Jain 	.dev_start		  = dpaa_eth_dev_start,
1635ff9e112dSShreyansh Jain 	.dev_stop		  = dpaa_eth_dev_stop,
1636ff9e112dSShreyansh Jain 	.dev_close		  = dpaa_eth_dev_close,
1637799db456SShreyansh Jain 	.dev_infos_get		  = dpaa_eth_dev_info,
1638a7bdc3bdSShreyansh Jain 	.dev_supported_ptypes_get = dpaa_supported_ptypes_get,
163937f9b54bSShreyansh Jain 
164037f9b54bSShreyansh Jain 	.rx_queue_setup		  = dpaa_eth_rx_queue_setup,
164137f9b54bSShreyansh Jain 	.tx_queue_setup		  = dpaa_eth_tx_queue_setup,
16422e6f5657SApeksha Gupta 	.rx_burst_mode_get	  = dpaa_dev_rx_burst_mode_get,
16432e6f5657SApeksha Gupta 	.tx_burst_mode_get	  = dpaa_dev_tx_burst_mode_get,
16442cf9264fSHemant Agrawal 	.rxq_info_get		  = dpaa_rxq_info_get,
16452cf9264fSHemant Agrawal 	.txq_info_get		  = dpaa_txq_info_get,
16462cf9264fSHemant Agrawal 
164712a4678aSShreyansh Jain 	.flow_ctrl_get		  = dpaa_flow_ctrl_get,
164812a4678aSShreyansh Jain 	.flow_ctrl_set		  = dpaa_flow_ctrl_set,
164912a4678aSShreyansh Jain 
1650e124a69fSShreyansh Jain 	.link_update		  = dpaa_eth_link_update,
1651e1ad3a05SShreyansh Jain 	.stats_get		  = dpaa_eth_stats_get,
1652b21ed3e2SHemant Agrawal 	.xstats_get		  = dpaa_dev_xstats_get,
1653b21ed3e2SHemant Agrawal 	.xstats_get_by_id	  = dpaa_xstats_get_by_id,
1654b21ed3e2SHemant Agrawal 	.xstats_get_names_by_id	  = dpaa_xstats_get_names_by_id,
1655b21ed3e2SHemant Agrawal 	.xstats_get_names	  = dpaa_xstats_get_names,
1656b21ed3e2SHemant Agrawal 	.xstats_reset		  = dpaa_eth_stats_reset,
1657e1ad3a05SShreyansh Jain 	.stats_reset		  = dpaa_eth_stats_reset,
165895ef603dSShreyansh Jain 	.promiscuous_enable	  = dpaa_eth_promiscuous_enable,
165995ef603dSShreyansh Jain 	.promiscuous_disable	  = dpaa_eth_promiscuous_disable,
166044dd70a3SShreyansh Jain 	.allmulticast_enable	  = dpaa_eth_multicast_enable,
166144dd70a3SShreyansh Jain 	.allmulticast_disable	  = dpaa_eth_multicast_disable,
16620cbec027SShreyansh Jain 	.mtu_set		  = dpaa_mtu_set,
1663e124a69fSShreyansh Jain 	.dev_set_link_down	  = dpaa_link_down,
1664e124a69fSShreyansh Jain 	.dev_set_link_up	  = dpaa_link_up,
1665fe6c6032SShreyansh Jain 	.mac_addr_add		  = dpaa_dev_add_mac_addr,
1666fe6c6032SShreyansh Jain 	.mac_addr_remove	  = dpaa_dev_remove_mac_addr,
1667fe6c6032SShreyansh Jain 	.mac_addr_set		  = dpaa_dev_set_mac_addr,
1668fe6c6032SShreyansh Jain 
1669cf0fab1dSHemant Agrawal 	.fw_version_get		  = dpaa_fw_version_get,
1670b1b5d6c9SNipun Gupta 
1671b1b5d6c9SNipun Gupta 	.rx_queue_intr_enable	  = dpaa_dev_queue_intr_enable,
1672b1b5d6c9SNipun Gupta 	.rx_queue_intr_disable	  = dpaa_dev_queue_intr_disable,
1673627e677dSSachin Saxena 	.rss_hash_update	  = dpaa_dev_rss_hash_update,
1674627e677dSSachin Saxena 	.rss_hash_conf_get        = dpaa_dev_rss_hash_conf_get,
1675ff9e112dSShreyansh Jain };
1676ff9e112dSShreyansh Jain 
16778c3495f5SHemant Agrawal static bool
16788c3495f5SHemant Agrawal is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
16798c3495f5SHemant Agrawal {
16808c3495f5SHemant Agrawal 	if (strcmp(dev->device->driver->name,
16818c3495f5SHemant Agrawal 		   drv->driver.name))
16828c3495f5SHemant Agrawal 		return false;
16838c3495f5SHemant Agrawal 
16848c3495f5SHemant Agrawal 	return true;
16858c3495f5SHemant Agrawal }
16868c3495f5SHemant Agrawal 
16878c3495f5SHemant Agrawal static bool
16888c3495f5SHemant Agrawal is_dpaa_supported(struct rte_eth_dev *dev)
16898c3495f5SHemant Agrawal {
16908c3495f5SHemant Agrawal 	return is_device_supported(dev, &rte_dpaa_pmd);
16918c3495f5SHemant Agrawal }
16928c3495f5SHemant Agrawal 
16931e06b6dcSHemant Agrawal int
1694ae8f4cf3SFerruh Yigit rte_pmd_dpaa_set_tx_loopback(uint16_t port, uint8_t on)
16958c3495f5SHemant Agrawal {
16968c3495f5SHemant Agrawal 	struct rte_eth_dev *dev;
16978c3495f5SHemant Agrawal 
16988c3495f5SHemant Agrawal 	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
16998c3495f5SHemant Agrawal 
17008c3495f5SHemant Agrawal 	dev = &rte_eth_devices[port];
17018c3495f5SHemant Agrawal 
17028c3495f5SHemant Agrawal 	if (!is_dpaa_supported(dev))
17038c3495f5SHemant Agrawal 		return -ENOTSUP;
17048c3495f5SHemant Agrawal 
17058c3495f5SHemant Agrawal 	if (on)
17066b10d1f7SNipun Gupta 		fman_if_loopback_enable(dev->process_private);
17078c3495f5SHemant Agrawal 	else
17086b10d1f7SNipun Gupta 		fman_if_loopback_disable(dev->process_private);
17098c3495f5SHemant Agrawal 
17108c3495f5SHemant Agrawal 	return 0;
17118c3495f5SHemant Agrawal }
17128c3495f5SHemant Agrawal 
17136b10d1f7SNipun Gupta static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf,
17146b10d1f7SNipun Gupta 			       struct fman_if *fman_intf)
171512a4678aSShreyansh Jain {
171612a4678aSShreyansh Jain 	struct rte_eth_fc_conf *fc_conf;
171712a4678aSShreyansh Jain 	int ret;
171812a4678aSShreyansh Jain 
171912a4678aSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
172012a4678aSShreyansh Jain 
172112a4678aSShreyansh Jain 	if (!(dpaa_intf->fc_conf)) {
172212a4678aSShreyansh Jain 		dpaa_intf->fc_conf = rte_zmalloc(NULL,
172312a4678aSShreyansh Jain 			sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
172412a4678aSShreyansh Jain 		if (!dpaa_intf->fc_conf) {
172512a4678aSShreyansh Jain 			DPAA_PMD_ERR("unable to save flow control info");
172612a4678aSShreyansh Jain 			return -ENOMEM;
172712a4678aSShreyansh Jain 		}
172812a4678aSShreyansh Jain 	}
172912a4678aSShreyansh Jain 	fc_conf = dpaa_intf->fc_conf;
17306b10d1f7SNipun Gupta 	ret = fman_if_get_fc_threshold(fman_intf);
173112a4678aSShreyansh Jain 	if (ret) {
1732295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_TX_PAUSE;
17336b10d1f7SNipun Gupta 		fc_conf->pause_time = fman_if_get_fc_quanta(fman_intf);
173412a4678aSShreyansh Jain 	} else {
1735295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_NONE;
173612a4678aSShreyansh Jain 	}
173712a4678aSShreyansh Jain 
173812a4678aSShreyansh Jain 	return 0;
173912a4678aSShreyansh Jain }
174012a4678aSShreyansh Jain 
174137f9b54bSShreyansh Jain /* Initialise an Rx FQ */
174262f53995SHemant Agrawal static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
174337f9b54bSShreyansh Jain 			      uint32_t fqid)
174437f9b54bSShreyansh Jain {
17458d804cf1SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
174637f9b54bSShreyansh Jain 	int ret;
1747f04e7139SHemant Agrawal 	u32 flags = QMAN_FQ_FLAG_NO_ENQUEUE;
174862f53995SHemant Agrawal 	struct qm_mcc_initcgr cgr_opts = {
174962f53995SHemant Agrawal 		.we_mask = QM_CGR_WE_CS_THRES |
175062f53995SHemant Agrawal 				QM_CGR_WE_CSTD_EN |
175162f53995SHemant Agrawal 				QM_CGR_WE_MODE,
175262f53995SHemant Agrawal 		.cgr = {
175362f53995SHemant Agrawal 			.cstd_en = QM_CGR_EN,
175462f53995SHemant Agrawal 			.mode = QMAN_CGR_MODE_FRAME
175562f53995SHemant Agrawal 		}
175662f53995SHemant Agrawal 	};
175737f9b54bSShreyansh Jain 
17584defbc8cSSachin Saxena 	if (fmc_q || default_q) {
175937f9b54bSShreyansh Jain 		ret = qman_reserve_fqid(fqid);
176037f9b54bSShreyansh Jain 		if (ret) {
17614defbc8cSSachin Saxena 			DPAA_PMD_ERR("reserve rx fqid 0x%x failed, ret: %d",
176237f9b54bSShreyansh Jain 				     fqid, ret);
176337f9b54bSShreyansh Jain 			return -EINVAL;
176437f9b54bSShreyansh Jain 		}
1765f04e7139SHemant Agrawal 	}
17664defbc8cSSachin Saxena 
17678d6fc8b6SHemant Agrawal 	DPAA_PMD_DEBUG("creating rx fq %p, fqid 0x%x", fq, fqid);
1768f04e7139SHemant Agrawal 	ret = qman_create_fq(fqid, flags, fq);
176937f9b54bSShreyansh Jain 	if (ret) {
17706fd3639aSHemant Agrawal 		DPAA_PMD_ERR("create rx fqid 0x%x failed with ret: %d",
177137f9b54bSShreyansh Jain 			fqid, ret);
177237f9b54bSShreyansh Jain 		return ret;
177337f9b54bSShreyansh Jain 	}
17740c504f69SHemant Agrawal 	fq->is_static = false;
17755e745593SSunil Kumar Kori 
17765e745593SSunil Kumar Kori 	dpaa_poll_queue_default_config(&opts);
177737f9b54bSShreyansh Jain 
177862f53995SHemant Agrawal 	if (cgr_rx) {
177962f53995SHemant Agrawal 		/* Enable tail drop with cgr on this queue */
178062f53995SHemant Agrawal 		qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
178162f53995SHemant Agrawal 		cgr_rx->cb = NULL;
178262f53995SHemant Agrawal 		ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
178362f53995SHemant Agrawal 				      &cgr_opts);
178462f53995SHemant Agrawal 		if (ret) {
178562f53995SHemant Agrawal 			DPAA_PMD_WARN(
17868d6fc8b6SHemant Agrawal 				"rx taildrop init fail on rx fqid 0x%x(ret=%d)",
1787f04e7139SHemant Agrawal 				fq->fqid, ret);
178862f53995SHemant Agrawal 			goto without_cgr;
178962f53995SHemant Agrawal 		}
179062f53995SHemant Agrawal 		opts.we_mask |= QM_INITFQ_WE_CGID;
179162f53995SHemant Agrawal 		opts.fqd.cgid = cgr_rx->cgrid;
179262f53995SHemant Agrawal 		opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
179362f53995SHemant Agrawal 	}
179462f53995SHemant Agrawal without_cgr:
1795f04e7139SHemant Agrawal 	ret = qman_init_fq(fq, 0, &opts);
179637f9b54bSShreyansh Jain 	if (ret)
17978d6fc8b6SHemant Agrawal 		DPAA_PMD_ERR("init rx fqid 0x%x failed with ret:%d", fqid, ret);
179837f9b54bSShreyansh Jain 	return ret;
179937f9b54bSShreyansh Jain }
180037f9b54bSShreyansh Jain 
180137f9b54bSShreyansh Jain /* Initialise a Tx FQ */
180237f9b54bSShreyansh Jain static int dpaa_tx_queue_init(struct qman_fq *fq,
18039124e65dSGagandeep Singh 			      struct fman_if *fman_intf,
18049124e65dSGagandeep Singh 			      struct qman_cgr *cgr_tx)
180537f9b54bSShreyansh Jain {
18068d804cf1SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
18079124e65dSGagandeep Singh 	struct qm_mcc_initcgr cgr_opts = {
18089124e65dSGagandeep Singh 		.we_mask = QM_CGR_WE_CS_THRES |
18099124e65dSGagandeep Singh 				QM_CGR_WE_CSTD_EN |
18109124e65dSGagandeep Singh 				QM_CGR_WE_MODE,
18119124e65dSGagandeep Singh 		.cgr = {
18129124e65dSGagandeep Singh 			.cstd_en = QM_CGR_EN,
18139124e65dSGagandeep Singh 			.mode = QMAN_CGR_MODE_FRAME
18149124e65dSGagandeep Singh 		}
18159124e65dSGagandeep Singh 	};
181637f9b54bSShreyansh Jain 	int ret;
181737f9b54bSShreyansh Jain 
181837f9b54bSShreyansh Jain 	ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
181937f9b54bSShreyansh Jain 			     QMAN_FQ_FLAG_TO_DCPORTAL, fq);
182037f9b54bSShreyansh Jain 	if (ret) {
182137f9b54bSShreyansh Jain 		DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
182237f9b54bSShreyansh Jain 		return ret;
182337f9b54bSShreyansh Jain 	}
182437f9b54bSShreyansh Jain 	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
182537f9b54bSShreyansh Jain 		       QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
182637f9b54bSShreyansh Jain 	opts.fqd.dest.channel = fman_intf->tx_channel_id;
182737f9b54bSShreyansh Jain 	opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
182837f9b54bSShreyansh Jain 	opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
182937f9b54bSShreyansh Jain 	opts.fqd.context_b = 0;
183037f9b54bSShreyansh Jain 	/* no tx-confirmation */
183137f9b54bSShreyansh Jain 	opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
183237f9b54bSShreyansh Jain 	opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
183372e9e0c9SNipun Gupta 	if (fman_ip_rev >= FMAN_V3) {
183472e9e0c9SNipun Gupta 		/* Set B0V bit in contextA to set ASPID to 0 */
183572e9e0c9SNipun Gupta 		opts.fqd.context_a.hi |= 0x04000000;
183672e9e0c9SNipun Gupta 	}
18378d6fc8b6SHemant Agrawal 	DPAA_PMD_DEBUG("init tx fq %p, fqid 0x%x", fq, fq->fqid);
18389124e65dSGagandeep Singh 
18399124e65dSGagandeep Singh 	if (cgr_tx) {
18409124e65dSGagandeep Singh 		/* Enable tail drop with cgr on this queue */
18419124e65dSGagandeep Singh 		qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres,
18429124e65dSGagandeep Singh 				      td_tx_threshold, 0);
18439124e65dSGagandeep Singh 		cgr_tx->cb = NULL;
18449124e65dSGagandeep Singh 		ret = qman_create_cgr(cgr_tx, QMAN_CGR_FLAG_USE_INIT,
18459124e65dSGagandeep Singh 				      &cgr_opts);
18469124e65dSGagandeep Singh 		if (ret) {
18479124e65dSGagandeep Singh 			DPAA_PMD_WARN(
18489124e65dSGagandeep Singh 				"rx taildrop init fail on rx fqid 0x%x(ret=%d)",
18499124e65dSGagandeep Singh 				fq->fqid, ret);
18509124e65dSGagandeep Singh 			goto without_cgr;
18519124e65dSGagandeep Singh 		}
18529124e65dSGagandeep Singh 		opts.we_mask |= QM_INITFQ_WE_CGID;
18539124e65dSGagandeep Singh 		opts.fqd.cgid = cgr_tx->cgrid;
18549124e65dSGagandeep Singh 		opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
18551ec9a3afSHemant Agrawal 		DPAA_PMD_DEBUG("Tx FQ tail drop enabled, threshold = %d",
18569124e65dSGagandeep Singh 				td_tx_threshold);
18579124e65dSGagandeep Singh 	}
18589124e65dSGagandeep Singh without_cgr:
185937f9b54bSShreyansh Jain 	ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
186037f9b54bSShreyansh Jain 	if (ret)
18618d6fc8b6SHemant Agrawal 		DPAA_PMD_ERR("init tx fqid 0x%x failed %d", fq->fqid, ret);
186237f9b54bSShreyansh Jain 	return ret;
186337f9b54bSShreyansh Jain }
186437f9b54bSShreyansh Jain 
186505ba55bcSShreyansh Jain #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
186605ba55bcSShreyansh Jain /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
186705ba55bcSShreyansh Jain static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
186805ba55bcSShreyansh Jain {
18698d804cf1SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
187005ba55bcSShreyansh Jain 	int ret;
187105ba55bcSShreyansh Jain 
187205ba55bcSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
187305ba55bcSShreyansh Jain 
187405ba55bcSShreyansh Jain 	ret = qman_reserve_fqid(fqid);
187505ba55bcSShreyansh Jain 	if (ret) {
187605ba55bcSShreyansh Jain 		DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
187705ba55bcSShreyansh Jain 			fqid, ret);
187805ba55bcSShreyansh Jain 		return -EINVAL;
187905ba55bcSShreyansh Jain 	}
188005ba55bcSShreyansh Jain 	/* "map" this Rx FQ to one of the interfaces Tx FQID */
188105ba55bcSShreyansh Jain 	DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
188205ba55bcSShreyansh Jain 	ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
188305ba55bcSShreyansh Jain 	if (ret) {
188405ba55bcSShreyansh Jain 		DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
188505ba55bcSShreyansh Jain 			fqid, ret);
188605ba55bcSShreyansh Jain 		return ret;
188705ba55bcSShreyansh Jain 	}
188805ba55bcSShreyansh Jain 	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
188905ba55bcSShreyansh Jain 	opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
189005ba55bcSShreyansh Jain 	ret = qman_init_fq(fq, 0, &opts);
189105ba55bcSShreyansh Jain 	if (ret)
189205ba55bcSShreyansh Jain 		DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
189305ba55bcSShreyansh Jain 			    fqid, ret);
189405ba55bcSShreyansh Jain 	return ret;
189505ba55bcSShreyansh Jain }
189605ba55bcSShreyansh Jain #endif
189705ba55bcSShreyansh Jain 
1898ff9e112dSShreyansh Jain /* Initialise a network interface */
1899ff9e112dSShreyansh Jain static int
19006b10d1f7SNipun Gupta dpaa_dev_init_secondary(struct rte_eth_dev *eth_dev)
19016b10d1f7SNipun Gupta {
19026b10d1f7SNipun Gupta 	struct rte_dpaa_device *dpaa_device;
19036b10d1f7SNipun Gupta 	struct fm_eth_port_cfg *cfg;
19046b10d1f7SNipun Gupta 	struct dpaa_if *dpaa_intf;
19056b10d1f7SNipun Gupta 	struct fman_if *fman_intf;
19066b10d1f7SNipun Gupta 	int dev_id;
19076b10d1f7SNipun Gupta 
19086b10d1f7SNipun Gupta 	PMD_INIT_FUNC_TRACE();
19096b10d1f7SNipun Gupta 
19106b10d1f7SNipun Gupta 	dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
19116b10d1f7SNipun Gupta 	dev_id = dpaa_device->id.dev_id;
19126b10d1f7SNipun Gupta 	cfg = dpaa_get_eth_port_cfg(dev_id);
19136b10d1f7SNipun Gupta 	fman_intf = cfg->fman_if;
19146b10d1f7SNipun Gupta 	eth_dev->process_private = fman_intf;
19156b10d1f7SNipun Gupta 
19166b10d1f7SNipun Gupta 	/* Plugging of UCODE burst API not supported in Secondary */
19176b10d1f7SNipun Gupta 	dpaa_intf = eth_dev->data->dev_private;
19186b10d1f7SNipun Gupta 	eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
19196b10d1f7SNipun Gupta 	if (dpaa_intf->cgr_tx)
19206b10d1f7SNipun Gupta 		eth_dev->tx_pkt_burst = dpaa_eth_queue_tx_slow;
19216b10d1f7SNipun Gupta 	else
19226b10d1f7SNipun Gupta 		eth_dev->tx_pkt_burst = dpaa_eth_queue_tx;
19236b10d1f7SNipun Gupta #ifdef CONFIG_FSL_QMAN_FQ_LOOKUP
19246b10d1f7SNipun Gupta 	qman_set_fq_lookup_table(
19256b10d1f7SNipun Gupta 		dpaa_intf->rx_queues->qman_fq_lookup_table);
19266b10d1f7SNipun Gupta #endif
19276b10d1f7SNipun Gupta 
19286b10d1f7SNipun Gupta 	return 0;
19296b10d1f7SNipun Gupta }
19306b10d1f7SNipun Gupta 
19316b10d1f7SNipun Gupta /* Initialise a network interface */
19326b10d1f7SNipun Gupta static int
1933ff9e112dSShreyansh Jain dpaa_dev_init(struct rte_eth_dev *eth_dev)
1934ff9e112dSShreyansh Jain {
1935af2828cfSAkhil Goyal 	int num_rx_fqs, fqid;
193637f9b54bSShreyansh Jain 	int loop, ret = 0;
1937ff9e112dSShreyansh Jain 	int dev_id;
1938ff9e112dSShreyansh Jain 	struct rte_dpaa_device *dpaa_device;
1939ff9e112dSShreyansh Jain 	struct dpaa_if *dpaa_intf;
194037f9b54bSShreyansh Jain 	struct fm_eth_port_cfg *cfg;
194137f9b54bSShreyansh Jain 	struct fman_if *fman_intf;
194237f9b54bSShreyansh Jain 	struct fman_if_bpool *bp, *tmp_bp;
194362f53995SHemant Agrawal 	uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
19449124e65dSGagandeep Singh 	uint32_t cgrid_tx[MAX_DPAA_CORES];
19454defbc8cSSachin Saxena 	uint32_t dev_rx_fqids[DPAA_MAX_NUM_PCD_QUEUES];
1946e4abd4ffSJun Yang 	int8_t dev_vspids[DPAA_MAX_NUM_PCD_QUEUES];
1947e4abd4ffSJun Yang 	int8_t vsp_id = -1;
1948ff9e112dSShreyansh Jain 
1949ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1950ff9e112dSShreyansh Jain 
1951ff9e112dSShreyansh Jain 	dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
1952ff9e112dSShreyansh Jain 	dev_id = dpaa_device->id.dev_id;
1953ff9e112dSShreyansh Jain 	dpaa_intf = eth_dev->data->dev_private;
1954051ae3afSHemant Agrawal 	cfg = dpaa_get_eth_port_cfg(dev_id);
195537f9b54bSShreyansh Jain 	fman_intf = cfg->fman_if;
1956ff9e112dSShreyansh Jain 
1957ff9e112dSShreyansh Jain 	dpaa_intf->name = dpaa_device->name;
1958ff9e112dSShreyansh Jain 
19597be78d02SJosh Soref 	/* save fman_if & cfg in the interface structure */
19606b10d1f7SNipun Gupta 	eth_dev->process_private = fman_intf;
1961ff9e112dSShreyansh Jain 	dpaa_intf->ifid = dev_id;
196237f9b54bSShreyansh Jain 	dpaa_intf->cfg = cfg;
1963ff9e112dSShreyansh Jain 
19644defbc8cSSachin Saxena 	memset((char *)dev_rx_fqids, 0,
19654defbc8cSSachin Saxena 		sizeof(uint32_t) * DPAA_MAX_NUM_PCD_QUEUES);
19664defbc8cSSachin Saxena 
1967e4abd4ffSJun Yang 	memset(dev_vspids, -1, DPAA_MAX_NUM_PCD_QUEUES);
1968e4abd4ffSJun Yang 
196937f9b54bSShreyansh Jain 	/* Initialize Rx FQ's */
19708d6fc8b6SHemant Agrawal 	if (default_q) {
19718d6fc8b6SHemant Agrawal 		num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
19724defbc8cSSachin Saxena 	} else if (fmc_q) {
1973f5fe3eedSJun Yang 		num_rx_fqs = dpaa_port_fmc_init(fman_intf, dev_rx_fqids,
1974f5fe3eedSJun Yang 						dev_vspids,
1975f5fe3eedSJun Yang 						DPAA_MAX_NUM_PCD_QUEUES);
1976f5fe3eedSJun Yang 		if (num_rx_fqs < 0) {
1977f5fe3eedSJun Yang 			DPAA_PMD_ERR("%s FMC initializes failed!",
1978f5fe3eedSJun Yang 				dpaa_intf->name);
1979f5fe3eedSJun Yang 			goto free_rx;
1980f5fe3eedSJun Yang 		}
1981f5fe3eedSJun Yang 		if (!num_rx_fqs) {
1982f5fe3eedSJun Yang 			DPAA_PMD_WARN("%s is not configured by FMC.",
1983f5fe3eedSJun Yang 				dpaa_intf->name);
1984f5fe3eedSJun Yang 		}
19858d6fc8b6SHemant Agrawal 	} else {
19864defbc8cSSachin Saxena 		/* FMCLESS mode, load balance to multiple cores.*/
19874defbc8cSSachin Saxena 		num_rx_fqs = rte_lcore_count();
19888d6fc8b6SHemant Agrawal 	}
19898d6fc8b6SHemant Agrawal 
1990e4f931ccSHemant Agrawal 	/* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX
199137f9b54bSShreyansh Jain 	 * queues.
199237f9b54bSShreyansh Jain 	 */
19934defbc8cSSachin Saxena 	if (num_rx_fqs < 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) {
19941ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Invalid number of RX queues");
199537f9b54bSShreyansh Jain 		return -EINVAL;
199637f9b54bSShreyansh Jain 	}
199737f9b54bSShreyansh Jain 
19984defbc8cSSachin Saxena 	if (num_rx_fqs > 0) {
199937f9b54bSShreyansh Jain 		dpaa_intf->rx_queues = rte_zmalloc(NULL,
200037f9b54bSShreyansh Jain 			sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
20010ff76833SYong Wang 		if (!dpaa_intf->rx_queues) {
20021ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc mem for RX queues");
20030ff76833SYong Wang 			return -ENOMEM;
20040ff76833SYong Wang 		}
20054defbc8cSSachin Saxena 	} else {
20064defbc8cSSachin Saxena 		dpaa_intf->rx_queues = NULL;
20074defbc8cSSachin Saxena 	}
200862f53995SHemant Agrawal 
20099124e65dSGagandeep Singh 	memset(cgrid, 0, sizeof(cgrid));
20109124e65dSGagandeep Singh 	memset(cgrid_tx, 0, sizeof(cgrid_tx));
20119124e65dSGagandeep Singh 
20129124e65dSGagandeep Singh 	/* if DPAA_TX_TAILDROP_THRESHOLD is set, use that value; if 0, it means
20139124e65dSGagandeep Singh 	 * Tx tail drop is disabled.
20149124e65dSGagandeep Singh 	 */
20159124e65dSGagandeep Singh 	if (getenv("DPAA_TX_TAILDROP_THRESHOLD")) {
20169124e65dSGagandeep Singh 		td_tx_threshold = atoi(getenv("DPAA_TX_TAILDROP_THRESHOLD"));
20179124e65dSGagandeep Singh 		DPAA_PMD_DEBUG("Tail drop threshold env configured: %u",
20189124e65dSGagandeep Singh 			       td_tx_threshold);
20199124e65dSGagandeep Singh 		/* if a very large value is being configured */
20209124e65dSGagandeep Singh 		if (td_tx_threshold > UINT16_MAX)
20219124e65dSGagandeep Singh 			td_tx_threshold = CGR_RX_PERFQ_THRESH;
20229124e65dSGagandeep Singh 	}
20239124e65dSGagandeep Singh 
202462f53995SHemant Agrawal 	/* If congestion control is enabled globally*/
20254defbc8cSSachin Saxena 	if (num_rx_fqs > 0 && td_threshold) {
202662f53995SHemant Agrawal 		dpaa_intf->cgr_rx = rte_zmalloc(NULL,
202762f53995SHemant Agrawal 			sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
20280ff76833SYong Wang 		if (!dpaa_intf->cgr_rx) {
20291ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc mem for cgr_rx");
20300ff76833SYong Wang 			ret = -ENOMEM;
20310ff76833SYong Wang 			goto free_rx;
20320ff76833SYong Wang 		}
203362f53995SHemant Agrawal 
203462f53995SHemant Agrawal 		ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
203562f53995SHemant Agrawal 		if (ret != num_rx_fqs) {
203662f53995SHemant Agrawal 			DPAA_PMD_WARN("insufficient CGRIDs available");
20370ff76833SYong Wang 			ret = -EINVAL;
20380ff76833SYong Wang 			goto free_rx;
203962f53995SHemant Agrawal 		}
204062f53995SHemant Agrawal 	} else {
204162f53995SHemant Agrawal 		dpaa_intf->cgr_rx = NULL;
204262f53995SHemant Agrawal 	}
204362f53995SHemant Agrawal 
20444defbc8cSSachin Saxena 	if (!fmc_q && !default_q) {
20454defbc8cSSachin Saxena 		ret = qman_alloc_fqid_range(dev_rx_fqids, num_rx_fqs,
20464defbc8cSSachin Saxena 					    num_rx_fqs, 0);
20474defbc8cSSachin Saxena 		if (ret < 0) {
20481ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc rx fqid's");
20494defbc8cSSachin Saxena 			goto free_rx;
20504defbc8cSSachin Saxena 		}
20514defbc8cSSachin Saxena 	}
20524defbc8cSSachin Saxena 
205337f9b54bSShreyansh Jain 	for (loop = 0; loop < num_rx_fqs; loop++) {
20548d6fc8b6SHemant Agrawal 		if (default_q)
20558d6fc8b6SHemant Agrawal 			fqid = cfg->rx_def;
20568d6fc8b6SHemant Agrawal 		else
20574defbc8cSSachin Saxena 			fqid = dev_rx_fqids[loop];
205862f53995SHemant Agrawal 
2059e4abd4ffSJun Yang 		vsp_id = dev_vspids[loop];
2060e4abd4ffSJun Yang 
206162f53995SHemant Agrawal 		if (dpaa_intf->cgr_rx)
206262f53995SHemant Agrawal 			dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
206362f53995SHemant Agrawal 
206462f53995SHemant Agrawal 		ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
206562f53995SHemant Agrawal 			dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
206662f53995SHemant Agrawal 			fqid);
206737f9b54bSShreyansh Jain 		if (ret)
20680ff76833SYong Wang 			goto free_rx;
2069e4abd4ffSJun Yang 		dpaa_intf->rx_queues[loop].vsp_id = vsp_id;
207037f9b54bSShreyansh Jain 		dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
207137f9b54bSShreyansh Jain 	}
207237f9b54bSShreyansh Jain 	dpaa_intf->nb_rx_queues = num_rx_fqs;
207337f9b54bSShreyansh Jain 
20740ff76833SYong Wang 	/* Initialise Tx FQs.free_rx Have as many Tx FQ's as number of cores */
207537f9b54bSShreyansh Jain 	dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
2076af2828cfSAkhil Goyal 		MAX_DPAA_CORES, MAX_CACHELINE);
20770ff76833SYong Wang 	if (!dpaa_intf->tx_queues) {
20781ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Failed to alloc mem for TX queues");
20790ff76833SYong Wang 		ret = -ENOMEM;
20800ff76833SYong Wang 		goto free_rx;
20810ff76833SYong Wang 	}
208237f9b54bSShreyansh Jain 
20839124e65dSGagandeep Singh 	/* If congestion control is enabled globally*/
20849124e65dSGagandeep Singh 	if (td_tx_threshold) {
20859124e65dSGagandeep Singh 		dpaa_intf->cgr_tx = rte_zmalloc(NULL,
20869124e65dSGagandeep Singh 			sizeof(struct qman_cgr) * MAX_DPAA_CORES,
20879124e65dSGagandeep Singh 			MAX_CACHELINE);
20889124e65dSGagandeep Singh 		if (!dpaa_intf->cgr_tx) {
20891ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc mem for cgr_tx");
20909124e65dSGagandeep Singh 			ret = -ENOMEM;
20919124e65dSGagandeep Singh 			goto free_rx;
20929124e65dSGagandeep Singh 		}
20939124e65dSGagandeep Singh 
20949124e65dSGagandeep Singh 		ret = qman_alloc_cgrid_range(&cgrid_tx[0], MAX_DPAA_CORES,
20959124e65dSGagandeep Singh 					     1, 0);
20969124e65dSGagandeep Singh 		if (ret != MAX_DPAA_CORES) {
20979124e65dSGagandeep Singh 			DPAA_PMD_WARN("insufficient CGRIDs available");
20989124e65dSGagandeep Singh 			ret = -EINVAL;
20999124e65dSGagandeep Singh 			goto free_rx;
21009124e65dSGagandeep Singh 		}
21019124e65dSGagandeep Singh 	} else {
21029124e65dSGagandeep Singh 		dpaa_intf->cgr_tx = NULL;
21039124e65dSGagandeep Singh 	}
21049124e65dSGagandeep Singh 
21059124e65dSGagandeep Singh 
2106af2828cfSAkhil Goyal 	for (loop = 0; loop < MAX_DPAA_CORES; loop++) {
21079124e65dSGagandeep Singh 		if (dpaa_intf->cgr_tx)
21089124e65dSGagandeep Singh 			dpaa_intf->cgr_tx[loop].cgrid = cgrid_tx[loop];
21099124e65dSGagandeep Singh 
211037f9b54bSShreyansh Jain 		ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
21119124e65dSGagandeep Singh 			fman_intf,
21129124e65dSGagandeep Singh 			dpaa_intf->cgr_tx ? &dpaa_intf->cgr_tx[loop] : NULL);
211337f9b54bSShreyansh Jain 		if (ret)
21140ff76833SYong Wang 			goto free_tx;
211537f9b54bSShreyansh Jain 		dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
211637f9b54bSShreyansh Jain 	}
2117af2828cfSAkhil Goyal 	dpaa_intf->nb_tx_queues = MAX_DPAA_CORES;
211837f9b54bSShreyansh Jain 
211905ba55bcSShreyansh Jain #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
212077393f56SSachin Saxena 	ret = dpaa_debug_queue_init(&dpaa_intf->debug_queues
212177393f56SSachin Saxena 			[DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
212277393f56SSachin Saxena 	if (ret) {
212377393f56SSachin Saxena 		DPAA_PMD_ERR("DPAA RX ERROR queue init failed!");
212477393f56SSachin Saxena 		goto free_tx;
212577393f56SSachin Saxena 	}
212605ba55bcSShreyansh Jain 	dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
212777393f56SSachin Saxena 	ret = dpaa_debug_queue_init(&dpaa_intf->debug_queues
212877393f56SSachin Saxena 			[DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
212977393f56SSachin Saxena 	if (ret) {
213077393f56SSachin Saxena 		DPAA_PMD_ERR("DPAA TX ERROR queue init failed!");
213177393f56SSachin Saxena 		goto free_tx;
213277393f56SSachin Saxena 	}
213305ba55bcSShreyansh Jain 	dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
213405ba55bcSShreyansh Jain #endif
213505ba55bcSShreyansh Jain 
213637f9b54bSShreyansh Jain 	DPAA_PMD_DEBUG("All frame queues created");
213737f9b54bSShreyansh Jain 
213812a4678aSShreyansh Jain 	/* Get the initial configuration for flow control */
21396b10d1f7SNipun Gupta 	dpaa_fc_set_default(dpaa_intf, fman_intf);
214012a4678aSShreyansh Jain 
214137f9b54bSShreyansh Jain 	/* reset bpool list, initialize bpool dynamically */
214237f9b54bSShreyansh Jain 	list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
214337f9b54bSShreyansh Jain 		list_del(&bp->node);
21444762b3d4SHemant Agrawal 		rte_free(bp);
214537f9b54bSShreyansh Jain 	}
214637f9b54bSShreyansh Jain 
214737f9b54bSShreyansh Jain 	/* Populate ethdev structure */
2148ff9e112dSShreyansh Jain 	eth_dev->dev_ops = &dpaa_devops;
2149cbfc6111SFerruh Yigit 	eth_dev->rx_queue_count = dpaa_dev_rx_queue_count;
215037f9b54bSShreyansh Jain 	eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
215137f9b54bSShreyansh Jain 	eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
215237f9b54bSShreyansh Jain 
215337f9b54bSShreyansh Jain 	/* Allocate memory for storing MAC addresses */
215437f9b54bSShreyansh Jain 	eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
215535b2d13fSOlivier Matz 		RTE_ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
215637f9b54bSShreyansh Jain 	if (eth_dev->data->mac_addrs == NULL) {
215737f9b54bSShreyansh Jain 		DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
215837f9b54bSShreyansh Jain 						"store MAC addresses",
215935b2d13fSOlivier Matz 				RTE_ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
21600ff76833SYong Wang 		ret = -ENOMEM;
21610ff76833SYong Wang 		goto free_tx;
216237f9b54bSShreyansh Jain 	}
216337f9b54bSShreyansh Jain 
216437f9b54bSShreyansh Jain 	/* copy the primary mac address */
2165538da7a1SOlivier Matz 	rte_ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
216637f9b54bSShreyansh Jain 
2167a247fcd9SStephen Hemminger 	DPAA_PMD_INFO("net: dpaa: %s: " RTE_ETHER_ADDR_PRT_FMT,
2168a7db3afcSAman Deep Singh 		      dpaa_device->name, RTE_ETHER_ADDR_BYTES(&fman_intf->mac_addr));
21694defbc8cSSachin Saxena 
2170133332f0SRadu Bulie 	if (!fman_intf->is_shared_mac) {
217195d226f0SNipun Gupta 		/* Configure error packet handling */
217277393f56SSachin Saxena 		fman_if_receive_rx_errors(fman_intf,
217377393f56SSachin Saxena 			FM_FD_RX_STATUS_ERR_MASK);
217495d226f0SNipun Gupta 		/* Disable RX mode */
217537f9b54bSShreyansh Jain 		fman_if_disable_rx(fman_intf);
217637f9b54bSShreyansh Jain 		/* Disable promiscuous mode */
217737f9b54bSShreyansh Jain 		fman_if_promiscuous_disable(fman_intf);
217837f9b54bSShreyansh Jain 		/* Disable multicast */
217937f9b54bSShreyansh Jain 		fman_if_reset_mcast_filter_table(fman_intf);
218037f9b54bSShreyansh Jain 		/* Reset interface statistics */
218137f9b54bSShreyansh Jain 		fman_if_stats_reset(fman_intf);
218255576ac2SHemant Agrawal 		/* Disable SG by default */
218355576ac2SHemant Agrawal 		fman_if_set_sg(fman_intf, 0);
2184133332f0SRadu Bulie 		fman_if_set_maxfrm(fman_intf,
2185133332f0SRadu Bulie 				   RTE_ETHER_MAX_LEN + VLAN_TAG_SIZE);
2186133332f0SRadu Bulie 	}
2187ff9e112dSShreyansh Jain 
2188ff9e112dSShreyansh Jain 	return 0;
21890ff76833SYong Wang 
21900ff76833SYong Wang free_tx:
21910ff76833SYong Wang 	rte_free(dpaa_intf->tx_queues);
21920ff76833SYong Wang 	dpaa_intf->tx_queues = NULL;
21930ff76833SYong Wang 	dpaa_intf->nb_tx_queues = 0;
21940ff76833SYong Wang 
21950ff76833SYong Wang free_rx:
21960ff76833SYong Wang 	rte_free(dpaa_intf->cgr_rx);
21979124e65dSGagandeep Singh 	rte_free(dpaa_intf->cgr_tx);
21980ff76833SYong Wang 	rte_free(dpaa_intf->rx_queues);
21990ff76833SYong Wang 	dpaa_intf->rx_queues = NULL;
22000ff76833SYong Wang 	dpaa_intf->nb_rx_queues = 0;
22010ff76833SYong Wang 	return ret;
2202ff9e112dSShreyansh Jain }
2203ff9e112dSShreyansh Jain 
2204ff9e112dSShreyansh Jain static int
22054defbc8cSSachin Saxena rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv,
2206ff9e112dSShreyansh Jain 	       struct rte_dpaa_device *dpaa_dev)
2207ff9e112dSShreyansh Jain {
2208ff9e112dSShreyansh Jain 	int diag;
2209ff9e112dSShreyansh Jain 	int ret;
2210ff9e112dSShreyansh Jain 	struct rte_eth_dev *eth_dev;
2211ff9e112dSShreyansh Jain 
2212ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
2213ff9e112dSShreyansh Jain 
221447854c18SHemant Agrawal 	if ((DPAA_MBUF_HW_ANNOTATION + DPAA_FD_PTA_SIZE) >
221547854c18SHemant Agrawal 		RTE_PKTMBUF_HEADROOM) {
221647854c18SHemant Agrawal 		DPAA_PMD_ERR(
221747854c18SHemant Agrawal 		"RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA Annotation req(%d)",
221847854c18SHemant Agrawal 		RTE_PKTMBUF_HEADROOM,
221947854c18SHemant Agrawal 		DPAA_MBUF_HW_ANNOTATION + DPAA_FD_PTA_SIZE);
222047854c18SHemant Agrawal 
222147854c18SHemant Agrawal 		return -1;
222247854c18SHemant Agrawal 	}
222347854c18SHemant Agrawal 
2224ff9e112dSShreyansh Jain 	/* In case of secondary process, the device is already configured
2225ff9e112dSShreyansh Jain 	 * and no further action is required, except portal initialization
2226ff9e112dSShreyansh Jain 	 * and verifying secondary attachment to port name.
2227ff9e112dSShreyansh Jain 	 */
2228ff9e112dSShreyansh Jain 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2229ff9e112dSShreyansh Jain 		eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
2230ff9e112dSShreyansh Jain 		if (!eth_dev)
2231ff9e112dSShreyansh Jain 			return -ENOMEM;
2232d1c3ab22SFerruh Yigit 		eth_dev->device = &dpaa_dev->device;
2233d1c3ab22SFerruh Yigit 		eth_dev->dev_ops = &dpaa_devops;
22346b10d1f7SNipun Gupta 
22356b10d1f7SNipun Gupta 		ret = dpaa_dev_init_secondary(eth_dev);
22366b10d1f7SNipun Gupta 		if (ret != 0) {
2237a247fcd9SStephen Hemminger 			DPAA_PMD_ERR("secondary dev init failed");
22386b10d1f7SNipun Gupta 			return ret;
22396b10d1f7SNipun Gupta 		}
22406b10d1f7SNipun Gupta 
2241fbe90cddSThomas Monjalon 		rte_eth_dev_probing_finish(eth_dev);
2242ff9e112dSShreyansh Jain 		return 0;
2243ff9e112dSShreyansh Jain 	}
2244ff9e112dSShreyansh Jain 
2245af2828cfSAkhil Goyal 	if (!is_global_init && (rte_eal_process_type() == RTE_PROC_PRIMARY)) {
22468d6fc8b6SHemant Agrawal 		if (access("/tmp/fmc.bin", F_OK) == -1) {
2247b7c7ff6eSStephen Hemminger 			DPAA_PMD_INFO("* FMC not configured.Enabling default mode");
22488d6fc8b6SHemant Agrawal 			default_q = 1;
22498d6fc8b6SHemant Agrawal 		}
22508d6fc8b6SHemant Agrawal 
22514defbc8cSSachin Saxena 		if (!(default_q || fmc_q)) {
22524defbc8cSSachin Saxena 			if (dpaa_fm_init()) {
22531ec9a3afSHemant Agrawal 				DPAA_PMD_ERR("FM init failed");
22544defbc8cSSachin Saxena 				return -1;
22554defbc8cSSachin Saxena 			}
22564defbc8cSSachin Saxena 		}
22574defbc8cSSachin Saxena 
2258e507498dSHemant Agrawal 		/* disabling the default push mode for LS1043 */
2259e507498dSHemant Agrawal 		if (dpaa_svr_family == SVR_LS1043A_FAMILY)
2260e507498dSHemant Agrawal 			dpaa_push_mode_max_queue = 0;
2261e507498dSHemant Agrawal 
22627be78d02SJosh Soref 		/* if push mode queues to be enabled. Currently we are allowing
2263e507498dSHemant Agrawal 		 * only one queue per thread.
2264e507498dSHemant Agrawal 		 */
2265e507498dSHemant Agrawal 		if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
2266e507498dSHemant Agrawal 			dpaa_push_mode_max_queue =
2267e507498dSHemant Agrawal 					atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
2268e507498dSHemant Agrawal 			if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
2269e507498dSHemant Agrawal 			    dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
2270e507498dSHemant Agrawal 		}
2271e507498dSHemant Agrawal 
2272ff9e112dSShreyansh Jain 		is_global_init = 1;
2273ff9e112dSShreyansh Jain 	}
2274ff9e112dSShreyansh Jain 
2275e5872221SRohit Raj 	if (unlikely(!DPAA_PER_LCORE_PORTAL)) {
2276ff9e112dSShreyansh Jain 		ret = rte_dpaa_portal_init((void *)1);
2277ff9e112dSShreyansh Jain 		if (ret) {
2278ff9e112dSShreyansh Jain 			DPAA_PMD_ERR("Unable to initialize portal");
2279ff9e112dSShreyansh Jain 			return ret;
2280ff9e112dSShreyansh Jain 		}
22815d944582SNipun Gupta 	}
2282ff9e112dSShreyansh Jain 
22836b10d1f7SNipun Gupta 	eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
2284af2828cfSAkhil Goyal 	if (!eth_dev)
2285af2828cfSAkhil Goyal 		return -ENOMEM;
2286ff9e112dSShreyansh Jain 
22876b10d1f7SNipun Gupta 	eth_dev->data->dev_private =
22886b10d1f7SNipun Gupta 			rte_zmalloc("ethdev private structure",
2289ff9e112dSShreyansh Jain 					sizeof(struct dpaa_if),
2290ff9e112dSShreyansh Jain 					RTE_CACHE_LINE_SIZE);
2291ff9e112dSShreyansh Jain 	if (!eth_dev->data->dev_private) {
2292ff9e112dSShreyansh Jain 		DPAA_PMD_ERR("Cannot allocate memzone for port data");
2293ff9e112dSShreyansh Jain 		rte_eth_dev_release_port(eth_dev);
2294ff9e112dSShreyansh Jain 		return -ENOMEM;
2295ff9e112dSShreyansh Jain 	}
22966b10d1f7SNipun Gupta 
2297ff9e112dSShreyansh Jain 	eth_dev->device = &dpaa_dev->device;
2298ff9e112dSShreyansh Jain 	dpaa_dev->eth_dev = eth_dev;
2299ff9e112dSShreyansh Jain 
23009124e65dSGagandeep Singh 	qman_ern_register_cb(dpaa_free_mbuf);
23019124e65dSGagandeep Singh 
23022aa10990SRohit Raj 	if (dpaa_drv->drv_flags & RTE_DPAA_DRV_INTR_LSC)
23032aa10990SRohit Raj 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
23042aa10990SRohit Raj 
2305ff9e112dSShreyansh Jain 	/* Invoke PMD device initialization function */
2306ff9e112dSShreyansh Jain 	diag = dpaa_dev_init(eth_dev);
2307fbe90cddSThomas Monjalon 	if (diag == 0) {
2308533c31ccSGagandeep Singh 		if (!dpaa_tx_sg_pool) {
2309533c31ccSGagandeep Singh 			dpaa_tx_sg_pool =
2310533c31ccSGagandeep Singh 				rte_pktmbuf_pool_create("dpaa_mbuf_tx_sg_pool",
2311533c31ccSGagandeep Singh 				DPAA_POOL_SIZE,
2312533c31ccSGagandeep Singh 				DPAA_POOL_CACHE_SIZE, 0,
2313533c31ccSGagandeep Singh 				DPAA_MAX_SGS * sizeof(struct qm_sg_entry),
2314533c31ccSGagandeep Singh 				rte_socket_id());
2315533c31ccSGagandeep Singh 			if (dpaa_tx_sg_pool == NULL) {
23161ec9a3afSHemant Agrawal 				DPAA_PMD_ERR("SG pool creation failed");
2317533c31ccSGagandeep Singh 				return -ENOMEM;
2318533c31ccSGagandeep Singh 			}
2319533c31ccSGagandeep Singh 		}
2320fbe90cddSThomas Monjalon 		rte_eth_dev_probing_finish(eth_dev);
2321533c31ccSGagandeep Singh 		dpaa_valid_dev++;
2322ff9e112dSShreyansh Jain 		return 0;
2323fbe90cddSThomas Monjalon 	}
2324ff9e112dSShreyansh Jain 
2325ff9e112dSShreyansh Jain 	rte_eth_dev_release_port(eth_dev);
2326ff9e112dSShreyansh Jain 	return diag;
2327ff9e112dSShreyansh Jain }
2328ff9e112dSShreyansh Jain 
2329ff9e112dSShreyansh Jain static int
2330ff9e112dSShreyansh Jain rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
2331ff9e112dSShreyansh Jain {
2332ff9e112dSShreyansh Jain 	struct rte_eth_dev *eth_dev;
23332defb114SSachin Saxena 	int ret;
2334ff9e112dSShreyansh Jain 
2335ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
2336ff9e112dSShreyansh Jain 
2337ff9e112dSShreyansh Jain 	eth_dev = dpaa_dev->eth_dev;
23382defb114SSachin Saxena 	dpaa_eth_dev_close(eth_dev);
2339533c31ccSGagandeep Singh 	dpaa_valid_dev--;
2340533c31ccSGagandeep Singh 	if (!dpaa_valid_dev)
2341533c31ccSGagandeep Singh 		rte_mempool_free(dpaa_tx_sg_pool);
23422defb114SSachin Saxena 	ret = rte_eth_dev_release_port(eth_dev);
2343ff9e112dSShreyansh Jain 
23442defb114SSachin Saxena 	return ret;
2345ff9e112dSShreyansh Jain }
2346ff9e112dSShreyansh Jain 
23474defbc8cSSachin Saxena static void __attribute__((destructor(102))) dpaa_finish(void)
23484defbc8cSSachin Saxena {
23494defbc8cSSachin Saxena 	/* For secondary, primary will do all the cleanup */
23504defbc8cSSachin Saxena 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
23514defbc8cSSachin Saxena 		return;
23524defbc8cSSachin Saxena 
23534defbc8cSSachin Saxena 	if (!(default_q || fmc_q)) {
23544defbc8cSSachin Saxena 		unsigned int i;
23554defbc8cSSachin Saxena 
23564defbc8cSSachin Saxena 		for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
23574defbc8cSSachin Saxena 			if (rte_eth_devices[i].dev_ops == &dpaa_devops) {
23584defbc8cSSachin Saxena 				struct rte_eth_dev *dev = &rte_eth_devices[i];
23594defbc8cSSachin Saxena 				struct dpaa_if *dpaa_intf =
23604defbc8cSSachin Saxena 					dev->data->dev_private;
23614defbc8cSSachin Saxena 				struct fman_if *fif =
23624defbc8cSSachin Saxena 					dev->process_private;
23634defbc8cSSachin Saxena 				if (dpaa_intf->port_handle)
23644defbc8cSSachin Saxena 					if (dpaa_fm_deconfig(dpaa_intf, fif))
23654defbc8cSSachin Saxena 						DPAA_PMD_WARN("DPAA FM "
23661ec9a3afSHemant Agrawal 							"deconfig failed");
2367e4abd4ffSJun Yang 				if (fif->num_profiles) {
2368e4abd4ffSJun Yang 					if (dpaa_port_vsp_cleanup(dpaa_intf,
2369e4abd4ffSJun Yang 								  fif))
23701ec9a3afSHemant Agrawal 						DPAA_PMD_WARN("DPAA FM vsp cleanup failed");
2371e4abd4ffSJun Yang 				}
23724defbc8cSSachin Saxena 			}
23734defbc8cSSachin Saxena 		}
23744defbc8cSSachin Saxena 		if (is_global_init)
23754defbc8cSSachin Saxena 			if (dpaa_fm_term())
23761ec9a3afSHemant Agrawal 				DPAA_PMD_WARN("DPAA FM term failed");
23774defbc8cSSachin Saxena 
23784defbc8cSSachin Saxena 		is_global_init = 0;
23794defbc8cSSachin Saxena 
23804defbc8cSSachin Saxena 		DPAA_PMD_INFO("DPAA fman cleaned up");
23814defbc8cSSachin Saxena 	}
23824defbc8cSSachin Saxena }
23834defbc8cSSachin Saxena 
2384ff9e112dSShreyansh Jain static struct rte_dpaa_driver rte_dpaa_pmd = {
23852aa10990SRohit Raj 	.drv_flags = RTE_DPAA_DRV_INTR_LSC,
2386ff9e112dSShreyansh Jain 	.drv_type = FSL_DPAA_ETH,
2387ff9e112dSShreyansh Jain 	.probe = rte_dpaa_probe,
2388ff9e112dSShreyansh Jain 	.remove = rte_dpaa_remove,
2389ff9e112dSShreyansh Jain };
2390ff9e112dSShreyansh Jain 
2391ff9e112dSShreyansh Jain RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);
2392eeded204SDavid Marchand RTE_LOG_REGISTER_DEFAULT(dpaa_logtype_pmd, NOTICE);
2393