1ff9e112dSShreyansh Jain /*- 2ff9e112dSShreyansh Jain * BSD LICENSE 3ff9e112dSShreyansh Jain * 4ff9e112dSShreyansh Jain * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 5ff9e112dSShreyansh Jain * Copyright 2017 NXP. 6ff9e112dSShreyansh Jain * 7ff9e112dSShreyansh Jain * Redistribution and use in source and binary forms, with or without 8ff9e112dSShreyansh Jain * modification, are permitted provided that the following conditions 9ff9e112dSShreyansh Jain * are met: 10ff9e112dSShreyansh Jain * 11ff9e112dSShreyansh Jain * * Redistributions of source code must retain the above copyright 12ff9e112dSShreyansh Jain * notice, this list of conditions and the following disclaimer. 13ff9e112dSShreyansh Jain * * Redistributions in binary form must reproduce the above copyright 14ff9e112dSShreyansh Jain * notice, this list of conditions and the following disclaimer in 15ff9e112dSShreyansh Jain * the documentation and/or other materials provided with the 16ff9e112dSShreyansh Jain * distribution. 17ff9e112dSShreyansh Jain * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18ff9e112dSShreyansh Jain * contributors may be used to endorse or promote products derived 19ff9e112dSShreyansh Jain * from this software without specific prior written permission. 20ff9e112dSShreyansh Jain * 21ff9e112dSShreyansh Jain * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22ff9e112dSShreyansh Jain * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23ff9e112dSShreyansh Jain * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24ff9e112dSShreyansh Jain * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25ff9e112dSShreyansh Jain * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26ff9e112dSShreyansh Jain * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27ff9e112dSShreyansh Jain * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28ff9e112dSShreyansh Jain * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29ff9e112dSShreyansh Jain * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30ff9e112dSShreyansh Jain * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31ff9e112dSShreyansh Jain * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32ff9e112dSShreyansh Jain */ 33ff9e112dSShreyansh Jain /* System headers */ 34ff9e112dSShreyansh Jain #include <stdio.h> 35ff9e112dSShreyansh Jain #include <inttypes.h> 36ff9e112dSShreyansh Jain #include <unistd.h> 37ff9e112dSShreyansh Jain #include <limits.h> 38ff9e112dSShreyansh Jain #include <sched.h> 39ff9e112dSShreyansh Jain #include <signal.h> 40ff9e112dSShreyansh Jain #include <pthread.h> 41ff9e112dSShreyansh Jain #include <sys/types.h> 42ff9e112dSShreyansh Jain #include <sys/syscall.h> 43ff9e112dSShreyansh Jain 44ff9e112dSShreyansh Jain #include <rte_config.h> 45ff9e112dSShreyansh Jain #include <rte_byteorder.h> 46ff9e112dSShreyansh Jain #include <rte_common.h> 47ff9e112dSShreyansh Jain #include <rte_interrupts.h> 48ff9e112dSShreyansh Jain #include <rte_log.h> 49ff9e112dSShreyansh Jain #include <rte_debug.h> 50ff9e112dSShreyansh Jain #include <rte_pci.h> 51ff9e112dSShreyansh Jain #include <rte_atomic.h> 52ff9e112dSShreyansh Jain #include <rte_branch_prediction.h> 53ff9e112dSShreyansh Jain #include <rte_memory.h> 54ff9e112dSShreyansh Jain #include <rte_memzone.h> 55ff9e112dSShreyansh Jain #include <rte_tailq.h> 56ff9e112dSShreyansh Jain #include <rte_eal.h> 57ff9e112dSShreyansh Jain #include <rte_alarm.h> 58ff9e112dSShreyansh Jain #include <rte_ether.h> 59ff9e112dSShreyansh Jain #include <rte_ethdev.h> 60ff9e112dSShreyansh Jain #include <rte_malloc.h> 61ff9e112dSShreyansh Jain #include <rte_ring.h> 62ff9e112dSShreyansh Jain 63ff9e112dSShreyansh Jain #include <rte_dpaa_bus.h> 64ff9e112dSShreyansh Jain #include <rte_dpaa_logs.h> 6537f9b54bSShreyansh Jain #include <dpaa_mempool.h> 66ff9e112dSShreyansh Jain 67ff9e112dSShreyansh Jain #include <dpaa_ethdev.h> 6837f9b54bSShreyansh Jain #include <dpaa_rxtx.h> 6937f9b54bSShreyansh Jain 7037f9b54bSShreyansh Jain #include <fsl_usd.h> 7137f9b54bSShreyansh Jain #include <fsl_qman.h> 7237f9b54bSShreyansh Jain #include <fsl_bman.h> 7337f9b54bSShreyansh Jain #include <fsl_fman.h> 74ff9e112dSShreyansh Jain 75ff9e112dSShreyansh Jain /* Keep track of whether QMAN and BMAN have been globally initialized */ 76ff9e112dSShreyansh Jain static int is_global_init; 77ff9e112dSShreyansh Jain 78ff9e112dSShreyansh Jain static int 790cbec027SShreyansh Jain dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 800cbec027SShreyansh Jain { 810cbec027SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 820cbec027SShreyansh Jain 830cbec027SShreyansh Jain PMD_INIT_FUNC_TRACE(); 840cbec027SShreyansh Jain 850cbec027SShreyansh Jain if (mtu < ETHER_MIN_MTU) 860cbec027SShreyansh Jain return -EINVAL; 870cbec027SShreyansh Jain if (mtu > ETHER_MAX_LEN) 8825f85419SShreyansh Jain dev->data->dev_conf.rxmode.jumbo_frame = 1; 8925f85419SShreyansh Jain else 900cbec027SShreyansh Jain dev->data->dev_conf.rxmode.jumbo_frame = 0; 9125f85419SShreyansh Jain 920cbec027SShreyansh Jain dev->data->dev_conf.rxmode.max_rx_pkt_len = mtu; 930cbec027SShreyansh Jain 940cbec027SShreyansh Jain fman_if_set_maxfrm(dpaa_intf->fif, mtu); 950cbec027SShreyansh Jain 960cbec027SShreyansh Jain return 0; 970cbec027SShreyansh Jain } 980cbec027SShreyansh Jain 990cbec027SShreyansh Jain static int 100ff9e112dSShreyansh Jain dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused) 101ff9e112dSShreyansh Jain { 102ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 103ff9e112dSShreyansh Jain 10425f85419SShreyansh Jain if (dev->data->dev_conf.rxmode.jumbo_frame == 1) { 10525f85419SShreyansh Jain if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= 10625f85419SShreyansh Jain DPAA_MAX_RX_PKT_LEN) 10725f85419SShreyansh Jain return dpaa_mtu_set(dev, 10825f85419SShreyansh Jain dev->data->dev_conf.rxmode.max_rx_pkt_len); 10925f85419SShreyansh Jain else 11025f85419SShreyansh Jain return -1; 11125f85419SShreyansh Jain } 112ff9e112dSShreyansh Jain return 0; 113ff9e112dSShreyansh Jain } 114ff9e112dSShreyansh Jain 115a7bdc3bdSShreyansh Jain static const uint32_t * 116a7bdc3bdSShreyansh Jain dpaa_supported_ptypes_get(struct rte_eth_dev *dev) 117a7bdc3bdSShreyansh Jain { 118a7bdc3bdSShreyansh Jain static const uint32_t ptypes[] = { 119a7bdc3bdSShreyansh Jain /*todo -= add more types */ 120a7bdc3bdSShreyansh Jain RTE_PTYPE_L2_ETHER, 121a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV4, 122a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV4_EXT, 123a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV6, 124a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV6_EXT, 125a7bdc3bdSShreyansh Jain RTE_PTYPE_L4_TCP, 126a7bdc3bdSShreyansh Jain RTE_PTYPE_L4_UDP, 127a7bdc3bdSShreyansh Jain RTE_PTYPE_L4_SCTP 128a7bdc3bdSShreyansh Jain }; 129a7bdc3bdSShreyansh Jain 130a7bdc3bdSShreyansh Jain PMD_INIT_FUNC_TRACE(); 131a7bdc3bdSShreyansh Jain 132a7bdc3bdSShreyansh Jain if (dev->rx_pkt_burst == dpaa_eth_queue_rx) 133a7bdc3bdSShreyansh Jain return ptypes; 134a7bdc3bdSShreyansh Jain return NULL; 135a7bdc3bdSShreyansh Jain } 136a7bdc3bdSShreyansh Jain 137ff9e112dSShreyansh Jain static int dpaa_eth_dev_start(struct rte_eth_dev *dev) 138ff9e112dSShreyansh Jain { 13937f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 14037f9b54bSShreyansh Jain 141ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 142ff9e112dSShreyansh Jain 143ff9e112dSShreyansh Jain /* Change tx callback to the real one */ 14437f9b54bSShreyansh Jain dev->tx_pkt_burst = dpaa_eth_queue_tx; 14537f9b54bSShreyansh Jain fman_if_enable_rx(dpaa_intf->fif); 146ff9e112dSShreyansh Jain 147ff9e112dSShreyansh Jain return 0; 148ff9e112dSShreyansh Jain } 149ff9e112dSShreyansh Jain 150ff9e112dSShreyansh Jain static void dpaa_eth_dev_stop(struct rte_eth_dev *dev) 151ff9e112dSShreyansh Jain { 15237f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 15337f9b54bSShreyansh Jain 15437f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 15537f9b54bSShreyansh Jain 15637f9b54bSShreyansh Jain fman_if_disable_rx(dpaa_intf->fif); 15737f9b54bSShreyansh Jain dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 158ff9e112dSShreyansh Jain } 159ff9e112dSShreyansh Jain 16037f9b54bSShreyansh Jain static void dpaa_eth_dev_close(struct rte_eth_dev *dev) 16137f9b54bSShreyansh Jain { 16237f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 16337f9b54bSShreyansh Jain 16437f9b54bSShreyansh Jain dpaa_eth_dev_stop(dev); 16537f9b54bSShreyansh Jain } 16637f9b54bSShreyansh Jain 167*cf0fab1dSHemant Agrawal static int 168*cf0fab1dSHemant Agrawal dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused, 169*cf0fab1dSHemant Agrawal char *fw_version, 170*cf0fab1dSHemant Agrawal size_t fw_size) 171*cf0fab1dSHemant Agrawal { 172*cf0fab1dSHemant Agrawal int ret; 173*cf0fab1dSHemant Agrawal FILE *svr_file = NULL; 174*cf0fab1dSHemant Agrawal unsigned int svr_ver = 0; 175*cf0fab1dSHemant Agrawal 176*cf0fab1dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 177*cf0fab1dSHemant Agrawal 178*cf0fab1dSHemant Agrawal svr_file = fopen(DPAA_SOC_ID_FILE, "r"); 179*cf0fab1dSHemant Agrawal if (!svr_file) { 180*cf0fab1dSHemant Agrawal DPAA_PMD_ERR("Unable to open SoC device"); 181*cf0fab1dSHemant Agrawal return -ENOTSUP; /* Not supported on this infra */ 182*cf0fab1dSHemant Agrawal } 183*cf0fab1dSHemant Agrawal 184*cf0fab1dSHemant Agrawal ret = fscanf(svr_file, "svr:%x", &svr_ver); 185*cf0fab1dSHemant Agrawal if (ret <= 0) { 186*cf0fab1dSHemant Agrawal DPAA_PMD_ERR("Unable to read SoC device"); 187*cf0fab1dSHemant Agrawal return -ENOTSUP; /* Not supported on this infra */ 188*cf0fab1dSHemant Agrawal } 189*cf0fab1dSHemant Agrawal 190*cf0fab1dSHemant Agrawal ret = snprintf(fw_version, fw_size, 191*cf0fab1dSHemant Agrawal "svr:%x-fman-v%x", 192*cf0fab1dSHemant Agrawal svr_ver, 193*cf0fab1dSHemant Agrawal fman_ip_rev); 194*cf0fab1dSHemant Agrawal 195*cf0fab1dSHemant Agrawal ret += 1; /* add the size of '\0' */ 196*cf0fab1dSHemant Agrawal if (fw_size < (uint32_t)ret) 197*cf0fab1dSHemant Agrawal return ret; 198*cf0fab1dSHemant Agrawal else 199*cf0fab1dSHemant Agrawal return 0; 200*cf0fab1dSHemant Agrawal } 201*cf0fab1dSHemant Agrawal 202799db456SShreyansh Jain static void dpaa_eth_dev_info(struct rte_eth_dev *dev, 203799db456SShreyansh Jain struct rte_eth_dev_info *dev_info) 204799db456SShreyansh Jain { 205799db456SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 206799db456SShreyansh Jain 207799db456SShreyansh Jain PMD_INIT_FUNC_TRACE(); 208799db456SShreyansh Jain 209799db456SShreyansh Jain dev_info->max_rx_queues = dpaa_intf->nb_rx_queues; 210799db456SShreyansh Jain dev_info->max_tx_queues = dpaa_intf->nb_tx_queues; 211799db456SShreyansh Jain dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE; 212799db456SShreyansh Jain dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN; 213799db456SShreyansh Jain dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER; 214799db456SShreyansh Jain dev_info->max_hash_mac_addrs = 0; 215799db456SShreyansh Jain dev_info->max_vfs = 0; 216799db456SShreyansh Jain dev_info->max_vmdq_pools = ETH_16_POOLS; 2174fa5e0bbSShreyansh Jain dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL; 218799db456SShreyansh Jain dev_info->speed_capa = (ETH_LINK_SPEED_1G | 219799db456SShreyansh Jain ETH_LINK_SPEED_10G); 220a7bdc3bdSShreyansh Jain dev_info->rx_offload_capa = 221a7bdc3bdSShreyansh Jain (DEV_RX_OFFLOAD_IPV4_CKSUM | 222a7bdc3bdSShreyansh Jain DEV_RX_OFFLOAD_UDP_CKSUM | 223a7bdc3bdSShreyansh Jain DEV_RX_OFFLOAD_TCP_CKSUM); 2245a8cf1beSShreyansh Jain dev_info->tx_offload_capa = 2255a8cf1beSShreyansh Jain (DEV_TX_OFFLOAD_IPV4_CKSUM | 2265a8cf1beSShreyansh Jain DEV_TX_OFFLOAD_UDP_CKSUM | 2275a8cf1beSShreyansh Jain DEV_TX_OFFLOAD_TCP_CKSUM); 228799db456SShreyansh Jain } 229799db456SShreyansh Jain 230e124a69fSShreyansh Jain static int dpaa_eth_link_update(struct rte_eth_dev *dev, 231e124a69fSShreyansh Jain int wait_to_complete __rte_unused) 232e124a69fSShreyansh Jain { 233e124a69fSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 234e124a69fSShreyansh Jain struct rte_eth_link *link = &dev->data->dev_link; 235e124a69fSShreyansh Jain 236e124a69fSShreyansh Jain PMD_INIT_FUNC_TRACE(); 237e124a69fSShreyansh Jain 238e124a69fSShreyansh Jain if (dpaa_intf->fif->mac_type == fman_mac_1g) 239e124a69fSShreyansh Jain link->link_speed = 1000; 240e124a69fSShreyansh Jain else if (dpaa_intf->fif->mac_type == fman_mac_10g) 241e124a69fSShreyansh Jain link->link_speed = 10000; 242e124a69fSShreyansh Jain else 243e124a69fSShreyansh Jain DPAA_PMD_ERR("invalid link_speed: %s, %d", 244e124a69fSShreyansh Jain dpaa_intf->name, dpaa_intf->fif->mac_type); 245e124a69fSShreyansh Jain 246e124a69fSShreyansh Jain link->link_status = dpaa_intf->valid; 247e124a69fSShreyansh Jain link->link_duplex = ETH_LINK_FULL_DUPLEX; 248e124a69fSShreyansh Jain link->link_autoneg = ETH_LINK_AUTONEG; 249e124a69fSShreyansh Jain return 0; 250e124a69fSShreyansh Jain } 251e124a69fSShreyansh Jain 252e1ad3a05SShreyansh Jain static void dpaa_eth_stats_get(struct rte_eth_dev *dev, 253e1ad3a05SShreyansh Jain struct rte_eth_stats *stats) 254e1ad3a05SShreyansh Jain { 255e1ad3a05SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 256e1ad3a05SShreyansh Jain 257e1ad3a05SShreyansh Jain PMD_INIT_FUNC_TRACE(); 258e1ad3a05SShreyansh Jain 259e1ad3a05SShreyansh Jain fman_if_stats_get(dpaa_intf->fif, stats); 260e1ad3a05SShreyansh Jain } 261e1ad3a05SShreyansh Jain 262e1ad3a05SShreyansh Jain static void dpaa_eth_stats_reset(struct rte_eth_dev *dev) 263e1ad3a05SShreyansh Jain { 264e1ad3a05SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 265e1ad3a05SShreyansh Jain 266e1ad3a05SShreyansh Jain PMD_INIT_FUNC_TRACE(); 267e1ad3a05SShreyansh Jain 268e1ad3a05SShreyansh Jain fman_if_stats_reset(dpaa_intf->fif); 269e1ad3a05SShreyansh Jain } 27095ef603dSShreyansh Jain 27195ef603dSShreyansh Jain static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev) 27295ef603dSShreyansh Jain { 27395ef603dSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 27495ef603dSShreyansh Jain 27595ef603dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 27695ef603dSShreyansh Jain 27795ef603dSShreyansh Jain fman_if_promiscuous_enable(dpaa_intf->fif); 27895ef603dSShreyansh Jain } 27995ef603dSShreyansh Jain 28095ef603dSShreyansh Jain static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev) 28195ef603dSShreyansh Jain { 28295ef603dSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 28395ef603dSShreyansh Jain 28495ef603dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 28595ef603dSShreyansh Jain 28695ef603dSShreyansh Jain fman_if_promiscuous_disable(dpaa_intf->fif); 28795ef603dSShreyansh Jain } 28895ef603dSShreyansh Jain 28944dd70a3SShreyansh Jain static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev) 29044dd70a3SShreyansh Jain { 29144dd70a3SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 29244dd70a3SShreyansh Jain 29344dd70a3SShreyansh Jain PMD_INIT_FUNC_TRACE(); 29444dd70a3SShreyansh Jain 29544dd70a3SShreyansh Jain fman_if_set_mcast_filter_table(dpaa_intf->fif); 29644dd70a3SShreyansh Jain } 29744dd70a3SShreyansh Jain 29844dd70a3SShreyansh Jain static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev) 29944dd70a3SShreyansh Jain { 30044dd70a3SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 30144dd70a3SShreyansh Jain 30244dd70a3SShreyansh Jain PMD_INIT_FUNC_TRACE(); 30344dd70a3SShreyansh Jain 30444dd70a3SShreyansh Jain fman_if_reset_mcast_filter_table(dpaa_intf->fif); 30544dd70a3SShreyansh Jain } 30644dd70a3SShreyansh Jain 30737f9b54bSShreyansh Jain static 30837f9b54bSShreyansh Jain int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 30937f9b54bSShreyansh Jain uint16_t nb_desc __rte_unused, 31037f9b54bSShreyansh Jain unsigned int socket_id __rte_unused, 31137f9b54bSShreyansh Jain const struct rte_eth_rxconf *rx_conf __rte_unused, 31237f9b54bSShreyansh Jain struct rte_mempool *mp) 31337f9b54bSShreyansh Jain { 31437f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 31537f9b54bSShreyansh Jain 31637f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 31737f9b54bSShreyansh Jain 31837f9b54bSShreyansh Jain DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx); 31937f9b54bSShreyansh Jain 32037f9b54bSShreyansh Jain if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) { 32137f9b54bSShreyansh Jain struct fman_if_ic_params icp; 32237f9b54bSShreyansh Jain uint32_t fd_offset; 32337f9b54bSShreyansh Jain uint32_t bp_size; 32437f9b54bSShreyansh Jain 32537f9b54bSShreyansh Jain if (!mp->pool_data) { 32637f9b54bSShreyansh Jain DPAA_PMD_ERR("Not an offloaded buffer pool!"); 32737f9b54bSShreyansh Jain return -1; 32837f9b54bSShreyansh Jain } 32937f9b54bSShreyansh Jain dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 33037f9b54bSShreyansh Jain 33137f9b54bSShreyansh Jain memset(&icp, 0, sizeof(icp)); 33237f9b54bSShreyansh Jain /* set ICEOF for to the default value , which is 0*/ 33337f9b54bSShreyansh Jain icp.iciof = DEFAULT_ICIOF; 33437f9b54bSShreyansh Jain icp.iceof = DEFAULT_RX_ICEOF; 33537f9b54bSShreyansh Jain icp.icsz = DEFAULT_ICSZ; 33637f9b54bSShreyansh Jain fman_if_set_ic_params(dpaa_intf->fif, &icp); 33737f9b54bSShreyansh Jain 33837f9b54bSShreyansh Jain fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE; 33937f9b54bSShreyansh Jain fman_if_set_fdoff(dpaa_intf->fif, fd_offset); 34037f9b54bSShreyansh Jain 34137f9b54bSShreyansh Jain /* Buffer pool size should be equal to Dataroom Size*/ 34237f9b54bSShreyansh Jain bp_size = rte_pktmbuf_data_room_size(mp); 34337f9b54bSShreyansh Jain fman_if_set_bp(dpaa_intf->fif, mp->size, 34437f9b54bSShreyansh Jain dpaa_intf->bp_info->bpid, bp_size); 34537f9b54bSShreyansh Jain dpaa_intf->valid = 1; 34637f9b54bSShreyansh Jain DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d", 34737f9b54bSShreyansh Jain dpaa_intf->name, fd_offset, 34837f9b54bSShreyansh Jain fman_if_get_fdoff(dpaa_intf->fif)); 34937f9b54bSShreyansh Jain } 35037f9b54bSShreyansh Jain dev->data->rx_queues[queue_idx] = &dpaa_intf->rx_queues[queue_idx]; 35137f9b54bSShreyansh Jain 35237f9b54bSShreyansh Jain return 0; 35337f9b54bSShreyansh Jain } 35437f9b54bSShreyansh Jain 35537f9b54bSShreyansh Jain static 35637f9b54bSShreyansh Jain void dpaa_eth_rx_queue_release(void *rxq __rte_unused) 35737f9b54bSShreyansh Jain { 35837f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 35937f9b54bSShreyansh Jain } 36037f9b54bSShreyansh Jain 36137f9b54bSShreyansh Jain static 36237f9b54bSShreyansh Jain int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 36337f9b54bSShreyansh Jain uint16_t nb_desc __rte_unused, 36437f9b54bSShreyansh Jain unsigned int socket_id __rte_unused, 36537f9b54bSShreyansh Jain const struct rte_eth_txconf *tx_conf __rte_unused) 36637f9b54bSShreyansh Jain { 36737f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 36837f9b54bSShreyansh Jain 36937f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 37037f9b54bSShreyansh Jain 37137f9b54bSShreyansh Jain DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx); 37237f9b54bSShreyansh Jain dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx]; 37337f9b54bSShreyansh Jain return 0; 37437f9b54bSShreyansh Jain } 37537f9b54bSShreyansh Jain 37637f9b54bSShreyansh Jain static void dpaa_eth_tx_queue_release(void *txq __rte_unused) 377ff9e112dSShreyansh Jain { 378ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 379ff9e112dSShreyansh Jain } 380ff9e112dSShreyansh Jain 381e124a69fSShreyansh Jain static int dpaa_link_down(struct rte_eth_dev *dev) 382e124a69fSShreyansh Jain { 383e124a69fSShreyansh Jain PMD_INIT_FUNC_TRACE(); 384e124a69fSShreyansh Jain 385e124a69fSShreyansh Jain dpaa_eth_dev_stop(dev); 386e124a69fSShreyansh Jain return 0; 387e124a69fSShreyansh Jain } 388e124a69fSShreyansh Jain 389e124a69fSShreyansh Jain static int dpaa_link_up(struct rte_eth_dev *dev) 390e124a69fSShreyansh Jain { 391e124a69fSShreyansh Jain PMD_INIT_FUNC_TRACE(); 392e124a69fSShreyansh Jain 393e124a69fSShreyansh Jain dpaa_eth_dev_start(dev); 394e124a69fSShreyansh Jain return 0; 395e124a69fSShreyansh Jain } 396e124a69fSShreyansh Jain 397fe6c6032SShreyansh Jain static int 39812a4678aSShreyansh Jain dpaa_flow_ctrl_set(struct rte_eth_dev *dev, 39912a4678aSShreyansh Jain struct rte_eth_fc_conf *fc_conf) 40012a4678aSShreyansh Jain { 40112a4678aSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 40212a4678aSShreyansh Jain struct rte_eth_fc_conf *net_fc; 40312a4678aSShreyansh Jain 40412a4678aSShreyansh Jain PMD_INIT_FUNC_TRACE(); 40512a4678aSShreyansh Jain 40612a4678aSShreyansh Jain if (!(dpaa_intf->fc_conf)) { 40712a4678aSShreyansh Jain dpaa_intf->fc_conf = rte_zmalloc(NULL, 40812a4678aSShreyansh Jain sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 40912a4678aSShreyansh Jain if (!dpaa_intf->fc_conf) { 41012a4678aSShreyansh Jain DPAA_PMD_ERR("unable to save flow control info"); 41112a4678aSShreyansh Jain return -ENOMEM; 41212a4678aSShreyansh Jain } 41312a4678aSShreyansh Jain } 41412a4678aSShreyansh Jain net_fc = dpaa_intf->fc_conf; 41512a4678aSShreyansh Jain 41612a4678aSShreyansh Jain if (fc_conf->high_water < fc_conf->low_water) { 41712a4678aSShreyansh Jain DPAA_PMD_ERR("Incorrect Flow Control Configuration"); 41812a4678aSShreyansh Jain return -EINVAL; 41912a4678aSShreyansh Jain } 42012a4678aSShreyansh Jain 42112a4678aSShreyansh Jain if (fc_conf->mode == RTE_FC_NONE) { 42212a4678aSShreyansh Jain return 0; 42312a4678aSShreyansh Jain } else if (fc_conf->mode == RTE_FC_TX_PAUSE || 42412a4678aSShreyansh Jain fc_conf->mode == RTE_FC_FULL) { 42512a4678aSShreyansh Jain fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water, 42612a4678aSShreyansh Jain fc_conf->low_water, 42712a4678aSShreyansh Jain dpaa_intf->bp_info->bpid); 42812a4678aSShreyansh Jain if (fc_conf->pause_time) 42912a4678aSShreyansh Jain fman_if_set_fc_quanta(dpaa_intf->fif, 43012a4678aSShreyansh Jain fc_conf->pause_time); 43112a4678aSShreyansh Jain } 43212a4678aSShreyansh Jain 43312a4678aSShreyansh Jain /* Save the information in dpaa device */ 43412a4678aSShreyansh Jain net_fc->pause_time = fc_conf->pause_time; 43512a4678aSShreyansh Jain net_fc->high_water = fc_conf->high_water; 43612a4678aSShreyansh Jain net_fc->low_water = fc_conf->low_water; 43712a4678aSShreyansh Jain net_fc->send_xon = fc_conf->send_xon; 43812a4678aSShreyansh Jain net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd; 43912a4678aSShreyansh Jain net_fc->mode = fc_conf->mode; 44012a4678aSShreyansh Jain net_fc->autoneg = fc_conf->autoneg; 44112a4678aSShreyansh Jain 44212a4678aSShreyansh Jain return 0; 44312a4678aSShreyansh Jain } 44412a4678aSShreyansh Jain 44512a4678aSShreyansh Jain static int 44612a4678aSShreyansh Jain dpaa_flow_ctrl_get(struct rte_eth_dev *dev, 44712a4678aSShreyansh Jain struct rte_eth_fc_conf *fc_conf) 44812a4678aSShreyansh Jain { 44912a4678aSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 45012a4678aSShreyansh Jain struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf; 45112a4678aSShreyansh Jain int ret; 45212a4678aSShreyansh Jain 45312a4678aSShreyansh Jain PMD_INIT_FUNC_TRACE(); 45412a4678aSShreyansh Jain 45512a4678aSShreyansh Jain if (net_fc) { 45612a4678aSShreyansh Jain fc_conf->pause_time = net_fc->pause_time; 45712a4678aSShreyansh Jain fc_conf->high_water = net_fc->high_water; 45812a4678aSShreyansh Jain fc_conf->low_water = net_fc->low_water; 45912a4678aSShreyansh Jain fc_conf->send_xon = net_fc->send_xon; 46012a4678aSShreyansh Jain fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd; 46112a4678aSShreyansh Jain fc_conf->mode = net_fc->mode; 46212a4678aSShreyansh Jain fc_conf->autoneg = net_fc->autoneg; 46312a4678aSShreyansh Jain return 0; 46412a4678aSShreyansh Jain } 46512a4678aSShreyansh Jain ret = fman_if_get_fc_threshold(dpaa_intf->fif); 46612a4678aSShreyansh Jain if (ret) { 46712a4678aSShreyansh Jain fc_conf->mode = RTE_FC_TX_PAUSE; 46812a4678aSShreyansh Jain fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 46912a4678aSShreyansh Jain } else { 47012a4678aSShreyansh Jain fc_conf->mode = RTE_FC_NONE; 47112a4678aSShreyansh Jain } 47212a4678aSShreyansh Jain 47312a4678aSShreyansh Jain return 0; 47412a4678aSShreyansh Jain } 47512a4678aSShreyansh Jain 47612a4678aSShreyansh Jain static int 477fe6c6032SShreyansh Jain dpaa_dev_add_mac_addr(struct rte_eth_dev *dev, 478fe6c6032SShreyansh Jain struct ether_addr *addr, 479fe6c6032SShreyansh Jain uint32_t index, 480fe6c6032SShreyansh Jain __rte_unused uint32_t pool) 481fe6c6032SShreyansh Jain { 482fe6c6032SShreyansh Jain int ret; 483fe6c6032SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 484fe6c6032SShreyansh Jain 485fe6c6032SShreyansh Jain PMD_INIT_FUNC_TRACE(); 486fe6c6032SShreyansh Jain 487fe6c6032SShreyansh Jain ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index); 488fe6c6032SShreyansh Jain 489fe6c6032SShreyansh Jain if (ret) 490fe6c6032SShreyansh Jain RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:" 491fe6c6032SShreyansh Jain " err = %d", ret); 492fe6c6032SShreyansh Jain return 0; 493fe6c6032SShreyansh Jain } 494fe6c6032SShreyansh Jain 495fe6c6032SShreyansh Jain static void 496fe6c6032SShreyansh Jain dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev, 497fe6c6032SShreyansh Jain uint32_t index) 498fe6c6032SShreyansh Jain { 499fe6c6032SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 500fe6c6032SShreyansh Jain 501fe6c6032SShreyansh Jain PMD_INIT_FUNC_TRACE(); 502fe6c6032SShreyansh Jain 503fe6c6032SShreyansh Jain fman_if_clear_mac_addr(dpaa_intf->fif, index); 504fe6c6032SShreyansh Jain } 505fe6c6032SShreyansh Jain 506fe6c6032SShreyansh Jain static void 507fe6c6032SShreyansh Jain dpaa_dev_set_mac_addr(struct rte_eth_dev *dev, 508fe6c6032SShreyansh Jain struct ether_addr *addr) 509fe6c6032SShreyansh Jain { 510fe6c6032SShreyansh Jain int ret; 511fe6c6032SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 512fe6c6032SShreyansh Jain 513fe6c6032SShreyansh Jain PMD_INIT_FUNC_TRACE(); 514fe6c6032SShreyansh Jain 515fe6c6032SShreyansh Jain ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0); 516fe6c6032SShreyansh Jain if (ret) 517fe6c6032SShreyansh Jain RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret); 518fe6c6032SShreyansh Jain } 519fe6c6032SShreyansh Jain 520ff9e112dSShreyansh Jain static struct eth_dev_ops dpaa_devops = { 521ff9e112dSShreyansh Jain .dev_configure = dpaa_eth_dev_configure, 522ff9e112dSShreyansh Jain .dev_start = dpaa_eth_dev_start, 523ff9e112dSShreyansh Jain .dev_stop = dpaa_eth_dev_stop, 524ff9e112dSShreyansh Jain .dev_close = dpaa_eth_dev_close, 525799db456SShreyansh Jain .dev_infos_get = dpaa_eth_dev_info, 526a7bdc3bdSShreyansh Jain .dev_supported_ptypes_get = dpaa_supported_ptypes_get, 52737f9b54bSShreyansh Jain 52837f9b54bSShreyansh Jain .rx_queue_setup = dpaa_eth_rx_queue_setup, 52937f9b54bSShreyansh Jain .tx_queue_setup = dpaa_eth_tx_queue_setup, 53037f9b54bSShreyansh Jain .rx_queue_release = dpaa_eth_rx_queue_release, 53137f9b54bSShreyansh Jain .tx_queue_release = dpaa_eth_tx_queue_release, 532e124a69fSShreyansh Jain 53312a4678aSShreyansh Jain .flow_ctrl_get = dpaa_flow_ctrl_get, 53412a4678aSShreyansh Jain .flow_ctrl_set = dpaa_flow_ctrl_set, 53512a4678aSShreyansh Jain 536e124a69fSShreyansh Jain .link_update = dpaa_eth_link_update, 537e1ad3a05SShreyansh Jain .stats_get = dpaa_eth_stats_get, 538e1ad3a05SShreyansh Jain .stats_reset = dpaa_eth_stats_reset, 53995ef603dSShreyansh Jain .promiscuous_enable = dpaa_eth_promiscuous_enable, 54095ef603dSShreyansh Jain .promiscuous_disable = dpaa_eth_promiscuous_disable, 54144dd70a3SShreyansh Jain .allmulticast_enable = dpaa_eth_multicast_enable, 54244dd70a3SShreyansh Jain .allmulticast_disable = dpaa_eth_multicast_disable, 5430cbec027SShreyansh Jain .mtu_set = dpaa_mtu_set, 544e124a69fSShreyansh Jain .dev_set_link_down = dpaa_link_down, 545e124a69fSShreyansh Jain .dev_set_link_up = dpaa_link_up, 546fe6c6032SShreyansh Jain .mac_addr_add = dpaa_dev_add_mac_addr, 547fe6c6032SShreyansh Jain .mac_addr_remove = dpaa_dev_remove_mac_addr, 548fe6c6032SShreyansh Jain .mac_addr_set = dpaa_dev_set_mac_addr, 549fe6c6032SShreyansh Jain 550*cf0fab1dSHemant Agrawal .fw_version_get = dpaa_fw_version_get, 551ff9e112dSShreyansh Jain }; 552ff9e112dSShreyansh Jain 55312a4678aSShreyansh Jain static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf) 55412a4678aSShreyansh Jain { 55512a4678aSShreyansh Jain struct rte_eth_fc_conf *fc_conf; 55612a4678aSShreyansh Jain int ret; 55712a4678aSShreyansh Jain 55812a4678aSShreyansh Jain PMD_INIT_FUNC_TRACE(); 55912a4678aSShreyansh Jain 56012a4678aSShreyansh Jain if (!(dpaa_intf->fc_conf)) { 56112a4678aSShreyansh Jain dpaa_intf->fc_conf = rte_zmalloc(NULL, 56212a4678aSShreyansh Jain sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 56312a4678aSShreyansh Jain if (!dpaa_intf->fc_conf) { 56412a4678aSShreyansh Jain DPAA_PMD_ERR("unable to save flow control info"); 56512a4678aSShreyansh Jain return -ENOMEM; 56612a4678aSShreyansh Jain } 56712a4678aSShreyansh Jain } 56812a4678aSShreyansh Jain fc_conf = dpaa_intf->fc_conf; 56912a4678aSShreyansh Jain ret = fman_if_get_fc_threshold(dpaa_intf->fif); 57012a4678aSShreyansh Jain if (ret) { 57112a4678aSShreyansh Jain fc_conf->mode = RTE_FC_TX_PAUSE; 57212a4678aSShreyansh Jain fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 57312a4678aSShreyansh Jain } else { 57412a4678aSShreyansh Jain fc_conf->mode = RTE_FC_NONE; 57512a4678aSShreyansh Jain } 57612a4678aSShreyansh Jain 57712a4678aSShreyansh Jain return 0; 57812a4678aSShreyansh Jain } 57912a4678aSShreyansh Jain 58037f9b54bSShreyansh Jain /* Initialise an Rx FQ */ 58137f9b54bSShreyansh Jain static int dpaa_rx_queue_init(struct qman_fq *fq, 58237f9b54bSShreyansh Jain uint32_t fqid) 58337f9b54bSShreyansh Jain { 58437f9b54bSShreyansh Jain struct qm_mcc_initfq opts; 58537f9b54bSShreyansh Jain int ret; 58637f9b54bSShreyansh Jain 58737f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 58837f9b54bSShreyansh Jain 58937f9b54bSShreyansh Jain ret = qman_reserve_fqid(fqid); 59037f9b54bSShreyansh Jain if (ret) { 59137f9b54bSShreyansh Jain DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d", 59237f9b54bSShreyansh Jain fqid, ret); 59337f9b54bSShreyansh Jain return -EINVAL; 59437f9b54bSShreyansh Jain } 59537f9b54bSShreyansh Jain 59637f9b54bSShreyansh Jain DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid); 59737f9b54bSShreyansh Jain ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 59837f9b54bSShreyansh Jain if (ret) { 59937f9b54bSShreyansh Jain DPAA_PMD_ERR("create rx fqid %d failed with ret: %d", 60037f9b54bSShreyansh Jain fqid, ret); 60137f9b54bSShreyansh Jain return ret; 60237f9b54bSShreyansh Jain } 60337f9b54bSShreyansh Jain 60437f9b54bSShreyansh Jain opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 60537f9b54bSShreyansh Jain QM_INITFQ_WE_CONTEXTA; 60637f9b54bSShreyansh Jain 60737f9b54bSShreyansh Jain opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY; 60837f9b54bSShreyansh Jain opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING | 60937f9b54bSShreyansh Jain QM_FQCTRL_PREFERINCACHE; 61037f9b54bSShreyansh Jain opts.fqd.context_a.stashing.exclusive = 0; 61137f9b54bSShreyansh Jain opts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH; 61237f9b54bSShreyansh Jain opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH; 61337f9b54bSShreyansh Jain opts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH; 61437f9b54bSShreyansh Jain 61537f9b54bSShreyansh Jain /*Enable tail drop */ 61637f9b54bSShreyansh Jain opts.we_mask = opts.we_mask | QM_INITFQ_WE_TDTHRESH; 61737f9b54bSShreyansh Jain opts.fqd.fq_ctrl = opts.fqd.fq_ctrl | QM_FQCTRL_TDE; 61837f9b54bSShreyansh Jain qm_fqd_taildrop_set(&opts.fqd.td, CONG_THRESHOLD_RX_Q, 1); 61937f9b54bSShreyansh Jain 62037f9b54bSShreyansh Jain ret = qman_init_fq(fq, 0, &opts); 62137f9b54bSShreyansh Jain if (ret) 62237f9b54bSShreyansh Jain DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret); 62337f9b54bSShreyansh Jain return ret; 62437f9b54bSShreyansh Jain } 62537f9b54bSShreyansh Jain 62637f9b54bSShreyansh Jain /* Initialise a Tx FQ */ 62737f9b54bSShreyansh Jain static int dpaa_tx_queue_init(struct qman_fq *fq, 62837f9b54bSShreyansh Jain struct fman_if *fman_intf) 62937f9b54bSShreyansh Jain { 63037f9b54bSShreyansh Jain struct qm_mcc_initfq opts; 63137f9b54bSShreyansh Jain int ret; 63237f9b54bSShreyansh Jain 63337f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 63437f9b54bSShreyansh Jain 63537f9b54bSShreyansh Jain ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID | 63637f9b54bSShreyansh Jain QMAN_FQ_FLAG_TO_DCPORTAL, fq); 63737f9b54bSShreyansh Jain if (ret) { 63837f9b54bSShreyansh Jain DPAA_PMD_ERR("create tx fq failed with ret: %d", ret); 63937f9b54bSShreyansh Jain return ret; 64037f9b54bSShreyansh Jain } 64137f9b54bSShreyansh Jain opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 64237f9b54bSShreyansh Jain QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA; 64337f9b54bSShreyansh Jain opts.fqd.dest.channel = fman_intf->tx_channel_id; 64437f9b54bSShreyansh Jain opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY; 64537f9b54bSShreyansh Jain opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE; 64637f9b54bSShreyansh Jain opts.fqd.context_b = 0; 64737f9b54bSShreyansh Jain /* no tx-confirmation */ 64837f9b54bSShreyansh Jain opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi; 64937f9b54bSShreyansh Jain opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo; 65037f9b54bSShreyansh Jain DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid); 65137f9b54bSShreyansh Jain ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts); 65237f9b54bSShreyansh Jain if (ret) 65337f9b54bSShreyansh Jain DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret); 65437f9b54bSShreyansh Jain return ret; 65537f9b54bSShreyansh Jain } 65637f9b54bSShreyansh Jain 65705ba55bcSShreyansh Jain #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 65805ba55bcSShreyansh Jain /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */ 65905ba55bcSShreyansh Jain static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid) 66005ba55bcSShreyansh Jain { 66105ba55bcSShreyansh Jain struct qm_mcc_initfq opts; 66205ba55bcSShreyansh Jain int ret; 66305ba55bcSShreyansh Jain 66405ba55bcSShreyansh Jain PMD_INIT_FUNC_TRACE(); 66505ba55bcSShreyansh Jain 66605ba55bcSShreyansh Jain ret = qman_reserve_fqid(fqid); 66705ba55bcSShreyansh Jain if (ret) { 66805ba55bcSShreyansh Jain DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d", 66905ba55bcSShreyansh Jain fqid, ret); 67005ba55bcSShreyansh Jain return -EINVAL; 67105ba55bcSShreyansh Jain } 67205ba55bcSShreyansh Jain /* "map" this Rx FQ to one of the interfaces Tx FQID */ 67305ba55bcSShreyansh Jain DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid); 67405ba55bcSShreyansh Jain ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 67505ba55bcSShreyansh Jain if (ret) { 67605ba55bcSShreyansh Jain DPAA_PMD_ERR("create debug fqid %d failed with ret: %d", 67705ba55bcSShreyansh Jain fqid, ret); 67805ba55bcSShreyansh Jain return ret; 67905ba55bcSShreyansh Jain } 68005ba55bcSShreyansh Jain opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL; 68105ba55bcSShreyansh Jain opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY; 68205ba55bcSShreyansh Jain ret = qman_init_fq(fq, 0, &opts); 68305ba55bcSShreyansh Jain if (ret) 68405ba55bcSShreyansh Jain DPAA_PMD_ERR("init debug fqid %d failed with ret: %d", 68505ba55bcSShreyansh Jain fqid, ret); 68605ba55bcSShreyansh Jain return ret; 68705ba55bcSShreyansh Jain } 68805ba55bcSShreyansh Jain #endif 68905ba55bcSShreyansh Jain 690ff9e112dSShreyansh Jain /* Initialise a network interface */ 691ff9e112dSShreyansh Jain static int 692ff9e112dSShreyansh Jain dpaa_dev_init(struct rte_eth_dev *eth_dev) 693ff9e112dSShreyansh Jain { 69437f9b54bSShreyansh Jain int num_cores, num_rx_fqs, fqid; 69537f9b54bSShreyansh Jain int loop, ret = 0; 696ff9e112dSShreyansh Jain int dev_id; 697ff9e112dSShreyansh Jain struct rte_dpaa_device *dpaa_device; 698ff9e112dSShreyansh Jain struct dpaa_if *dpaa_intf; 69937f9b54bSShreyansh Jain struct fm_eth_port_cfg *cfg; 70037f9b54bSShreyansh Jain struct fman_if *fman_intf; 70137f9b54bSShreyansh Jain struct fman_if_bpool *bp, *tmp_bp; 702ff9e112dSShreyansh Jain 703ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 704ff9e112dSShreyansh Jain 705ff9e112dSShreyansh Jain /* For secondary processes, the primary has done all the work */ 706ff9e112dSShreyansh Jain if (rte_eal_process_type() != RTE_PROC_PRIMARY) 707ff9e112dSShreyansh Jain return 0; 708ff9e112dSShreyansh Jain 709ff9e112dSShreyansh Jain dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device); 710ff9e112dSShreyansh Jain dev_id = dpaa_device->id.dev_id; 711ff9e112dSShreyansh Jain dpaa_intf = eth_dev->data->dev_private; 71237f9b54bSShreyansh Jain cfg = &dpaa_netcfg->port_cfg[dev_id]; 71337f9b54bSShreyansh Jain fman_intf = cfg->fman_if; 714ff9e112dSShreyansh Jain 715ff9e112dSShreyansh Jain dpaa_intf->name = dpaa_device->name; 716ff9e112dSShreyansh Jain 71737f9b54bSShreyansh Jain /* save fman_if & cfg in the interface struture */ 71837f9b54bSShreyansh Jain dpaa_intf->fif = fman_intf; 719ff9e112dSShreyansh Jain dpaa_intf->ifid = dev_id; 72037f9b54bSShreyansh Jain dpaa_intf->cfg = cfg; 721ff9e112dSShreyansh Jain 72237f9b54bSShreyansh Jain /* Initialize Rx FQ's */ 72337f9b54bSShreyansh Jain if (getenv("DPAA_NUM_RX_QUEUES")) 72437f9b54bSShreyansh Jain num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES")); 72537f9b54bSShreyansh Jain else 72637f9b54bSShreyansh Jain num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES; 72737f9b54bSShreyansh Jain 72837f9b54bSShreyansh Jain /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX 72937f9b54bSShreyansh Jain * queues. 73037f9b54bSShreyansh Jain */ 73137f9b54bSShreyansh Jain if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) { 73237f9b54bSShreyansh Jain DPAA_PMD_ERR("Invalid number of RX queues\n"); 73337f9b54bSShreyansh Jain return -EINVAL; 73437f9b54bSShreyansh Jain } 73537f9b54bSShreyansh Jain 73637f9b54bSShreyansh Jain dpaa_intf->rx_queues = rte_zmalloc(NULL, 73737f9b54bSShreyansh Jain sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE); 73837f9b54bSShreyansh Jain for (loop = 0; loop < num_rx_fqs; loop++) { 73937f9b54bSShreyansh Jain fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid * 74037f9b54bSShreyansh Jain DPAA_PCD_FQID_MULTIPLIER + loop; 74137f9b54bSShreyansh Jain ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop], fqid); 74237f9b54bSShreyansh Jain if (ret) 74337f9b54bSShreyansh Jain return ret; 74437f9b54bSShreyansh Jain dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf; 74537f9b54bSShreyansh Jain } 74637f9b54bSShreyansh Jain dpaa_intf->nb_rx_queues = num_rx_fqs; 74737f9b54bSShreyansh Jain 74837f9b54bSShreyansh Jain /* Initialise Tx FQs. Have as many Tx FQ's as number of cores */ 74937f9b54bSShreyansh Jain num_cores = rte_lcore_count(); 75037f9b54bSShreyansh Jain dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) * 75137f9b54bSShreyansh Jain num_cores, MAX_CACHELINE); 75237f9b54bSShreyansh Jain if (!dpaa_intf->tx_queues) 75337f9b54bSShreyansh Jain return -ENOMEM; 75437f9b54bSShreyansh Jain 75537f9b54bSShreyansh Jain for (loop = 0; loop < num_cores; loop++) { 75637f9b54bSShreyansh Jain ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop], 75737f9b54bSShreyansh Jain fman_intf); 75837f9b54bSShreyansh Jain if (ret) 75937f9b54bSShreyansh Jain return ret; 76037f9b54bSShreyansh Jain dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf; 76137f9b54bSShreyansh Jain } 76237f9b54bSShreyansh Jain dpaa_intf->nb_tx_queues = num_cores; 76337f9b54bSShreyansh Jain 76405ba55bcSShreyansh Jain #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 76505ba55bcSShreyansh Jain dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 76605ba55bcSShreyansh Jain DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err); 76705ba55bcSShreyansh Jain dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf; 76805ba55bcSShreyansh Jain dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 76905ba55bcSShreyansh Jain DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err); 77005ba55bcSShreyansh Jain dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf; 77105ba55bcSShreyansh Jain #endif 77205ba55bcSShreyansh Jain 77337f9b54bSShreyansh Jain DPAA_PMD_DEBUG("All frame queues created"); 77437f9b54bSShreyansh Jain 77512a4678aSShreyansh Jain /* Get the initial configuration for flow control */ 77612a4678aSShreyansh Jain dpaa_fc_set_default(dpaa_intf); 77712a4678aSShreyansh Jain 77837f9b54bSShreyansh Jain /* reset bpool list, initialize bpool dynamically */ 77937f9b54bSShreyansh Jain list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) { 78037f9b54bSShreyansh Jain list_del(&bp->node); 78137f9b54bSShreyansh Jain rte_free(bp); 78237f9b54bSShreyansh Jain } 78337f9b54bSShreyansh Jain 78437f9b54bSShreyansh Jain /* Populate ethdev structure */ 785ff9e112dSShreyansh Jain eth_dev->dev_ops = &dpaa_devops; 78637f9b54bSShreyansh Jain eth_dev->rx_pkt_burst = dpaa_eth_queue_rx; 78737f9b54bSShreyansh Jain eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 78837f9b54bSShreyansh Jain 78937f9b54bSShreyansh Jain /* Allocate memory for storing MAC addresses */ 79037f9b54bSShreyansh Jain eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", 79137f9b54bSShreyansh Jain ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0); 79237f9b54bSShreyansh Jain if (eth_dev->data->mac_addrs == NULL) { 79337f9b54bSShreyansh Jain DPAA_PMD_ERR("Failed to allocate %d bytes needed to " 79437f9b54bSShreyansh Jain "store MAC addresses", 79537f9b54bSShreyansh Jain ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER); 79637f9b54bSShreyansh Jain rte_free(dpaa_intf->rx_queues); 79737f9b54bSShreyansh Jain rte_free(dpaa_intf->tx_queues); 79837f9b54bSShreyansh Jain dpaa_intf->rx_queues = NULL; 79937f9b54bSShreyansh Jain dpaa_intf->tx_queues = NULL; 80037f9b54bSShreyansh Jain dpaa_intf->nb_rx_queues = 0; 80137f9b54bSShreyansh Jain dpaa_intf->nb_tx_queues = 0; 80237f9b54bSShreyansh Jain return -ENOMEM; 80337f9b54bSShreyansh Jain } 80437f9b54bSShreyansh Jain 80537f9b54bSShreyansh Jain /* copy the primary mac address */ 80637f9b54bSShreyansh Jain ether_addr_copy(&fman_intf->mac_addr, ð_dev->data->mac_addrs[0]); 80737f9b54bSShreyansh Jain 80837f9b54bSShreyansh Jain RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n", 80937f9b54bSShreyansh Jain dpaa_device->name, 81037f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[0], 81137f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[1], 81237f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[2], 81337f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[3], 81437f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[4], 81537f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[5]); 81637f9b54bSShreyansh Jain 81737f9b54bSShreyansh Jain /* Disable RX mode */ 81837f9b54bSShreyansh Jain fman_if_discard_rx_errors(fman_intf); 81937f9b54bSShreyansh Jain fman_if_disable_rx(fman_intf); 82037f9b54bSShreyansh Jain /* Disable promiscuous mode */ 82137f9b54bSShreyansh Jain fman_if_promiscuous_disable(fman_intf); 82237f9b54bSShreyansh Jain /* Disable multicast */ 82337f9b54bSShreyansh Jain fman_if_reset_mcast_filter_table(fman_intf); 82437f9b54bSShreyansh Jain /* Reset interface statistics */ 82537f9b54bSShreyansh Jain fman_if_stats_reset(fman_intf); 826ff9e112dSShreyansh Jain 827ff9e112dSShreyansh Jain return 0; 828ff9e112dSShreyansh Jain } 829ff9e112dSShreyansh Jain 830ff9e112dSShreyansh Jain static int 831ff9e112dSShreyansh Jain dpaa_dev_uninit(struct rte_eth_dev *dev) 832ff9e112dSShreyansh Jain { 833ff9e112dSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 834ff9e112dSShreyansh Jain 835ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 836ff9e112dSShreyansh Jain 837ff9e112dSShreyansh Jain if (rte_eal_process_type() != RTE_PROC_PRIMARY) 838ff9e112dSShreyansh Jain return -EPERM; 839ff9e112dSShreyansh Jain 840ff9e112dSShreyansh Jain if (!dpaa_intf) { 841ff9e112dSShreyansh Jain DPAA_PMD_WARN("Already closed or not started"); 842ff9e112dSShreyansh Jain return -1; 843ff9e112dSShreyansh Jain } 844ff9e112dSShreyansh Jain 845ff9e112dSShreyansh Jain dpaa_eth_dev_close(dev); 846ff9e112dSShreyansh Jain 84737f9b54bSShreyansh Jain /* release configuration memory */ 84837f9b54bSShreyansh Jain if (dpaa_intf->fc_conf) 84937f9b54bSShreyansh Jain rte_free(dpaa_intf->fc_conf); 85037f9b54bSShreyansh Jain 85137f9b54bSShreyansh Jain rte_free(dpaa_intf->rx_queues); 85237f9b54bSShreyansh Jain dpaa_intf->rx_queues = NULL; 85337f9b54bSShreyansh Jain 85437f9b54bSShreyansh Jain rte_free(dpaa_intf->tx_queues); 85537f9b54bSShreyansh Jain dpaa_intf->tx_queues = NULL; 85637f9b54bSShreyansh Jain 85737f9b54bSShreyansh Jain /* free memory for storing MAC addresses */ 85837f9b54bSShreyansh Jain rte_free(dev->data->mac_addrs); 85937f9b54bSShreyansh Jain dev->data->mac_addrs = NULL; 86037f9b54bSShreyansh Jain 861ff9e112dSShreyansh Jain dev->dev_ops = NULL; 862ff9e112dSShreyansh Jain dev->rx_pkt_burst = NULL; 863ff9e112dSShreyansh Jain dev->tx_pkt_burst = NULL; 864ff9e112dSShreyansh Jain 865ff9e112dSShreyansh Jain return 0; 866ff9e112dSShreyansh Jain } 867ff9e112dSShreyansh Jain 868ff9e112dSShreyansh Jain static int 869ff9e112dSShreyansh Jain rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, 870ff9e112dSShreyansh Jain struct rte_dpaa_device *dpaa_dev) 871ff9e112dSShreyansh Jain { 872ff9e112dSShreyansh Jain int diag; 873ff9e112dSShreyansh Jain int ret; 874ff9e112dSShreyansh Jain struct rte_eth_dev *eth_dev; 875ff9e112dSShreyansh Jain 876ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 877ff9e112dSShreyansh Jain 878ff9e112dSShreyansh Jain /* In case of secondary process, the device is already configured 879ff9e112dSShreyansh Jain * and no further action is required, except portal initialization 880ff9e112dSShreyansh Jain * and verifying secondary attachment to port name. 881ff9e112dSShreyansh Jain */ 882ff9e112dSShreyansh Jain if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 883ff9e112dSShreyansh Jain eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name); 884ff9e112dSShreyansh Jain if (!eth_dev) 885ff9e112dSShreyansh Jain return -ENOMEM; 886ff9e112dSShreyansh Jain return 0; 887ff9e112dSShreyansh Jain } 888ff9e112dSShreyansh Jain 889ff9e112dSShreyansh Jain if (!is_global_init) { 890ff9e112dSShreyansh Jain /* One time load of Qman/Bman drivers */ 891ff9e112dSShreyansh Jain ret = qman_global_init(); 892ff9e112dSShreyansh Jain if (ret) { 893ff9e112dSShreyansh Jain DPAA_PMD_ERR("QMAN initialization failed: %d", 894ff9e112dSShreyansh Jain ret); 895ff9e112dSShreyansh Jain return ret; 896ff9e112dSShreyansh Jain } 897ff9e112dSShreyansh Jain ret = bman_global_init(); 898ff9e112dSShreyansh Jain if (ret) { 899ff9e112dSShreyansh Jain DPAA_PMD_ERR("BMAN initialization failed: %d", 900ff9e112dSShreyansh Jain ret); 901ff9e112dSShreyansh Jain return ret; 902ff9e112dSShreyansh Jain } 903ff9e112dSShreyansh Jain 904ff9e112dSShreyansh Jain is_global_init = 1; 905ff9e112dSShreyansh Jain } 906ff9e112dSShreyansh Jain 907ff9e112dSShreyansh Jain ret = rte_dpaa_portal_init((void *)1); 908ff9e112dSShreyansh Jain if (ret) { 909ff9e112dSShreyansh Jain DPAA_PMD_ERR("Unable to initialize portal"); 910ff9e112dSShreyansh Jain return ret; 911ff9e112dSShreyansh Jain } 912ff9e112dSShreyansh Jain 913ff9e112dSShreyansh Jain eth_dev = rte_eth_dev_allocate(dpaa_dev->name); 914ff9e112dSShreyansh Jain if (eth_dev == NULL) 915ff9e112dSShreyansh Jain return -ENOMEM; 916ff9e112dSShreyansh Jain 917ff9e112dSShreyansh Jain eth_dev->data->dev_private = rte_zmalloc( 918ff9e112dSShreyansh Jain "ethdev private structure", 919ff9e112dSShreyansh Jain sizeof(struct dpaa_if), 920ff9e112dSShreyansh Jain RTE_CACHE_LINE_SIZE); 921ff9e112dSShreyansh Jain if (!eth_dev->data->dev_private) { 922ff9e112dSShreyansh Jain DPAA_PMD_ERR("Cannot allocate memzone for port data"); 923ff9e112dSShreyansh Jain rte_eth_dev_release_port(eth_dev); 924ff9e112dSShreyansh Jain return -ENOMEM; 925ff9e112dSShreyansh Jain } 926ff9e112dSShreyansh Jain 927ff9e112dSShreyansh Jain eth_dev->device = &dpaa_dev->device; 928ff9e112dSShreyansh Jain eth_dev->device->driver = &dpaa_drv->driver; 929ff9e112dSShreyansh Jain dpaa_dev->eth_dev = eth_dev; 930ff9e112dSShreyansh Jain 931ff9e112dSShreyansh Jain /* Invoke PMD device initialization function */ 932ff9e112dSShreyansh Jain diag = dpaa_dev_init(eth_dev); 933ff9e112dSShreyansh Jain if (diag == 0) 934ff9e112dSShreyansh Jain return 0; 935ff9e112dSShreyansh Jain 936ff9e112dSShreyansh Jain if (rte_eal_process_type() == RTE_PROC_PRIMARY) 937ff9e112dSShreyansh Jain rte_free(eth_dev->data->dev_private); 938ff9e112dSShreyansh Jain 939ff9e112dSShreyansh Jain rte_eth_dev_release_port(eth_dev); 940ff9e112dSShreyansh Jain return diag; 941ff9e112dSShreyansh Jain } 942ff9e112dSShreyansh Jain 943ff9e112dSShreyansh Jain static int 944ff9e112dSShreyansh Jain rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev) 945ff9e112dSShreyansh Jain { 946ff9e112dSShreyansh Jain struct rte_eth_dev *eth_dev; 947ff9e112dSShreyansh Jain 948ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 949ff9e112dSShreyansh Jain 950ff9e112dSShreyansh Jain eth_dev = dpaa_dev->eth_dev; 951ff9e112dSShreyansh Jain dpaa_dev_uninit(eth_dev); 952ff9e112dSShreyansh Jain 953ff9e112dSShreyansh Jain if (rte_eal_process_type() == RTE_PROC_PRIMARY) 954ff9e112dSShreyansh Jain rte_free(eth_dev->data->dev_private); 955ff9e112dSShreyansh Jain 956ff9e112dSShreyansh Jain rte_eth_dev_release_port(eth_dev); 957ff9e112dSShreyansh Jain 958ff9e112dSShreyansh Jain return 0; 959ff9e112dSShreyansh Jain } 960ff9e112dSShreyansh Jain 961ff9e112dSShreyansh Jain static struct rte_dpaa_driver rte_dpaa_pmd = { 962ff9e112dSShreyansh Jain .drv_type = FSL_DPAA_ETH, 963ff9e112dSShreyansh Jain .probe = rte_dpaa_probe, 964ff9e112dSShreyansh Jain .remove = rte_dpaa_remove, 965ff9e112dSShreyansh Jain }; 966ff9e112dSShreyansh Jain 967ff9e112dSShreyansh Jain RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd); 968