1ff9e112dSShreyansh Jain /*- 2ff9e112dSShreyansh Jain * BSD LICENSE 3ff9e112dSShreyansh Jain * 4ff9e112dSShreyansh Jain * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 5ff9e112dSShreyansh Jain * Copyright 2017 NXP. 6ff9e112dSShreyansh Jain * 7ff9e112dSShreyansh Jain * Redistribution and use in source and binary forms, with or without 8ff9e112dSShreyansh Jain * modification, are permitted provided that the following conditions 9ff9e112dSShreyansh Jain * are met: 10ff9e112dSShreyansh Jain * 11ff9e112dSShreyansh Jain * * Redistributions of source code must retain the above copyright 12ff9e112dSShreyansh Jain * notice, this list of conditions and the following disclaimer. 13ff9e112dSShreyansh Jain * * Redistributions in binary form must reproduce the above copyright 14ff9e112dSShreyansh Jain * notice, this list of conditions and the following disclaimer in 15ff9e112dSShreyansh Jain * the documentation and/or other materials provided with the 16ff9e112dSShreyansh Jain * distribution. 17ff9e112dSShreyansh Jain * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18ff9e112dSShreyansh Jain * contributors may be used to endorse or promote products derived 19ff9e112dSShreyansh Jain * from this software without specific prior written permission. 20ff9e112dSShreyansh Jain * 21ff9e112dSShreyansh Jain * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22ff9e112dSShreyansh Jain * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23ff9e112dSShreyansh Jain * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24ff9e112dSShreyansh Jain * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25ff9e112dSShreyansh Jain * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26ff9e112dSShreyansh Jain * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27ff9e112dSShreyansh Jain * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28ff9e112dSShreyansh Jain * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29ff9e112dSShreyansh Jain * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30ff9e112dSShreyansh Jain * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31ff9e112dSShreyansh Jain * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32ff9e112dSShreyansh Jain */ 33ff9e112dSShreyansh Jain /* System headers */ 34ff9e112dSShreyansh Jain #include <stdio.h> 35ff9e112dSShreyansh Jain #include <inttypes.h> 36ff9e112dSShreyansh Jain #include <unistd.h> 37ff9e112dSShreyansh Jain #include <limits.h> 38ff9e112dSShreyansh Jain #include <sched.h> 39ff9e112dSShreyansh Jain #include <signal.h> 40ff9e112dSShreyansh Jain #include <pthread.h> 41ff9e112dSShreyansh Jain #include <sys/types.h> 42ff9e112dSShreyansh Jain #include <sys/syscall.h> 43ff9e112dSShreyansh Jain 44ff9e112dSShreyansh Jain #include <rte_config.h> 45ff9e112dSShreyansh Jain #include <rte_byteorder.h> 46ff9e112dSShreyansh Jain #include <rte_common.h> 47ff9e112dSShreyansh Jain #include <rte_interrupts.h> 48ff9e112dSShreyansh Jain #include <rte_log.h> 49ff9e112dSShreyansh Jain #include <rte_debug.h> 50ff9e112dSShreyansh Jain #include <rte_pci.h> 51ff9e112dSShreyansh Jain #include <rte_atomic.h> 52ff9e112dSShreyansh Jain #include <rte_branch_prediction.h> 53ff9e112dSShreyansh Jain #include <rte_memory.h> 54ff9e112dSShreyansh Jain #include <rte_memzone.h> 55ff9e112dSShreyansh Jain #include <rte_tailq.h> 56ff9e112dSShreyansh Jain #include <rte_eal.h> 57ff9e112dSShreyansh Jain #include <rte_alarm.h> 58ff9e112dSShreyansh Jain #include <rte_ether.h> 59ff9e112dSShreyansh Jain #include <rte_ethdev.h> 60ff9e112dSShreyansh Jain #include <rte_malloc.h> 61ff9e112dSShreyansh Jain #include <rte_ring.h> 62ff9e112dSShreyansh Jain 63ff9e112dSShreyansh Jain #include <rte_dpaa_bus.h> 64ff9e112dSShreyansh Jain #include <rte_dpaa_logs.h> 6537f9b54bSShreyansh Jain #include <dpaa_mempool.h> 66ff9e112dSShreyansh Jain 67ff9e112dSShreyansh Jain #include <dpaa_ethdev.h> 6837f9b54bSShreyansh Jain #include <dpaa_rxtx.h> 6937f9b54bSShreyansh Jain 7037f9b54bSShreyansh Jain #include <fsl_usd.h> 7137f9b54bSShreyansh Jain #include <fsl_qman.h> 7237f9b54bSShreyansh Jain #include <fsl_bman.h> 7337f9b54bSShreyansh Jain #include <fsl_fman.h> 74ff9e112dSShreyansh Jain 75ff9e112dSShreyansh Jain /* Keep track of whether QMAN and BMAN have been globally initialized */ 76ff9e112dSShreyansh Jain static int is_global_init; 77ff9e112dSShreyansh Jain 78ff9e112dSShreyansh Jain static int 790cbec027SShreyansh Jain dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 800cbec027SShreyansh Jain { 810cbec027SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 820cbec027SShreyansh Jain 830cbec027SShreyansh Jain PMD_INIT_FUNC_TRACE(); 840cbec027SShreyansh Jain 850cbec027SShreyansh Jain if (mtu < ETHER_MIN_MTU) 860cbec027SShreyansh Jain return -EINVAL; 870cbec027SShreyansh Jain if (mtu > ETHER_MAX_LEN) 8825f85419SShreyansh Jain dev->data->dev_conf.rxmode.jumbo_frame = 1; 8925f85419SShreyansh Jain else 900cbec027SShreyansh Jain dev->data->dev_conf.rxmode.jumbo_frame = 0; 9125f85419SShreyansh Jain 920cbec027SShreyansh Jain dev->data->dev_conf.rxmode.max_rx_pkt_len = mtu; 930cbec027SShreyansh Jain 940cbec027SShreyansh Jain fman_if_set_maxfrm(dpaa_intf->fif, mtu); 950cbec027SShreyansh Jain 960cbec027SShreyansh Jain return 0; 970cbec027SShreyansh Jain } 980cbec027SShreyansh Jain 990cbec027SShreyansh Jain static int 100ff9e112dSShreyansh Jain dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused) 101ff9e112dSShreyansh Jain { 102ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 103ff9e112dSShreyansh Jain 10425f85419SShreyansh Jain if (dev->data->dev_conf.rxmode.jumbo_frame == 1) { 10525f85419SShreyansh Jain if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= 10625f85419SShreyansh Jain DPAA_MAX_RX_PKT_LEN) 10725f85419SShreyansh Jain return dpaa_mtu_set(dev, 10825f85419SShreyansh Jain dev->data->dev_conf.rxmode.max_rx_pkt_len); 10925f85419SShreyansh Jain else 11025f85419SShreyansh Jain return -1; 11125f85419SShreyansh Jain } 112ff9e112dSShreyansh Jain return 0; 113ff9e112dSShreyansh Jain } 114ff9e112dSShreyansh Jain 115a7bdc3bdSShreyansh Jain static const uint32_t * 116a7bdc3bdSShreyansh Jain dpaa_supported_ptypes_get(struct rte_eth_dev *dev) 117a7bdc3bdSShreyansh Jain { 118a7bdc3bdSShreyansh Jain static const uint32_t ptypes[] = { 119a7bdc3bdSShreyansh Jain /*todo -= add more types */ 120a7bdc3bdSShreyansh Jain RTE_PTYPE_L2_ETHER, 121a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV4, 122a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV4_EXT, 123a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV6, 124a7bdc3bdSShreyansh Jain RTE_PTYPE_L3_IPV6_EXT, 125a7bdc3bdSShreyansh Jain RTE_PTYPE_L4_TCP, 126a7bdc3bdSShreyansh Jain RTE_PTYPE_L4_UDP, 127a7bdc3bdSShreyansh Jain RTE_PTYPE_L4_SCTP 128a7bdc3bdSShreyansh Jain }; 129a7bdc3bdSShreyansh Jain 130a7bdc3bdSShreyansh Jain PMD_INIT_FUNC_TRACE(); 131a7bdc3bdSShreyansh Jain 132a7bdc3bdSShreyansh Jain if (dev->rx_pkt_burst == dpaa_eth_queue_rx) 133a7bdc3bdSShreyansh Jain return ptypes; 134a7bdc3bdSShreyansh Jain return NULL; 135a7bdc3bdSShreyansh Jain } 136a7bdc3bdSShreyansh Jain 137ff9e112dSShreyansh Jain static int dpaa_eth_dev_start(struct rte_eth_dev *dev) 138ff9e112dSShreyansh Jain { 13937f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 14037f9b54bSShreyansh Jain 141ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 142ff9e112dSShreyansh Jain 143ff9e112dSShreyansh Jain /* Change tx callback to the real one */ 14437f9b54bSShreyansh Jain dev->tx_pkt_burst = dpaa_eth_queue_tx; 14537f9b54bSShreyansh Jain fman_if_enable_rx(dpaa_intf->fif); 146ff9e112dSShreyansh Jain 147ff9e112dSShreyansh Jain return 0; 148ff9e112dSShreyansh Jain } 149ff9e112dSShreyansh Jain 150ff9e112dSShreyansh Jain static void dpaa_eth_dev_stop(struct rte_eth_dev *dev) 151ff9e112dSShreyansh Jain { 15237f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 15337f9b54bSShreyansh Jain 15437f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 15537f9b54bSShreyansh Jain 15637f9b54bSShreyansh Jain fman_if_disable_rx(dpaa_intf->fif); 15737f9b54bSShreyansh Jain dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 158ff9e112dSShreyansh Jain } 159ff9e112dSShreyansh Jain 16037f9b54bSShreyansh Jain static void dpaa_eth_dev_close(struct rte_eth_dev *dev) 16137f9b54bSShreyansh Jain { 16237f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 16337f9b54bSShreyansh Jain 16437f9b54bSShreyansh Jain dpaa_eth_dev_stop(dev); 16537f9b54bSShreyansh Jain } 16637f9b54bSShreyansh Jain 167799db456SShreyansh Jain static void dpaa_eth_dev_info(struct rte_eth_dev *dev, 168799db456SShreyansh Jain struct rte_eth_dev_info *dev_info) 169799db456SShreyansh Jain { 170799db456SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 171799db456SShreyansh Jain 172799db456SShreyansh Jain PMD_INIT_FUNC_TRACE(); 173799db456SShreyansh Jain 174799db456SShreyansh Jain dev_info->max_rx_queues = dpaa_intf->nb_rx_queues; 175799db456SShreyansh Jain dev_info->max_tx_queues = dpaa_intf->nb_tx_queues; 176799db456SShreyansh Jain dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE; 177799db456SShreyansh Jain dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN; 178799db456SShreyansh Jain dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER; 179799db456SShreyansh Jain dev_info->max_hash_mac_addrs = 0; 180799db456SShreyansh Jain dev_info->max_vfs = 0; 181799db456SShreyansh Jain dev_info->max_vmdq_pools = ETH_16_POOLS; 1824fa5e0bbSShreyansh Jain dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL; 183799db456SShreyansh Jain dev_info->speed_capa = (ETH_LINK_SPEED_1G | 184799db456SShreyansh Jain ETH_LINK_SPEED_10G); 185a7bdc3bdSShreyansh Jain dev_info->rx_offload_capa = 186a7bdc3bdSShreyansh Jain (DEV_RX_OFFLOAD_IPV4_CKSUM | 187a7bdc3bdSShreyansh Jain DEV_RX_OFFLOAD_UDP_CKSUM | 188a7bdc3bdSShreyansh Jain DEV_RX_OFFLOAD_TCP_CKSUM); 1895a8cf1beSShreyansh Jain dev_info->tx_offload_capa = 1905a8cf1beSShreyansh Jain (DEV_TX_OFFLOAD_IPV4_CKSUM | 1915a8cf1beSShreyansh Jain DEV_TX_OFFLOAD_UDP_CKSUM | 1925a8cf1beSShreyansh Jain DEV_TX_OFFLOAD_TCP_CKSUM); 193799db456SShreyansh Jain } 194799db456SShreyansh Jain 195e124a69fSShreyansh Jain static int dpaa_eth_link_update(struct rte_eth_dev *dev, 196e124a69fSShreyansh Jain int wait_to_complete __rte_unused) 197e124a69fSShreyansh Jain { 198e124a69fSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 199e124a69fSShreyansh Jain struct rte_eth_link *link = &dev->data->dev_link; 200e124a69fSShreyansh Jain 201e124a69fSShreyansh Jain PMD_INIT_FUNC_TRACE(); 202e124a69fSShreyansh Jain 203e124a69fSShreyansh Jain if (dpaa_intf->fif->mac_type == fman_mac_1g) 204e124a69fSShreyansh Jain link->link_speed = 1000; 205e124a69fSShreyansh Jain else if (dpaa_intf->fif->mac_type == fman_mac_10g) 206e124a69fSShreyansh Jain link->link_speed = 10000; 207e124a69fSShreyansh Jain else 208e124a69fSShreyansh Jain DPAA_PMD_ERR("invalid link_speed: %s, %d", 209e124a69fSShreyansh Jain dpaa_intf->name, dpaa_intf->fif->mac_type); 210e124a69fSShreyansh Jain 211e124a69fSShreyansh Jain link->link_status = dpaa_intf->valid; 212e124a69fSShreyansh Jain link->link_duplex = ETH_LINK_FULL_DUPLEX; 213e124a69fSShreyansh Jain link->link_autoneg = ETH_LINK_AUTONEG; 214e124a69fSShreyansh Jain return 0; 215e124a69fSShreyansh Jain } 216e124a69fSShreyansh Jain 217e1ad3a05SShreyansh Jain static void dpaa_eth_stats_get(struct rte_eth_dev *dev, 218e1ad3a05SShreyansh Jain struct rte_eth_stats *stats) 219e1ad3a05SShreyansh Jain { 220e1ad3a05SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 221e1ad3a05SShreyansh Jain 222e1ad3a05SShreyansh Jain PMD_INIT_FUNC_TRACE(); 223e1ad3a05SShreyansh Jain 224e1ad3a05SShreyansh Jain fman_if_stats_get(dpaa_intf->fif, stats); 225e1ad3a05SShreyansh Jain } 226e1ad3a05SShreyansh Jain 227e1ad3a05SShreyansh Jain static void dpaa_eth_stats_reset(struct rte_eth_dev *dev) 228e1ad3a05SShreyansh Jain { 229e1ad3a05SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 230e1ad3a05SShreyansh Jain 231e1ad3a05SShreyansh Jain PMD_INIT_FUNC_TRACE(); 232e1ad3a05SShreyansh Jain 233e1ad3a05SShreyansh Jain fman_if_stats_reset(dpaa_intf->fif); 234e1ad3a05SShreyansh Jain } 23595ef603dSShreyansh Jain 23695ef603dSShreyansh Jain static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev) 23795ef603dSShreyansh Jain { 23895ef603dSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 23995ef603dSShreyansh Jain 24095ef603dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 24195ef603dSShreyansh Jain 24295ef603dSShreyansh Jain fman_if_promiscuous_enable(dpaa_intf->fif); 24395ef603dSShreyansh Jain } 24495ef603dSShreyansh Jain 24595ef603dSShreyansh Jain static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev) 24695ef603dSShreyansh Jain { 24795ef603dSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 24895ef603dSShreyansh Jain 24995ef603dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 25095ef603dSShreyansh Jain 25195ef603dSShreyansh Jain fman_if_promiscuous_disable(dpaa_intf->fif); 25295ef603dSShreyansh Jain } 25395ef603dSShreyansh Jain 25444dd70a3SShreyansh Jain static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev) 25544dd70a3SShreyansh Jain { 25644dd70a3SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 25744dd70a3SShreyansh Jain 25844dd70a3SShreyansh Jain PMD_INIT_FUNC_TRACE(); 25944dd70a3SShreyansh Jain 26044dd70a3SShreyansh Jain fman_if_set_mcast_filter_table(dpaa_intf->fif); 26144dd70a3SShreyansh Jain } 26244dd70a3SShreyansh Jain 26344dd70a3SShreyansh Jain static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev) 26444dd70a3SShreyansh Jain { 26544dd70a3SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 26644dd70a3SShreyansh Jain 26744dd70a3SShreyansh Jain PMD_INIT_FUNC_TRACE(); 26844dd70a3SShreyansh Jain 26944dd70a3SShreyansh Jain fman_if_reset_mcast_filter_table(dpaa_intf->fif); 27044dd70a3SShreyansh Jain } 27144dd70a3SShreyansh Jain 27237f9b54bSShreyansh Jain static 27337f9b54bSShreyansh Jain int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 27437f9b54bSShreyansh Jain uint16_t nb_desc __rte_unused, 27537f9b54bSShreyansh Jain unsigned int socket_id __rte_unused, 27637f9b54bSShreyansh Jain const struct rte_eth_rxconf *rx_conf __rte_unused, 27737f9b54bSShreyansh Jain struct rte_mempool *mp) 27837f9b54bSShreyansh Jain { 27937f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 28037f9b54bSShreyansh Jain 28137f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 28237f9b54bSShreyansh Jain 28337f9b54bSShreyansh Jain DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx); 28437f9b54bSShreyansh Jain 28537f9b54bSShreyansh Jain if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) { 28637f9b54bSShreyansh Jain struct fman_if_ic_params icp; 28737f9b54bSShreyansh Jain uint32_t fd_offset; 28837f9b54bSShreyansh Jain uint32_t bp_size; 28937f9b54bSShreyansh Jain 29037f9b54bSShreyansh Jain if (!mp->pool_data) { 29137f9b54bSShreyansh Jain DPAA_PMD_ERR("Not an offloaded buffer pool!"); 29237f9b54bSShreyansh Jain return -1; 29337f9b54bSShreyansh Jain } 29437f9b54bSShreyansh Jain dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 29537f9b54bSShreyansh Jain 29637f9b54bSShreyansh Jain memset(&icp, 0, sizeof(icp)); 29737f9b54bSShreyansh Jain /* set ICEOF for to the default value , which is 0*/ 29837f9b54bSShreyansh Jain icp.iciof = DEFAULT_ICIOF; 29937f9b54bSShreyansh Jain icp.iceof = DEFAULT_RX_ICEOF; 30037f9b54bSShreyansh Jain icp.icsz = DEFAULT_ICSZ; 30137f9b54bSShreyansh Jain fman_if_set_ic_params(dpaa_intf->fif, &icp); 30237f9b54bSShreyansh Jain 30337f9b54bSShreyansh Jain fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE; 30437f9b54bSShreyansh Jain fman_if_set_fdoff(dpaa_intf->fif, fd_offset); 30537f9b54bSShreyansh Jain 30637f9b54bSShreyansh Jain /* Buffer pool size should be equal to Dataroom Size*/ 30737f9b54bSShreyansh Jain bp_size = rte_pktmbuf_data_room_size(mp); 30837f9b54bSShreyansh Jain fman_if_set_bp(dpaa_intf->fif, mp->size, 30937f9b54bSShreyansh Jain dpaa_intf->bp_info->bpid, bp_size); 31037f9b54bSShreyansh Jain dpaa_intf->valid = 1; 31137f9b54bSShreyansh Jain DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d", 31237f9b54bSShreyansh Jain dpaa_intf->name, fd_offset, 31337f9b54bSShreyansh Jain fman_if_get_fdoff(dpaa_intf->fif)); 31437f9b54bSShreyansh Jain } 31537f9b54bSShreyansh Jain dev->data->rx_queues[queue_idx] = &dpaa_intf->rx_queues[queue_idx]; 31637f9b54bSShreyansh Jain 31737f9b54bSShreyansh Jain return 0; 31837f9b54bSShreyansh Jain } 31937f9b54bSShreyansh Jain 32037f9b54bSShreyansh Jain static 32137f9b54bSShreyansh Jain void dpaa_eth_rx_queue_release(void *rxq __rte_unused) 32237f9b54bSShreyansh Jain { 32337f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 32437f9b54bSShreyansh Jain } 32537f9b54bSShreyansh Jain 32637f9b54bSShreyansh Jain static 32737f9b54bSShreyansh Jain int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 32837f9b54bSShreyansh Jain uint16_t nb_desc __rte_unused, 32937f9b54bSShreyansh Jain unsigned int socket_id __rte_unused, 33037f9b54bSShreyansh Jain const struct rte_eth_txconf *tx_conf __rte_unused) 33137f9b54bSShreyansh Jain { 33237f9b54bSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 33337f9b54bSShreyansh Jain 33437f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 33537f9b54bSShreyansh Jain 33637f9b54bSShreyansh Jain DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx); 33737f9b54bSShreyansh Jain dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx]; 33837f9b54bSShreyansh Jain return 0; 33937f9b54bSShreyansh Jain } 34037f9b54bSShreyansh Jain 34137f9b54bSShreyansh Jain static void dpaa_eth_tx_queue_release(void *txq __rte_unused) 342ff9e112dSShreyansh Jain { 343ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 344ff9e112dSShreyansh Jain } 345ff9e112dSShreyansh Jain 346e124a69fSShreyansh Jain static int dpaa_link_down(struct rte_eth_dev *dev) 347e124a69fSShreyansh Jain { 348e124a69fSShreyansh Jain PMD_INIT_FUNC_TRACE(); 349e124a69fSShreyansh Jain 350e124a69fSShreyansh Jain dpaa_eth_dev_stop(dev); 351e124a69fSShreyansh Jain return 0; 352e124a69fSShreyansh Jain } 353e124a69fSShreyansh Jain 354e124a69fSShreyansh Jain static int dpaa_link_up(struct rte_eth_dev *dev) 355e124a69fSShreyansh Jain { 356e124a69fSShreyansh Jain PMD_INIT_FUNC_TRACE(); 357e124a69fSShreyansh Jain 358e124a69fSShreyansh Jain dpaa_eth_dev_start(dev); 359e124a69fSShreyansh Jain return 0; 360e124a69fSShreyansh Jain } 361e124a69fSShreyansh Jain 362fe6c6032SShreyansh Jain static int 36312a4678aSShreyansh Jain dpaa_flow_ctrl_set(struct rte_eth_dev *dev, 36412a4678aSShreyansh Jain struct rte_eth_fc_conf *fc_conf) 36512a4678aSShreyansh Jain { 36612a4678aSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 36712a4678aSShreyansh Jain struct rte_eth_fc_conf *net_fc; 36812a4678aSShreyansh Jain 36912a4678aSShreyansh Jain PMD_INIT_FUNC_TRACE(); 37012a4678aSShreyansh Jain 37112a4678aSShreyansh Jain if (!(dpaa_intf->fc_conf)) { 37212a4678aSShreyansh Jain dpaa_intf->fc_conf = rte_zmalloc(NULL, 37312a4678aSShreyansh Jain sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 37412a4678aSShreyansh Jain if (!dpaa_intf->fc_conf) { 37512a4678aSShreyansh Jain DPAA_PMD_ERR("unable to save flow control info"); 37612a4678aSShreyansh Jain return -ENOMEM; 37712a4678aSShreyansh Jain } 37812a4678aSShreyansh Jain } 37912a4678aSShreyansh Jain net_fc = dpaa_intf->fc_conf; 38012a4678aSShreyansh Jain 38112a4678aSShreyansh Jain if (fc_conf->high_water < fc_conf->low_water) { 38212a4678aSShreyansh Jain DPAA_PMD_ERR("Incorrect Flow Control Configuration"); 38312a4678aSShreyansh Jain return -EINVAL; 38412a4678aSShreyansh Jain } 38512a4678aSShreyansh Jain 38612a4678aSShreyansh Jain if (fc_conf->mode == RTE_FC_NONE) { 38712a4678aSShreyansh Jain return 0; 38812a4678aSShreyansh Jain } else if (fc_conf->mode == RTE_FC_TX_PAUSE || 38912a4678aSShreyansh Jain fc_conf->mode == RTE_FC_FULL) { 39012a4678aSShreyansh Jain fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water, 39112a4678aSShreyansh Jain fc_conf->low_water, 39212a4678aSShreyansh Jain dpaa_intf->bp_info->bpid); 39312a4678aSShreyansh Jain if (fc_conf->pause_time) 39412a4678aSShreyansh Jain fman_if_set_fc_quanta(dpaa_intf->fif, 39512a4678aSShreyansh Jain fc_conf->pause_time); 39612a4678aSShreyansh Jain } 39712a4678aSShreyansh Jain 39812a4678aSShreyansh Jain /* Save the information in dpaa device */ 39912a4678aSShreyansh Jain net_fc->pause_time = fc_conf->pause_time; 40012a4678aSShreyansh Jain net_fc->high_water = fc_conf->high_water; 40112a4678aSShreyansh Jain net_fc->low_water = fc_conf->low_water; 40212a4678aSShreyansh Jain net_fc->send_xon = fc_conf->send_xon; 40312a4678aSShreyansh Jain net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd; 40412a4678aSShreyansh Jain net_fc->mode = fc_conf->mode; 40512a4678aSShreyansh Jain net_fc->autoneg = fc_conf->autoneg; 40612a4678aSShreyansh Jain 40712a4678aSShreyansh Jain return 0; 40812a4678aSShreyansh Jain } 40912a4678aSShreyansh Jain 41012a4678aSShreyansh Jain static int 41112a4678aSShreyansh Jain dpaa_flow_ctrl_get(struct rte_eth_dev *dev, 41212a4678aSShreyansh Jain struct rte_eth_fc_conf *fc_conf) 41312a4678aSShreyansh Jain { 41412a4678aSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 41512a4678aSShreyansh Jain struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf; 41612a4678aSShreyansh Jain int ret; 41712a4678aSShreyansh Jain 41812a4678aSShreyansh Jain PMD_INIT_FUNC_TRACE(); 41912a4678aSShreyansh Jain 42012a4678aSShreyansh Jain if (net_fc) { 42112a4678aSShreyansh Jain fc_conf->pause_time = net_fc->pause_time; 42212a4678aSShreyansh Jain fc_conf->high_water = net_fc->high_water; 42312a4678aSShreyansh Jain fc_conf->low_water = net_fc->low_water; 42412a4678aSShreyansh Jain fc_conf->send_xon = net_fc->send_xon; 42512a4678aSShreyansh Jain fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd; 42612a4678aSShreyansh Jain fc_conf->mode = net_fc->mode; 42712a4678aSShreyansh Jain fc_conf->autoneg = net_fc->autoneg; 42812a4678aSShreyansh Jain return 0; 42912a4678aSShreyansh Jain } 43012a4678aSShreyansh Jain ret = fman_if_get_fc_threshold(dpaa_intf->fif); 43112a4678aSShreyansh Jain if (ret) { 43212a4678aSShreyansh Jain fc_conf->mode = RTE_FC_TX_PAUSE; 43312a4678aSShreyansh Jain fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 43412a4678aSShreyansh Jain } else { 43512a4678aSShreyansh Jain fc_conf->mode = RTE_FC_NONE; 43612a4678aSShreyansh Jain } 43712a4678aSShreyansh Jain 43812a4678aSShreyansh Jain return 0; 43912a4678aSShreyansh Jain } 44012a4678aSShreyansh Jain 44112a4678aSShreyansh Jain static int 442fe6c6032SShreyansh Jain dpaa_dev_add_mac_addr(struct rte_eth_dev *dev, 443fe6c6032SShreyansh Jain struct ether_addr *addr, 444fe6c6032SShreyansh Jain uint32_t index, 445fe6c6032SShreyansh Jain __rte_unused uint32_t pool) 446fe6c6032SShreyansh Jain { 447fe6c6032SShreyansh Jain int ret; 448fe6c6032SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 449fe6c6032SShreyansh Jain 450fe6c6032SShreyansh Jain PMD_INIT_FUNC_TRACE(); 451fe6c6032SShreyansh Jain 452fe6c6032SShreyansh Jain ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index); 453fe6c6032SShreyansh Jain 454fe6c6032SShreyansh Jain if (ret) 455fe6c6032SShreyansh Jain RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:" 456fe6c6032SShreyansh Jain " err = %d", ret); 457fe6c6032SShreyansh Jain return 0; 458fe6c6032SShreyansh Jain } 459fe6c6032SShreyansh Jain 460fe6c6032SShreyansh Jain static void 461fe6c6032SShreyansh Jain dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev, 462fe6c6032SShreyansh Jain uint32_t index) 463fe6c6032SShreyansh Jain { 464fe6c6032SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 465fe6c6032SShreyansh Jain 466fe6c6032SShreyansh Jain PMD_INIT_FUNC_TRACE(); 467fe6c6032SShreyansh Jain 468fe6c6032SShreyansh Jain fman_if_clear_mac_addr(dpaa_intf->fif, index); 469fe6c6032SShreyansh Jain } 470fe6c6032SShreyansh Jain 471fe6c6032SShreyansh Jain static void 472fe6c6032SShreyansh Jain dpaa_dev_set_mac_addr(struct rte_eth_dev *dev, 473fe6c6032SShreyansh Jain struct ether_addr *addr) 474fe6c6032SShreyansh Jain { 475fe6c6032SShreyansh Jain int ret; 476fe6c6032SShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 477fe6c6032SShreyansh Jain 478fe6c6032SShreyansh Jain PMD_INIT_FUNC_TRACE(); 479fe6c6032SShreyansh Jain 480fe6c6032SShreyansh Jain ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0); 481fe6c6032SShreyansh Jain if (ret) 482fe6c6032SShreyansh Jain RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret); 483fe6c6032SShreyansh Jain } 484fe6c6032SShreyansh Jain 485ff9e112dSShreyansh Jain static struct eth_dev_ops dpaa_devops = { 486ff9e112dSShreyansh Jain .dev_configure = dpaa_eth_dev_configure, 487ff9e112dSShreyansh Jain .dev_start = dpaa_eth_dev_start, 488ff9e112dSShreyansh Jain .dev_stop = dpaa_eth_dev_stop, 489ff9e112dSShreyansh Jain .dev_close = dpaa_eth_dev_close, 490799db456SShreyansh Jain .dev_infos_get = dpaa_eth_dev_info, 491a7bdc3bdSShreyansh Jain .dev_supported_ptypes_get = dpaa_supported_ptypes_get, 49237f9b54bSShreyansh Jain 49337f9b54bSShreyansh Jain .rx_queue_setup = dpaa_eth_rx_queue_setup, 49437f9b54bSShreyansh Jain .tx_queue_setup = dpaa_eth_tx_queue_setup, 49537f9b54bSShreyansh Jain .rx_queue_release = dpaa_eth_rx_queue_release, 49637f9b54bSShreyansh Jain .tx_queue_release = dpaa_eth_tx_queue_release, 497e124a69fSShreyansh Jain 49812a4678aSShreyansh Jain .flow_ctrl_get = dpaa_flow_ctrl_get, 49912a4678aSShreyansh Jain .flow_ctrl_set = dpaa_flow_ctrl_set, 50012a4678aSShreyansh Jain 501e124a69fSShreyansh Jain .link_update = dpaa_eth_link_update, 502e1ad3a05SShreyansh Jain .stats_get = dpaa_eth_stats_get, 503e1ad3a05SShreyansh Jain .stats_reset = dpaa_eth_stats_reset, 50495ef603dSShreyansh Jain .promiscuous_enable = dpaa_eth_promiscuous_enable, 50595ef603dSShreyansh Jain .promiscuous_disable = dpaa_eth_promiscuous_disable, 50644dd70a3SShreyansh Jain .allmulticast_enable = dpaa_eth_multicast_enable, 50744dd70a3SShreyansh Jain .allmulticast_disable = dpaa_eth_multicast_disable, 5080cbec027SShreyansh Jain .mtu_set = dpaa_mtu_set, 509e124a69fSShreyansh Jain .dev_set_link_down = dpaa_link_down, 510e124a69fSShreyansh Jain .dev_set_link_up = dpaa_link_up, 511fe6c6032SShreyansh Jain .mac_addr_add = dpaa_dev_add_mac_addr, 512fe6c6032SShreyansh Jain .mac_addr_remove = dpaa_dev_remove_mac_addr, 513fe6c6032SShreyansh Jain .mac_addr_set = dpaa_dev_set_mac_addr, 514fe6c6032SShreyansh Jain 515ff9e112dSShreyansh Jain }; 516ff9e112dSShreyansh Jain 51712a4678aSShreyansh Jain static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf) 51812a4678aSShreyansh Jain { 51912a4678aSShreyansh Jain struct rte_eth_fc_conf *fc_conf; 52012a4678aSShreyansh Jain int ret; 52112a4678aSShreyansh Jain 52212a4678aSShreyansh Jain PMD_INIT_FUNC_TRACE(); 52312a4678aSShreyansh Jain 52412a4678aSShreyansh Jain if (!(dpaa_intf->fc_conf)) { 52512a4678aSShreyansh Jain dpaa_intf->fc_conf = rte_zmalloc(NULL, 52612a4678aSShreyansh Jain sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 52712a4678aSShreyansh Jain if (!dpaa_intf->fc_conf) { 52812a4678aSShreyansh Jain DPAA_PMD_ERR("unable to save flow control info"); 52912a4678aSShreyansh Jain return -ENOMEM; 53012a4678aSShreyansh Jain } 53112a4678aSShreyansh Jain } 53212a4678aSShreyansh Jain fc_conf = dpaa_intf->fc_conf; 53312a4678aSShreyansh Jain ret = fman_if_get_fc_threshold(dpaa_intf->fif); 53412a4678aSShreyansh Jain if (ret) { 53512a4678aSShreyansh Jain fc_conf->mode = RTE_FC_TX_PAUSE; 53612a4678aSShreyansh Jain fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 53712a4678aSShreyansh Jain } else { 53812a4678aSShreyansh Jain fc_conf->mode = RTE_FC_NONE; 53912a4678aSShreyansh Jain } 54012a4678aSShreyansh Jain 54112a4678aSShreyansh Jain return 0; 54212a4678aSShreyansh Jain } 54312a4678aSShreyansh Jain 54437f9b54bSShreyansh Jain /* Initialise an Rx FQ */ 54537f9b54bSShreyansh Jain static int dpaa_rx_queue_init(struct qman_fq *fq, 54637f9b54bSShreyansh Jain uint32_t fqid) 54737f9b54bSShreyansh Jain { 54837f9b54bSShreyansh Jain struct qm_mcc_initfq opts; 54937f9b54bSShreyansh Jain int ret; 55037f9b54bSShreyansh Jain 55137f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 55237f9b54bSShreyansh Jain 55337f9b54bSShreyansh Jain ret = qman_reserve_fqid(fqid); 55437f9b54bSShreyansh Jain if (ret) { 55537f9b54bSShreyansh Jain DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d", 55637f9b54bSShreyansh Jain fqid, ret); 55737f9b54bSShreyansh Jain return -EINVAL; 55837f9b54bSShreyansh Jain } 55937f9b54bSShreyansh Jain 56037f9b54bSShreyansh Jain DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid); 56137f9b54bSShreyansh Jain ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 56237f9b54bSShreyansh Jain if (ret) { 56337f9b54bSShreyansh Jain DPAA_PMD_ERR("create rx fqid %d failed with ret: %d", 56437f9b54bSShreyansh Jain fqid, ret); 56537f9b54bSShreyansh Jain return ret; 56637f9b54bSShreyansh Jain } 56737f9b54bSShreyansh Jain 56837f9b54bSShreyansh Jain opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 56937f9b54bSShreyansh Jain QM_INITFQ_WE_CONTEXTA; 57037f9b54bSShreyansh Jain 57137f9b54bSShreyansh Jain opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY; 57237f9b54bSShreyansh Jain opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING | 57337f9b54bSShreyansh Jain QM_FQCTRL_PREFERINCACHE; 57437f9b54bSShreyansh Jain opts.fqd.context_a.stashing.exclusive = 0; 57537f9b54bSShreyansh Jain opts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH; 57637f9b54bSShreyansh Jain opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH; 57737f9b54bSShreyansh Jain opts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH; 57837f9b54bSShreyansh Jain 57937f9b54bSShreyansh Jain /*Enable tail drop */ 58037f9b54bSShreyansh Jain opts.we_mask = opts.we_mask | QM_INITFQ_WE_TDTHRESH; 58137f9b54bSShreyansh Jain opts.fqd.fq_ctrl = opts.fqd.fq_ctrl | QM_FQCTRL_TDE; 58237f9b54bSShreyansh Jain qm_fqd_taildrop_set(&opts.fqd.td, CONG_THRESHOLD_RX_Q, 1); 58337f9b54bSShreyansh Jain 58437f9b54bSShreyansh Jain ret = qman_init_fq(fq, 0, &opts); 58537f9b54bSShreyansh Jain if (ret) 58637f9b54bSShreyansh Jain DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret); 58737f9b54bSShreyansh Jain return ret; 58837f9b54bSShreyansh Jain } 58937f9b54bSShreyansh Jain 59037f9b54bSShreyansh Jain /* Initialise a Tx FQ */ 59137f9b54bSShreyansh Jain static int dpaa_tx_queue_init(struct qman_fq *fq, 59237f9b54bSShreyansh Jain struct fman_if *fman_intf) 59337f9b54bSShreyansh Jain { 59437f9b54bSShreyansh Jain struct qm_mcc_initfq opts; 59537f9b54bSShreyansh Jain int ret; 59637f9b54bSShreyansh Jain 59737f9b54bSShreyansh Jain PMD_INIT_FUNC_TRACE(); 59837f9b54bSShreyansh Jain 59937f9b54bSShreyansh Jain ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID | 60037f9b54bSShreyansh Jain QMAN_FQ_FLAG_TO_DCPORTAL, fq); 60137f9b54bSShreyansh Jain if (ret) { 60237f9b54bSShreyansh Jain DPAA_PMD_ERR("create tx fq failed with ret: %d", ret); 60337f9b54bSShreyansh Jain return ret; 60437f9b54bSShreyansh Jain } 60537f9b54bSShreyansh Jain opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 60637f9b54bSShreyansh Jain QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA; 60737f9b54bSShreyansh Jain opts.fqd.dest.channel = fman_intf->tx_channel_id; 60837f9b54bSShreyansh Jain opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY; 60937f9b54bSShreyansh Jain opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE; 61037f9b54bSShreyansh Jain opts.fqd.context_b = 0; 61137f9b54bSShreyansh Jain /* no tx-confirmation */ 61237f9b54bSShreyansh Jain opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi; 61337f9b54bSShreyansh Jain opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo; 61437f9b54bSShreyansh Jain DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid); 61537f9b54bSShreyansh Jain ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts); 61637f9b54bSShreyansh Jain if (ret) 61737f9b54bSShreyansh Jain DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret); 61837f9b54bSShreyansh Jain return ret; 61937f9b54bSShreyansh Jain } 62037f9b54bSShreyansh Jain 621*05ba55bcSShreyansh Jain #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 622*05ba55bcSShreyansh Jain /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */ 623*05ba55bcSShreyansh Jain static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid) 624*05ba55bcSShreyansh Jain { 625*05ba55bcSShreyansh Jain struct qm_mcc_initfq opts; 626*05ba55bcSShreyansh Jain int ret; 627*05ba55bcSShreyansh Jain 628*05ba55bcSShreyansh Jain PMD_INIT_FUNC_TRACE(); 629*05ba55bcSShreyansh Jain 630*05ba55bcSShreyansh Jain ret = qman_reserve_fqid(fqid); 631*05ba55bcSShreyansh Jain if (ret) { 632*05ba55bcSShreyansh Jain DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d", 633*05ba55bcSShreyansh Jain fqid, ret); 634*05ba55bcSShreyansh Jain return -EINVAL; 635*05ba55bcSShreyansh Jain } 636*05ba55bcSShreyansh Jain /* "map" this Rx FQ to one of the interfaces Tx FQID */ 637*05ba55bcSShreyansh Jain DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid); 638*05ba55bcSShreyansh Jain ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 639*05ba55bcSShreyansh Jain if (ret) { 640*05ba55bcSShreyansh Jain DPAA_PMD_ERR("create debug fqid %d failed with ret: %d", 641*05ba55bcSShreyansh Jain fqid, ret); 642*05ba55bcSShreyansh Jain return ret; 643*05ba55bcSShreyansh Jain } 644*05ba55bcSShreyansh Jain opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL; 645*05ba55bcSShreyansh Jain opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY; 646*05ba55bcSShreyansh Jain ret = qman_init_fq(fq, 0, &opts); 647*05ba55bcSShreyansh Jain if (ret) 648*05ba55bcSShreyansh Jain DPAA_PMD_ERR("init debug fqid %d failed with ret: %d", 649*05ba55bcSShreyansh Jain fqid, ret); 650*05ba55bcSShreyansh Jain return ret; 651*05ba55bcSShreyansh Jain } 652*05ba55bcSShreyansh Jain #endif 653*05ba55bcSShreyansh Jain 654ff9e112dSShreyansh Jain /* Initialise a network interface */ 655ff9e112dSShreyansh Jain static int 656ff9e112dSShreyansh Jain dpaa_dev_init(struct rte_eth_dev *eth_dev) 657ff9e112dSShreyansh Jain { 65837f9b54bSShreyansh Jain int num_cores, num_rx_fqs, fqid; 65937f9b54bSShreyansh Jain int loop, ret = 0; 660ff9e112dSShreyansh Jain int dev_id; 661ff9e112dSShreyansh Jain struct rte_dpaa_device *dpaa_device; 662ff9e112dSShreyansh Jain struct dpaa_if *dpaa_intf; 66337f9b54bSShreyansh Jain struct fm_eth_port_cfg *cfg; 66437f9b54bSShreyansh Jain struct fman_if *fman_intf; 66537f9b54bSShreyansh Jain struct fman_if_bpool *bp, *tmp_bp; 666ff9e112dSShreyansh Jain 667ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 668ff9e112dSShreyansh Jain 669ff9e112dSShreyansh Jain /* For secondary processes, the primary has done all the work */ 670ff9e112dSShreyansh Jain if (rte_eal_process_type() != RTE_PROC_PRIMARY) 671ff9e112dSShreyansh Jain return 0; 672ff9e112dSShreyansh Jain 673ff9e112dSShreyansh Jain dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device); 674ff9e112dSShreyansh Jain dev_id = dpaa_device->id.dev_id; 675ff9e112dSShreyansh Jain dpaa_intf = eth_dev->data->dev_private; 67637f9b54bSShreyansh Jain cfg = &dpaa_netcfg->port_cfg[dev_id]; 67737f9b54bSShreyansh Jain fman_intf = cfg->fman_if; 678ff9e112dSShreyansh Jain 679ff9e112dSShreyansh Jain dpaa_intf->name = dpaa_device->name; 680ff9e112dSShreyansh Jain 68137f9b54bSShreyansh Jain /* save fman_if & cfg in the interface struture */ 68237f9b54bSShreyansh Jain dpaa_intf->fif = fman_intf; 683ff9e112dSShreyansh Jain dpaa_intf->ifid = dev_id; 68437f9b54bSShreyansh Jain dpaa_intf->cfg = cfg; 685ff9e112dSShreyansh Jain 68637f9b54bSShreyansh Jain /* Initialize Rx FQ's */ 68737f9b54bSShreyansh Jain if (getenv("DPAA_NUM_RX_QUEUES")) 68837f9b54bSShreyansh Jain num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES")); 68937f9b54bSShreyansh Jain else 69037f9b54bSShreyansh Jain num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES; 69137f9b54bSShreyansh Jain 69237f9b54bSShreyansh Jain /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX 69337f9b54bSShreyansh Jain * queues. 69437f9b54bSShreyansh Jain */ 69537f9b54bSShreyansh Jain if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) { 69637f9b54bSShreyansh Jain DPAA_PMD_ERR("Invalid number of RX queues\n"); 69737f9b54bSShreyansh Jain return -EINVAL; 69837f9b54bSShreyansh Jain } 69937f9b54bSShreyansh Jain 70037f9b54bSShreyansh Jain dpaa_intf->rx_queues = rte_zmalloc(NULL, 70137f9b54bSShreyansh Jain sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE); 70237f9b54bSShreyansh Jain for (loop = 0; loop < num_rx_fqs; loop++) { 70337f9b54bSShreyansh Jain fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid * 70437f9b54bSShreyansh Jain DPAA_PCD_FQID_MULTIPLIER + loop; 70537f9b54bSShreyansh Jain ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop], fqid); 70637f9b54bSShreyansh Jain if (ret) 70737f9b54bSShreyansh Jain return ret; 70837f9b54bSShreyansh Jain dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf; 70937f9b54bSShreyansh Jain } 71037f9b54bSShreyansh Jain dpaa_intf->nb_rx_queues = num_rx_fqs; 71137f9b54bSShreyansh Jain 71237f9b54bSShreyansh Jain /* Initialise Tx FQs. Have as many Tx FQ's as number of cores */ 71337f9b54bSShreyansh Jain num_cores = rte_lcore_count(); 71437f9b54bSShreyansh Jain dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) * 71537f9b54bSShreyansh Jain num_cores, MAX_CACHELINE); 71637f9b54bSShreyansh Jain if (!dpaa_intf->tx_queues) 71737f9b54bSShreyansh Jain return -ENOMEM; 71837f9b54bSShreyansh Jain 71937f9b54bSShreyansh Jain for (loop = 0; loop < num_cores; loop++) { 72037f9b54bSShreyansh Jain ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop], 72137f9b54bSShreyansh Jain fman_intf); 72237f9b54bSShreyansh Jain if (ret) 72337f9b54bSShreyansh Jain return ret; 72437f9b54bSShreyansh Jain dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf; 72537f9b54bSShreyansh Jain } 72637f9b54bSShreyansh Jain dpaa_intf->nb_tx_queues = num_cores; 72737f9b54bSShreyansh Jain 728*05ba55bcSShreyansh Jain #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 729*05ba55bcSShreyansh Jain dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 730*05ba55bcSShreyansh Jain DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err); 731*05ba55bcSShreyansh Jain dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf; 732*05ba55bcSShreyansh Jain dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 733*05ba55bcSShreyansh Jain DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err); 734*05ba55bcSShreyansh Jain dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf; 735*05ba55bcSShreyansh Jain #endif 736*05ba55bcSShreyansh Jain 73737f9b54bSShreyansh Jain DPAA_PMD_DEBUG("All frame queues created"); 73837f9b54bSShreyansh Jain 73912a4678aSShreyansh Jain /* Get the initial configuration for flow control */ 74012a4678aSShreyansh Jain dpaa_fc_set_default(dpaa_intf); 74112a4678aSShreyansh Jain 74237f9b54bSShreyansh Jain /* reset bpool list, initialize bpool dynamically */ 74337f9b54bSShreyansh Jain list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) { 74437f9b54bSShreyansh Jain list_del(&bp->node); 74537f9b54bSShreyansh Jain rte_free(bp); 74637f9b54bSShreyansh Jain } 74737f9b54bSShreyansh Jain 74837f9b54bSShreyansh Jain /* Populate ethdev structure */ 749ff9e112dSShreyansh Jain eth_dev->dev_ops = &dpaa_devops; 75037f9b54bSShreyansh Jain eth_dev->rx_pkt_burst = dpaa_eth_queue_rx; 75137f9b54bSShreyansh Jain eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 75237f9b54bSShreyansh Jain 75337f9b54bSShreyansh Jain /* Allocate memory for storing MAC addresses */ 75437f9b54bSShreyansh Jain eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", 75537f9b54bSShreyansh Jain ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0); 75637f9b54bSShreyansh Jain if (eth_dev->data->mac_addrs == NULL) { 75737f9b54bSShreyansh Jain DPAA_PMD_ERR("Failed to allocate %d bytes needed to " 75837f9b54bSShreyansh Jain "store MAC addresses", 75937f9b54bSShreyansh Jain ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER); 76037f9b54bSShreyansh Jain rte_free(dpaa_intf->rx_queues); 76137f9b54bSShreyansh Jain rte_free(dpaa_intf->tx_queues); 76237f9b54bSShreyansh Jain dpaa_intf->rx_queues = NULL; 76337f9b54bSShreyansh Jain dpaa_intf->tx_queues = NULL; 76437f9b54bSShreyansh Jain dpaa_intf->nb_rx_queues = 0; 76537f9b54bSShreyansh Jain dpaa_intf->nb_tx_queues = 0; 76637f9b54bSShreyansh Jain return -ENOMEM; 76737f9b54bSShreyansh Jain } 76837f9b54bSShreyansh Jain 76937f9b54bSShreyansh Jain /* copy the primary mac address */ 77037f9b54bSShreyansh Jain ether_addr_copy(&fman_intf->mac_addr, ð_dev->data->mac_addrs[0]); 77137f9b54bSShreyansh Jain 77237f9b54bSShreyansh Jain RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n", 77337f9b54bSShreyansh Jain dpaa_device->name, 77437f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[0], 77537f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[1], 77637f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[2], 77737f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[3], 77837f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[4], 77937f9b54bSShreyansh Jain fman_intf->mac_addr.addr_bytes[5]); 78037f9b54bSShreyansh Jain 78137f9b54bSShreyansh Jain /* Disable RX mode */ 78237f9b54bSShreyansh Jain fman_if_discard_rx_errors(fman_intf); 78337f9b54bSShreyansh Jain fman_if_disable_rx(fman_intf); 78437f9b54bSShreyansh Jain /* Disable promiscuous mode */ 78537f9b54bSShreyansh Jain fman_if_promiscuous_disable(fman_intf); 78637f9b54bSShreyansh Jain /* Disable multicast */ 78737f9b54bSShreyansh Jain fman_if_reset_mcast_filter_table(fman_intf); 78837f9b54bSShreyansh Jain /* Reset interface statistics */ 78937f9b54bSShreyansh Jain fman_if_stats_reset(fman_intf); 790ff9e112dSShreyansh Jain 791ff9e112dSShreyansh Jain return 0; 792ff9e112dSShreyansh Jain } 793ff9e112dSShreyansh Jain 794ff9e112dSShreyansh Jain static int 795ff9e112dSShreyansh Jain dpaa_dev_uninit(struct rte_eth_dev *dev) 796ff9e112dSShreyansh Jain { 797ff9e112dSShreyansh Jain struct dpaa_if *dpaa_intf = dev->data->dev_private; 798ff9e112dSShreyansh Jain 799ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 800ff9e112dSShreyansh Jain 801ff9e112dSShreyansh Jain if (rte_eal_process_type() != RTE_PROC_PRIMARY) 802ff9e112dSShreyansh Jain return -EPERM; 803ff9e112dSShreyansh Jain 804ff9e112dSShreyansh Jain if (!dpaa_intf) { 805ff9e112dSShreyansh Jain DPAA_PMD_WARN("Already closed or not started"); 806ff9e112dSShreyansh Jain return -1; 807ff9e112dSShreyansh Jain } 808ff9e112dSShreyansh Jain 809ff9e112dSShreyansh Jain dpaa_eth_dev_close(dev); 810ff9e112dSShreyansh Jain 81137f9b54bSShreyansh Jain /* release configuration memory */ 81237f9b54bSShreyansh Jain if (dpaa_intf->fc_conf) 81337f9b54bSShreyansh Jain rte_free(dpaa_intf->fc_conf); 81437f9b54bSShreyansh Jain 81537f9b54bSShreyansh Jain rte_free(dpaa_intf->rx_queues); 81637f9b54bSShreyansh Jain dpaa_intf->rx_queues = NULL; 81737f9b54bSShreyansh Jain 81837f9b54bSShreyansh Jain rte_free(dpaa_intf->tx_queues); 81937f9b54bSShreyansh Jain dpaa_intf->tx_queues = NULL; 82037f9b54bSShreyansh Jain 82137f9b54bSShreyansh Jain /* free memory for storing MAC addresses */ 82237f9b54bSShreyansh Jain rte_free(dev->data->mac_addrs); 82337f9b54bSShreyansh Jain dev->data->mac_addrs = NULL; 82437f9b54bSShreyansh Jain 825ff9e112dSShreyansh Jain dev->dev_ops = NULL; 826ff9e112dSShreyansh Jain dev->rx_pkt_burst = NULL; 827ff9e112dSShreyansh Jain dev->tx_pkt_burst = NULL; 828ff9e112dSShreyansh Jain 829ff9e112dSShreyansh Jain return 0; 830ff9e112dSShreyansh Jain } 831ff9e112dSShreyansh Jain 832ff9e112dSShreyansh Jain static int 833ff9e112dSShreyansh Jain rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, 834ff9e112dSShreyansh Jain struct rte_dpaa_device *dpaa_dev) 835ff9e112dSShreyansh Jain { 836ff9e112dSShreyansh Jain int diag; 837ff9e112dSShreyansh Jain int ret; 838ff9e112dSShreyansh Jain struct rte_eth_dev *eth_dev; 839ff9e112dSShreyansh Jain 840ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 841ff9e112dSShreyansh Jain 842ff9e112dSShreyansh Jain /* In case of secondary process, the device is already configured 843ff9e112dSShreyansh Jain * and no further action is required, except portal initialization 844ff9e112dSShreyansh Jain * and verifying secondary attachment to port name. 845ff9e112dSShreyansh Jain */ 846ff9e112dSShreyansh Jain if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 847ff9e112dSShreyansh Jain eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name); 848ff9e112dSShreyansh Jain if (!eth_dev) 849ff9e112dSShreyansh Jain return -ENOMEM; 850ff9e112dSShreyansh Jain return 0; 851ff9e112dSShreyansh Jain } 852ff9e112dSShreyansh Jain 853ff9e112dSShreyansh Jain if (!is_global_init) { 854ff9e112dSShreyansh Jain /* One time load of Qman/Bman drivers */ 855ff9e112dSShreyansh Jain ret = qman_global_init(); 856ff9e112dSShreyansh Jain if (ret) { 857ff9e112dSShreyansh Jain DPAA_PMD_ERR("QMAN initialization failed: %d", 858ff9e112dSShreyansh Jain ret); 859ff9e112dSShreyansh Jain return ret; 860ff9e112dSShreyansh Jain } 861ff9e112dSShreyansh Jain ret = bman_global_init(); 862ff9e112dSShreyansh Jain if (ret) { 863ff9e112dSShreyansh Jain DPAA_PMD_ERR("BMAN initialization failed: %d", 864ff9e112dSShreyansh Jain ret); 865ff9e112dSShreyansh Jain return ret; 866ff9e112dSShreyansh Jain } 867ff9e112dSShreyansh Jain 868ff9e112dSShreyansh Jain is_global_init = 1; 869ff9e112dSShreyansh Jain } 870ff9e112dSShreyansh Jain 871ff9e112dSShreyansh Jain ret = rte_dpaa_portal_init((void *)1); 872ff9e112dSShreyansh Jain if (ret) { 873ff9e112dSShreyansh Jain DPAA_PMD_ERR("Unable to initialize portal"); 874ff9e112dSShreyansh Jain return ret; 875ff9e112dSShreyansh Jain } 876ff9e112dSShreyansh Jain 877ff9e112dSShreyansh Jain eth_dev = rte_eth_dev_allocate(dpaa_dev->name); 878ff9e112dSShreyansh Jain if (eth_dev == NULL) 879ff9e112dSShreyansh Jain return -ENOMEM; 880ff9e112dSShreyansh Jain 881ff9e112dSShreyansh Jain eth_dev->data->dev_private = rte_zmalloc( 882ff9e112dSShreyansh Jain "ethdev private structure", 883ff9e112dSShreyansh Jain sizeof(struct dpaa_if), 884ff9e112dSShreyansh Jain RTE_CACHE_LINE_SIZE); 885ff9e112dSShreyansh Jain if (!eth_dev->data->dev_private) { 886ff9e112dSShreyansh Jain DPAA_PMD_ERR("Cannot allocate memzone for port data"); 887ff9e112dSShreyansh Jain rte_eth_dev_release_port(eth_dev); 888ff9e112dSShreyansh Jain return -ENOMEM; 889ff9e112dSShreyansh Jain } 890ff9e112dSShreyansh Jain 891ff9e112dSShreyansh Jain eth_dev->device = &dpaa_dev->device; 892ff9e112dSShreyansh Jain eth_dev->device->driver = &dpaa_drv->driver; 893ff9e112dSShreyansh Jain dpaa_dev->eth_dev = eth_dev; 894ff9e112dSShreyansh Jain 895ff9e112dSShreyansh Jain /* Invoke PMD device initialization function */ 896ff9e112dSShreyansh Jain diag = dpaa_dev_init(eth_dev); 897ff9e112dSShreyansh Jain if (diag == 0) 898ff9e112dSShreyansh Jain return 0; 899ff9e112dSShreyansh Jain 900ff9e112dSShreyansh Jain if (rte_eal_process_type() == RTE_PROC_PRIMARY) 901ff9e112dSShreyansh Jain rte_free(eth_dev->data->dev_private); 902ff9e112dSShreyansh Jain 903ff9e112dSShreyansh Jain rte_eth_dev_release_port(eth_dev); 904ff9e112dSShreyansh Jain return diag; 905ff9e112dSShreyansh Jain } 906ff9e112dSShreyansh Jain 907ff9e112dSShreyansh Jain static int 908ff9e112dSShreyansh Jain rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev) 909ff9e112dSShreyansh Jain { 910ff9e112dSShreyansh Jain struct rte_eth_dev *eth_dev; 911ff9e112dSShreyansh Jain 912ff9e112dSShreyansh Jain PMD_INIT_FUNC_TRACE(); 913ff9e112dSShreyansh Jain 914ff9e112dSShreyansh Jain eth_dev = dpaa_dev->eth_dev; 915ff9e112dSShreyansh Jain dpaa_dev_uninit(eth_dev); 916ff9e112dSShreyansh Jain 917ff9e112dSShreyansh Jain if (rte_eal_process_type() == RTE_PROC_PRIMARY) 918ff9e112dSShreyansh Jain rte_free(eth_dev->data->dev_private); 919ff9e112dSShreyansh Jain 920ff9e112dSShreyansh Jain rte_eth_dev_release_port(eth_dev); 921ff9e112dSShreyansh Jain 922ff9e112dSShreyansh Jain return 0; 923ff9e112dSShreyansh Jain } 924ff9e112dSShreyansh Jain 925ff9e112dSShreyansh Jain static struct rte_dpaa_driver rte_dpaa_pmd = { 926ff9e112dSShreyansh Jain .drv_type = FSL_DPAA_ETH, 927ff9e112dSShreyansh Jain .probe = rte_dpaa_probe, 928ff9e112dSShreyansh Jain .remove = rte_dpaa_remove, 929ff9e112dSShreyansh Jain }; 930ff9e112dSShreyansh Jain 931ff9e112dSShreyansh Jain RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd); 932