xref: /dpdk/drivers/net/dpaa/dpaa_ethdev.c (revision e498f3b51f3882c43eccb3d5b59b1d045b51c39a)
1d81734caSHemant Agrawal /* SPDX-License-Identifier: BSD-3-Clause
2ff9e112dSShreyansh Jain  *
3ff9e112dSShreyansh Jain  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
458e0420fSVanshika Shukla  *   Copyright 2017-2020,2022-2024 NXP
5ff9e112dSShreyansh Jain  *
6ff9e112dSShreyansh Jain  */
7ff9e112dSShreyansh Jain /* System headers */
8ff9e112dSShreyansh Jain #include <stdio.h>
9ff9e112dSShreyansh Jain #include <inttypes.h>
10ff9e112dSShreyansh Jain #include <unistd.h>
11ff9e112dSShreyansh Jain #include <limits.h>
12ff9e112dSShreyansh Jain #include <sched.h>
13ff9e112dSShreyansh Jain #include <signal.h>
14ff9e112dSShreyansh Jain #include <pthread.h>
15ff9e112dSShreyansh Jain #include <sys/types.h>
16ff9e112dSShreyansh Jain #include <sys/syscall.h>
17ee0fa755SRohit Raj #include <sys/ioctl.h>
18ff9e112dSShreyansh Jain 
196723c0fcSBruce Richardson #include <rte_string_fns.h>
20ff9e112dSShreyansh Jain #include <rte_byteorder.h>
21ff9e112dSShreyansh Jain #include <rte_common.h>
22ff9e112dSShreyansh Jain #include <rte_interrupts.h>
23ff9e112dSShreyansh Jain #include <rte_log.h>
24ff9e112dSShreyansh Jain #include <rte_debug.h>
25ff9e112dSShreyansh Jain #include <rte_pci.h>
26ff9e112dSShreyansh Jain #include <rte_atomic.h>
27ff9e112dSShreyansh Jain #include <rte_branch_prediction.h>
28ff9e112dSShreyansh Jain #include <rte_memory.h>
29ff9e112dSShreyansh Jain #include <rte_tailq.h>
30ff9e112dSShreyansh Jain #include <rte_eal.h>
31ff9e112dSShreyansh Jain #include <rte_alarm.h>
32ff9e112dSShreyansh Jain #include <rte_ether.h>
3358e0420fSVanshika Shukla #include <rte_kvargs.h>
34df96fd0dSBruce Richardson #include <ethdev_driver.h>
35ff9e112dSShreyansh Jain #include <rte_malloc.h>
36ff9e112dSShreyansh Jain #include <rte_ring.h>
37ff9e112dSShreyansh Jain 
38a2f1da7dSDavid Marchand #include <bus_dpaa_driver.h>
39ff9e112dSShreyansh Jain #include <rte_dpaa_logs.h>
4037f9b54bSShreyansh Jain #include <dpaa_mempool.h>
41ff9e112dSShreyansh Jain 
42ff9e112dSShreyansh Jain #include <dpaa_ethdev.h>
4337f9b54bSShreyansh Jain #include <dpaa_rxtx.h>
444defbc8cSSachin Saxena #include <dpaa_flow.h>
458c3495f5SHemant Agrawal #include <rte_pmd_dpaa.h>
4637f9b54bSShreyansh Jain 
4737f9b54bSShreyansh Jain #include <fsl_usd.h>
4837f9b54bSShreyansh Jain #include <fsl_qman.h>
4937f9b54bSShreyansh Jain #include <fsl_bman.h>
5037f9b54bSShreyansh Jain #include <fsl_fman.h>
512aa10990SRohit Raj #include <process.h>
5277393f56SSachin Saxena #include <fmlib/fm_ext.h>
53ff9e112dSShreyansh Jain 
5458e0420fSVanshika Shukla #define DRIVER_IEEE1588        "drv_ieee1588"
5589b9bb08SRohit Raj #define CHECK_INTERVAL         100  /* 100ms */
5689b9bb08SRohit Raj #define MAX_REPEAT_TIME        90   /* 9s (90 * 100ms) in total */
5789b9bb08SRohit Raj 
58c5836218SSunil Kumar Kori /* Supported Rx offloads */
59c5836218SSunil Kumar Kori static uint64_t dev_rx_offloads_sup =
60295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_SCATTER;
61c5836218SSunil Kumar Kori 
62c5836218SSunil Kumar Kori /* Rx offloads which cannot be disabled */
63c5836218SSunil Kumar Kori static uint64_t dev_rx_offloads_nodis =
64295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
65295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
66295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
67295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
68295968d1SFerruh Yigit 		RTE_ETH_RX_OFFLOAD_RSS_HASH;
69c5836218SSunil Kumar Kori 
70c5836218SSunil Kumar Kori /* Supported Tx offloads */
711cd8d4ceSHemant Agrawal static uint64_t dev_tx_offloads_sup =
72295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_MT_LOCKFREE |
73295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
74c5836218SSunil Kumar Kori 
75c5836218SSunil Kumar Kori /* Tx offloads which cannot be disabled */
76c5836218SSunil Kumar Kori static uint64_t dev_tx_offloads_nodis =
77295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
78295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
79295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
80295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_SCTP_CKSUM |
81295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
82295968d1SFerruh Yigit 		RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
83c5836218SSunil Kumar Kori 
84ff9e112dSShreyansh Jain /* Keep track of whether QMAN and BMAN have been globally initialized */
85ff9e112dSShreyansh Jain static int is_global_init;
864defbc8cSSachin Saxena static int fmc_q = 1;	/* Indicates the use of static fmc for distribution */
878d6fc8b6SHemant Agrawal static int default_q;	/* use default queue - FMC is not executed*/
8858e0420fSVanshika Shukla int dpaa_ieee_1588;	/* use to indicate if IEEE 1588 is enabled for the driver */
890b5deefbSShreyansh Jain /* At present we only allow up to 4 push mode queues as default - as each of
900b5deefbSShreyansh Jain  * this queue need dedicated portal and we are short of portals.
910c504f69SHemant Agrawal  */
920b5deefbSShreyansh Jain #define DPAA_MAX_PUSH_MODE_QUEUE       8
930b5deefbSShreyansh Jain #define DPAA_DEFAULT_PUSH_MODE_QUEUE   4
940c504f69SHemant Agrawal 
950b5deefbSShreyansh Jain static int dpaa_push_mode_max_queue = DPAA_DEFAULT_PUSH_MODE_QUEUE;
960c504f69SHemant Agrawal static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
970c504f69SHemant Agrawal 
98ff9e112dSShreyansh Jain 
999124e65dSGagandeep Singh /* Per RX FQ Taildrop in frame count */
10062f53995SHemant Agrawal static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
10162f53995SHemant Agrawal 
1029124e65dSGagandeep Singh /* Per TX FQ Taildrop in frame count, disabled by default */
1039124e65dSGagandeep Singh static unsigned int td_tx_threshold;
1049124e65dSGagandeep Singh 
105b21ed3e2SHemant Agrawal struct rte_dpaa_xstats_name_off {
106b21ed3e2SHemant Agrawal 	char name[RTE_ETH_XSTATS_NAME_SIZE];
107b21ed3e2SHemant Agrawal 	uint32_t offset;
108b21ed3e2SHemant Agrawal };
109b21ed3e2SHemant Agrawal 
110b21ed3e2SHemant Agrawal static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
111b21ed3e2SHemant Agrawal 	{"rx_align_err",
112b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, raln)},
113b21ed3e2SHemant Agrawal 	{"rx_valid_pause",
114b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rxpf)},
115b21ed3e2SHemant Agrawal 	{"rx_fcs_err",
116b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rfcs)},
117b21ed3e2SHemant Agrawal 	{"rx_vlan_frame",
118b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rvlan)},
119b21ed3e2SHemant Agrawal 	{"rx_frame_err",
120b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rerr)},
121b21ed3e2SHemant Agrawal 	{"rx_drop_err",
122b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rdrp)},
123b21ed3e2SHemant Agrawal 	{"rx_undersized",
124b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rund)},
125b21ed3e2SHemant Agrawal 	{"rx_oversize_err",
126b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rovr)},
127b21ed3e2SHemant Agrawal 	{"rx_fragment_pkt",
128b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, rfrg)},
129b21ed3e2SHemant Agrawal 	{"tx_valid_pause",
130b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, txpf)},
131b21ed3e2SHemant Agrawal 	{"tx_fcs_err",
132b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, terr)},
133b21ed3e2SHemant Agrawal 	{"tx_vlan_frame",
134b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, tvlan)},
135b21ed3e2SHemant Agrawal 	{"rx_undersized",
136b21ed3e2SHemant Agrawal 		offsetof(struct dpaa_if_stats, tund)},
137d2536b00SHemant Agrawal 	{"rx_frame_counter",
138d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfrc)},
139d2536b00SHemant Agrawal 	{"rx_bad_frames_count",
140d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfbc)},
141d2536b00SHemant Agrawal 	{"rx_large_frames_count",
142d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rlfc)},
143d2536b00SHemant Agrawal 	{"rx_filter_frames_count",
144d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rffc)},
145d2536b00SHemant Agrawal 	{"rx_frame_discrad_count",
146d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfdc)},
147d2536b00SHemant Agrawal 	{"rx_frame_list_dma_err_count",
148d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rfldec)},
149d2536b00SHemant Agrawal 	{"rx_out_of_buffer_discard ",
150d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rodc)},
151d2536b00SHemant Agrawal 	{"rx_buf_diallocate",
152d2536b00SHemant Agrawal 		offsetof(struct dpaa_if_rx_bmi_stats, fmbm_rbdc)},
153b21ed3e2SHemant Agrawal };
154b21ed3e2SHemant Agrawal 
1558c3495f5SHemant Agrawal static struct rte_dpaa_driver rte_dpaa_pmd;
156533c31ccSGagandeep Singh int dpaa_valid_dev;
157533c31ccSGagandeep Singh struct rte_mempool *dpaa_tx_sg_pool;
1588c3495f5SHemant Agrawal 
159bdad90d1SIvan Ilchenko static int
16016e2c27fSSunil Kumar Kori dpaa_eth_dev_info(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info);
16116e2c27fSSunil Kumar Kori 
1622aa10990SRohit Raj static int dpaa_eth_link_update(struct rte_eth_dev *dev,
1632aa10990SRohit Raj 				int wait_to_complete __rte_unused);
1642aa10990SRohit Raj 
1652aa10990SRohit Raj static void dpaa_interrupt_handler(void *param);
1662aa10990SRohit Raj 
1675e745593SSunil Kumar Kori static inline void
1685e745593SSunil Kumar Kori dpaa_poll_queue_default_config(struct qm_mcc_initfq *opts)
1695e745593SSunil Kumar Kori {
1705e745593SSunil Kumar Kori 	memset(opts, 0, sizeof(struct qm_mcc_initfq));
1715e745593SSunil Kumar Kori 	opts->we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
1725e745593SSunil Kumar Kori 	opts->fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
1735e745593SSunil Kumar Kori 			   QM_FQCTRL_PREFERINCACHE;
1745e745593SSunil Kumar Kori 	opts->fqd.context_a.stashing.exclusive = 0;
1755e745593SSunil Kumar Kori 	if (dpaa_svr_family != SVR_LS1046A_FAMILY)
1765e745593SSunil Kumar Kori 		opts->fqd.context_a.stashing.annotation_cl =
1775e745593SSunil Kumar Kori 						DPAA_IF_RX_ANNOTATION_STASH;
1785e745593SSunil Kumar Kori 	opts->fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
1795e745593SSunil Kumar Kori 	opts->fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
1805e745593SSunil Kumar Kori }
1815e745593SSunil Kumar Kori 
182ff9e112dSShreyansh Jain static int
1830cbec027SShreyansh Jain dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1840cbec027SShreyansh Jain {
18535b2d13fSOlivier Matz 	uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1869658ac3aSAshish Jain 				+ VLAN_TAG_SIZE;
18755576ac2SHemant Agrawal 	uint32_t buffsz = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
188ee0fa755SRohit Raj 	struct fman_if *fif = dev->process_private;
1890cbec027SShreyansh Jain 
1900cbec027SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1910cbec027SShreyansh Jain 
192ee0fa755SRohit Raj 	if (fif->is_shared_mac) {
193ee0fa755SRohit Raj 		DPAA_PMD_ERR("Cannot configure mtu from DPDK in VSP mode.");
194ee0fa755SRohit Raj 		return -ENOTSUP;
195ee0fa755SRohit Raj 	}
196ee0fa755SRohit Raj 
19755576ac2SHemant Agrawal 	/*
19855576ac2SHemant Agrawal 	 * Refuse mtu that requires the support of scattered packets
19955576ac2SHemant Agrawal 	 * when this feature has not been enabled before.
20055576ac2SHemant Agrawal 	 */
20155576ac2SHemant Agrawal 	if (dev->data->min_rx_buf_size &&
20255576ac2SHemant Agrawal 		!dev->data->scattered_rx && frame_size > buffsz) {
20355576ac2SHemant Agrawal 		DPAA_PMD_ERR("SG not enabled, will not fit in one buffer");
20455576ac2SHemant Agrawal 		return -EINVAL;
20555576ac2SHemant Agrawal 	}
20655576ac2SHemant Agrawal 
20755576ac2SHemant Agrawal 	/* check <seg size> * <max_seg>  >= max_frame */
20855576ac2SHemant Agrawal 	if (dev->data->min_rx_buf_size && dev->data->scattered_rx &&
20955576ac2SHemant Agrawal 		(frame_size > buffsz * DPAA_SGT_MAX_ENTRIES)) {
21055576ac2SHemant Agrawal 		DPAA_PMD_ERR("Too big to fit for Max SG list %d",
21155576ac2SHemant Agrawal 				buffsz * DPAA_SGT_MAX_ENTRIES);
21255576ac2SHemant Agrawal 		return -EINVAL;
21355576ac2SHemant Agrawal 	}
21455576ac2SHemant Agrawal 
2156b10d1f7SNipun Gupta 	fman_if_set_maxfrm(dev->process_private, frame_size);
2160cbec027SShreyansh Jain 
2170cbec027SShreyansh Jain 	return 0;
2180cbec027SShreyansh Jain }
2190cbec027SShreyansh Jain 
2200cbec027SShreyansh Jain static int
22116e2c27fSSunil Kumar Kori dpaa_eth_dev_configure(struct rte_eth_dev *dev)
222ff9e112dSShreyansh Jain {
22316e2c27fSSunil Kumar Kori 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
22416e2c27fSSunil Kumar Kori 	uint64_t rx_offloads = eth_conf->rxmode.offloads;
22516e2c27fSSunil Kumar Kori 	uint64_t tx_offloads = eth_conf->txmode.offloads;
226953b6fedSNipun Gupta 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
2272aa10990SRohit Raj 	struct rte_device *rdev = dev->device;
2287a292619SRohit Raj 	struct rte_eth_link *link = &dev->data->dev_link;
2292aa10990SRohit Raj 	struct rte_dpaa_device *dpaa_dev;
2302aa10990SRohit Raj 	struct fman_if *fif = dev->process_private;
2312aa10990SRohit Raj 	struct __fman_if *__fif;
2322aa10990SRohit Raj 	struct rte_intr_handle *intr_handle;
2331bb4a528SFerruh Yigit 	uint32_t max_rx_pktlen;
2347a292619SRohit Raj 	int speed, duplex;
235ee0fa755SRohit Raj 	int ret, rx_status, socket_fd;
236ee0fa755SRohit Raj 	struct ifreq ifr;
2379658ac3aSAshish Jain 
238ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
239ff9e112dSShreyansh Jain 
2402aa10990SRohit Raj 	dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
241d61138d4SHarman Kalra 	intr_handle = dpaa_dev->intr_handle;
2422aa10990SRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
2432aa10990SRohit Raj 
244953b6fedSNipun Gupta 	/* Check if interface is enabled in case of shared MAC */
245953b6fedSNipun Gupta 	if (fif->is_shared_mac) {
246953b6fedSNipun Gupta 		rx_status = fman_if_get_rx_status(fif);
247953b6fedSNipun Gupta 		if (!rx_status) {
248953b6fedSNipun Gupta 			DPAA_PMD_ERR("%s Interface not enabled in kernel!",
249953b6fedSNipun Gupta 				     dpaa_intf->name);
250953b6fedSNipun Gupta 			return -EHOSTDOWN;
251953b6fedSNipun Gupta 		}
252ee0fa755SRohit Raj 
253ee0fa755SRohit Raj 		socket_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_IP);
254ee0fa755SRohit Raj 		if (socket_fd == -1) {
255ee0fa755SRohit Raj 			DPAA_PMD_ERR("Cannot open IF socket");
256ee0fa755SRohit Raj 			return -errno;
257ee0fa755SRohit Raj 		}
258ee0fa755SRohit Raj 		strncpy(ifr.ifr_name, dpaa_intf->name, IFNAMSIZ - 1);
259ee0fa755SRohit Raj 
260ee0fa755SRohit Raj 		if (ioctl(socket_fd, SIOCGIFMTU, &ifr) < 0) {
261ee0fa755SRohit Raj 			DPAA_PMD_ERR("Cannot get interface mtu");
262ee0fa755SRohit Raj 			close(socket_fd);
263ee0fa755SRohit Raj 			return -errno;
264ee0fa755SRohit Raj 		}
265ee0fa755SRohit Raj 
266ee0fa755SRohit Raj 		close(socket_fd);
267ee0fa755SRohit Raj 		DPAA_PMD_INFO("Using kernel configured mtu size(%u)",
268ee0fa755SRohit Raj 			     ifr.ifr_mtu);
269ee0fa755SRohit Raj 
270ee0fa755SRohit Raj 		eth_conf->rxmode.mtu = ifr.ifr_mtu;
271953b6fedSNipun Gupta 	}
272953b6fedSNipun Gupta 
2731cd8d4ceSHemant Agrawal 	/* Rx offloads which are enabled by default */
274c5836218SSunil Kumar Kori 	if (dev_rx_offloads_nodis & ~rx_offloads) {
2751cd8d4ceSHemant Agrawal 		DPAA_PMD_INFO(
2761cd8d4ceSHemant Agrawal 		"Some of rx offloads enabled by default - requested 0x%" PRIx64
2771cd8d4ceSHemant Agrawal 		" fixed are 0x%" PRIx64,
278c5836218SSunil Kumar Kori 		rx_offloads, dev_rx_offloads_nodis);
27916e2c27fSSunil Kumar Kori 	}
28016e2c27fSSunil Kumar Kori 
2811cd8d4ceSHemant Agrawal 	/* Tx offloads which are enabled by default */
282c5836218SSunil Kumar Kori 	if (dev_tx_offloads_nodis & ~tx_offloads) {
2831cd8d4ceSHemant Agrawal 		DPAA_PMD_INFO(
2841cd8d4ceSHemant Agrawal 		"Some of tx offloads enabled by default - requested 0x%" PRIx64
2851cd8d4ceSHemant Agrawal 		" fixed are 0x%" PRIx64,
286c5836218SSunil Kumar Kori 		tx_offloads, dev_tx_offloads_nodis);
28716e2c27fSSunil Kumar Kori 	}
28816e2c27fSSunil Kumar Kori 
2891bb4a528SFerruh Yigit 	max_rx_pktlen = eth_conf->rxmode.mtu + RTE_ETHER_HDR_LEN +
2901bb4a528SFerruh Yigit 			RTE_ETHER_CRC_LEN + VLAN_TAG_SIZE;
2911bb4a528SFerruh Yigit 	if (max_rx_pktlen > DPAA_MAX_RX_PKT_LEN) {
292deeec8efSHemant Agrawal 		DPAA_PMD_INFO("enabling jumbo override conf max len=%d "
293deeec8efSHemant Agrawal 			"supported is %d",
2941bb4a528SFerruh Yigit 			max_rx_pktlen, DPAA_MAX_RX_PKT_LEN);
2951bb4a528SFerruh Yigit 		max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
29625f85419SShreyansh Jain 	}
297deeec8efSHemant Agrawal 
2987e5f49aeSRohit Raj 	if (!fif->is_shared_mac && fif->mac_type != fman_offline_internal &&
2997e5f49aeSRohit Raj 	    fif->mac_type != fman_onic)
3001bb4a528SFerruh Yigit 		fman_if_set_maxfrm(dev->process_private, max_rx_pktlen);
30155576ac2SHemant Agrawal 
302295968d1SFerruh Yigit 	if (rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
30355576ac2SHemant Agrawal 		DPAA_PMD_DEBUG("enabling scatter mode");
3046b10d1f7SNipun Gupta 		fman_if_set_sg(dev->process_private, 1);
30555576ac2SHemant Agrawal 		dev->data->scattered_rx = 1;
30655576ac2SHemant Agrawal 	}
30755576ac2SHemant Agrawal 
308f5fe3eedSJun Yang 	if (!(default_q || fmc_q)) {
309f5fe3eedSJun Yang 		if (dpaa_fm_config(dev,
310f5fe3eedSJun Yang 			eth_conf->rx_adv_conf.rss_conf.rss_hf)) {
311f5fe3eedSJun Yang 			dpaa_write_fm_config_to_file();
3121ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("FM port configuration: Failed");
313f5fe3eedSJun Yang 			return -1;
314f5fe3eedSJun Yang 		}
315f5fe3eedSJun Yang 		dpaa_write_fm_config_to_file();
316f5fe3eedSJun Yang 	}
317f5fe3eedSJun Yang 
318a0edbb8aSRohit Raj 	/* Disable interrupt support on offline port*/
3197e5f49aeSRohit Raj 	if (fif->mac_type == fman_offline_internal ||
3207e5f49aeSRohit Raj 	    fif->mac_type == fman_onic)
321a0edbb8aSRohit Raj 		return 0;
322a0edbb8aSRohit Raj 
3232aa10990SRohit Raj 	/* if the interrupts were configured on this devices*/
324d61138d4SHarman Kalra 	if (intr_handle && rte_intr_fd_get(intr_handle)) {
3252aa10990SRohit Raj 		if (dev->data->dev_conf.intr_conf.lsc != 0)
3262aa10990SRohit Raj 			rte_intr_callback_register(intr_handle,
3272aa10990SRohit Raj 					   dpaa_interrupt_handler,
3282aa10990SRohit Raj 					   (void *)dev);
3292aa10990SRohit Raj 
330d61138d4SHarman Kalra 		ret = dpaa_intr_enable(__fif->node_name,
331d61138d4SHarman Kalra 				       rte_intr_fd_get(intr_handle));
3322aa10990SRohit Raj 		if (ret) {
3332aa10990SRohit Raj 			if (dev->data->dev_conf.intr_conf.lsc != 0) {
3342aa10990SRohit Raj 				rte_intr_callback_unregister(intr_handle,
3352aa10990SRohit Raj 					dpaa_interrupt_handler,
3362aa10990SRohit Raj 					(void *)dev);
3372aa10990SRohit Raj 				if (ret == EINVAL)
3380fcdbde0SHemant Agrawal 					DPAA_PMD_ERR("Failed to enable interrupt: Not Supported");
3392aa10990SRohit Raj 				else
3400fcdbde0SHemant Agrawal 					DPAA_PMD_ERR("Failed to enable interrupt");
3412aa10990SRohit Raj 			}
3422aa10990SRohit Raj 			dev->data->dev_conf.intr_conf.lsc = 0;
3432aa10990SRohit Raj 			dev->data->dev_flags &= ~RTE_ETH_DEV_INTR_LSC;
3442aa10990SRohit Raj 		}
3452aa10990SRohit Raj 	}
3467a292619SRohit Raj 
3477a292619SRohit Raj 	/* Wait for link status to get updated */
3487a292619SRohit Raj 	if (!link->link_status)
3497a292619SRohit Raj 		sleep(1);
3507a292619SRohit Raj 
3517a292619SRohit Raj 	/* Configure link only if link is UP*/
3527a292619SRohit Raj 	if (link->link_status) {
353295968d1SFerruh Yigit 		if (eth_conf->link_speeds == RTE_ETH_LINK_SPEED_AUTONEG) {
3547a292619SRohit Raj 			/* Start autoneg only if link is not in autoneg mode */
3557a292619SRohit Raj 			if (!link->link_autoneg)
3567a292619SRohit Raj 				dpaa_restart_link_autoneg(__fif->node_name);
357295968d1SFerruh Yigit 		} else if (eth_conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) {
358295968d1SFerruh Yigit 			switch (eth_conf->link_speeds &  RTE_ETH_LINK_SPEED_FIXED) {
359295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_10M_HD:
360295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_10M;
361295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_HALF_DUPLEX;
3627a292619SRohit Raj 				break;
363295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_10M:
364295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_10M;
365295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3667a292619SRohit Raj 				break;
367295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_100M_HD:
368295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_100M;
369295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_HALF_DUPLEX;
3707a292619SRohit Raj 				break;
371295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_100M:
372295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_100M;
373295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3747a292619SRohit Raj 				break;
375295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_1G:
376295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_1G;
377295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3787a292619SRohit Raj 				break;
379295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_2_5G:
380295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_2_5G;
381295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3827a292619SRohit Raj 				break;
383295968d1SFerruh Yigit 			case RTE_ETH_LINK_SPEED_10G:
384295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_10G;
385295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3867a292619SRohit Raj 				break;
3877a292619SRohit Raj 			default:
388295968d1SFerruh Yigit 				speed = RTE_ETH_SPEED_NUM_NONE;
389295968d1SFerruh Yigit 				duplex = RTE_ETH_LINK_FULL_DUPLEX;
3907a292619SRohit Raj 				break;
3917a292619SRohit Raj 			}
3927a292619SRohit Raj 			/* Set link speed */
3937a292619SRohit Raj 			dpaa_update_link_speed(__fif->node_name, speed, duplex);
3947a292619SRohit Raj 		} else {
3957a292619SRohit Raj 			/* Manual autoneg - custom advertisement speed. */
3960fcdbde0SHemant Agrawal 			DPAA_PMD_ERR("Custom Advertisement speeds not supported");
3977a292619SRohit Raj 		}
3987a292619SRohit Raj 	}
3997a292619SRohit Raj 
400ff9e112dSShreyansh Jain 	return 0;
401ff9e112dSShreyansh Jain }
402ff9e112dSShreyansh Jain 
403a7bdc3bdSShreyansh Jain static const uint32_t *
404ba6a168aSSivaramakrishnan Venkat dpaa_supported_ptypes_get(struct rte_eth_dev *dev, size_t *no_of_elements)
405a7bdc3bdSShreyansh Jain {
406a7bdc3bdSShreyansh Jain 	static const uint32_t ptypes[] = {
407a7bdc3bdSShreyansh Jain 		RTE_PTYPE_L2_ETHER,
408ec503d8fSHemant Agrawal 		RTE_PTYPE_L2_ETHER_VLAN,
409ec503d8fSHemant Agrawal 		RTE_PTYPE_L2_ETHER_ARP,
410ec503d8fSHemant Agrawal 		RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
411ec503d8fSHemant Agrawal 		RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
412ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_ICMP,
413ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_TCP,
414ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_UDP,
415ec503d8fSHemant Agrawal 		RTE_PTYPE_L4_FRAG,
416a7bdc3bdSShreyansh Jain 		RTE_PTYPE_L4_TCP,
417a7bdc3bdSShreyansh Jain 		RTE_PTYPE_L4_UDP,
418e7524271SGagandeep Singh 		RTE_PTYPE_L4_SCTP,
4192e3ddb56SSivaramakrishnan Venkat 		RTE_PTYPE_TUNNEL_ESP,
420a350a954SHemant Agrawal 		RTE_PTYPE_TUNNEL_GRE,
421a7bdc3bdSShreyansh Jain 	};
422a7bdc3bdSShreyansh Jain 
423a7bdc3bdSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
424a7bdc3bdSShreyansh Jain 
425ba6a168aSSivaramakrishnan Venkat 	if (dev->rx_pkt_burst == dpaa_eth_queue_rx) {
426ba6a168aSSivaramakrishnan Venkat 		*no_of_elements = RTE_DIM(ptypes);
427a7bdc3bdSShreyansh Jain 		return ptypes;
428ba6a168aSSivaramakrishnan Venkat 	}
429a7bdc3bdSShreyansh Jain 	return NULL;
430a7bdc3bdSShreyansh Jain }
431a7bdc3bdSShreyansh Jain 
4322aa10990SRohit Raj static void dpaa_interrupt_handler(void *param)
4332aa10990SRohit Raj {
4342aa10990SRohit Raj 	struct rte_eth_dev *dev = param;
4352aa10990SRohit Raj 	struct rte_device *rdev = dev->device;
4362aa10990SRohit Raj 	struct rte_dpaa_device *dpaa_dev;
4372aa10990SRohit Raj 	struct rte_intr_handle *intr_handle;
4382aa10990SRohit Raj 	uint64_t buf;
4392aa10990SRohit Raj 	int bytes_read;
4402aa10990SRohit Raj 
4412aa10990SRohit Raj 	dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
442d61138d4SHarman Kalra 	intr_handle = dpaa_dev->intr_handle;
4432aa10990SRohit Raj 
444aedd054cSHarman Kalra 	if (rte_intr_fd_get(intr_handle) < 0)
445aedd054cSHarman Kalra 		return;
446aedd054cSHarman Kalra 
447d61138d4SHarman Kalra 	bytes_read = read(rte_intr_fd_get(intr_handle), &buf,
448d61138d4SHarman Kalra 			  sizeof(uint64_t));
4492aa10990SRohit Raj 	if (bytes_read < 0)
4501ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Error reading eventfd");
4512aa10990SRohit Raj 	dpaa_eth_link_update(dev, 0);
4525723fbedSFerruh Yigit 	rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
4532aa10990SRohit Raj }
4542aa10990SRohit Raj 
455ff9e112dSShreyansh Jain static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
456ff9e112dSShreyansh Jain {
45737f9b54bSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
458d2536b00SHemant Agrawal 	struct fman_if *fif = dev->process_private;
459f1d381b4SJie Hai 	uint16_t i;
46037f9b54bSShreyansh Jain 
461ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
462ff9e112dSShreyansh Jain 
463f5fe3eedSJun Yang 	if (!(default_q || fmc_q))
464f5fe3eedSJun Yang 		dpaa_write_fm_config_to_file();
465f5fe3eedSJun Yang 
466ff9e112dSShreyansh Jain 	/* Change tx callback to the real one */
4679124e65dSGagandeep Singh 	if (dpaa_intf->cgr_tx)
4689124e65dSGagandeep Singh 		dev->tx_pkt_burst = dpaa_eth_queue_tx_slow;
4699124e65dSGagandeep Singh 	else
47037f9b54bSShreyansh Jain 		dev->tx_pkt_burst = dpaa_eth_queue_tx;
4719124e65dSGagandeep Singh 
4727e5f49aeSRohit Raj 	if (fif->mac_type != fman_onic) {
473d2536b00SHemant Agrawal 		fman_if_bmi_stats_enable(fif);
474d2536b00SHemant Agrawal 		fman_if_bmi_stats_reset(fif);
475d2536b00SHemant Agrawal 		fman_if_enable_rx(fif);
4767e5f49aeSRohit Raj 	}
477f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_rx_queues; i++)
478f1d381b4SJie Hai 		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
479f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_tx_queues; i++)
480f1d381b4SJie Hai 		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
481f1d381b4SJie Hai 
482ff9e112dSShreyansh Jain 	return 0;
483ff9e112dSShreyansh Jain }
484ff9e112dSShreyansh Jain 
48562024eb8SIvan Ilchenko static int dpaa_eth_dev_stop(struct rte_eth_dev *dev)
486ff9e112dSShreyansh Jain {
4876b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
488f1d381b4SJie Hai 	uint16_t i;
48937f9b54bSShreyansh Jain 
49037f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
491b8f5d2aeSThomas Monjalon 	dev->data->dev_started = 0;
49237f9b54bSShreyansh Jain 
493d2536b00SHemant Agrawal 	if (!fif->is_shared_mac) {
494d2536b00SHemant Agrawal 		fman_if_bmi_stats_disable(fif);
4956b10d1f7SNipun Gupta 		fman_if_disable_rx(fif);
496d2536b00SHemant Agrawal 	}
49737f9b54bSShreyansh Jain 	dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
49862024eb8SIvan Ilchenko 
499f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_rx_queues; i++)
500f1d381b4SJie Hai 		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
501f1d381b4SJie Hai 	for (i = 0; i < dev->data->nb_tx_queues; i++)
502f1d381b4SJie Hai 		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
503f1d381b4SJie Hai 
50462024eb8SIvan Ilchenko 	return 0;
505ff9e112dSShreyansh Jain }
506ff9e112dSShreyansh Jain 
507b142387bSThomas Monjalon static int dpaa_eth_dev_close(struct rte_eth_dev *dev)
50837f9b54bSShreyansh Jain {
5092aa10990SRohit Raj 	struct fman_if *fif = dev->process_private;
5102aa10990SRohit Raj 	struct __fman_if *__fif;
5112aa10990SRohit Raj 	struct rte_device *rdev = dev->device;
5122aa10990SRohit Raj 	struct rte_dpaa_device *dpaa_dev;
5132aa10990SRohit Raj 	struct rte_intr_handle *intr_handle;
5147a292619SRohit Raj 	struct rte_eth_link *link = &dev->data->dev_link;
5152defb114SSachin Saxena 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
5162defb114SSachin Saxena 	int loop;
51762024eb8SIvan Ilchenko 	int ret;
5182aa10990SRohit Raj 
51937f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
52037f9b54bSShreyansh Jain 
5212defb114SSachin Saxena 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
5222defb114SSachin Saxena 		return 0;
5232defb114SSachin Saxena 
5242defb114SSachin Saxena 	if (!dpaa_intf) {
5252defb114SSachin Saxena 		DPAA_PMD_WARN("Already closed or not started");
5262defb114SSachin Saxena 		return -1;
5272defb114SSachin Saxena 	}
5282defb114SSachin Saxena 
5292defb114SSachin Saxena 	/* DPAA FM deconfig */
5302defb114SSachin Saxena 	if (!(default_q || fmc_q)) {
5312defb114SSachin Saxena 		if (dpaa_fm_deconfig(dpaa_intf, dev->process_private))
5321ec9a3afSHemant Agrawal 			DPAA_PMD_WARN("DPAA FM deconfig failed");
5332defb114SSachin Saxena 	}
5342defb114SSachin Saxena 
5352aa10990SRohit Raj 	dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
536d61138d4SHarman Kalra 	intr_handle = dpaa_dev->intr_handle;
5372aa10990SRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
5382aa10990SRohit Raj 
53962024eb8SIvan Ilchenko 	ret = dpaa_eth_dev_stop(dev);
5402aa10990SRohit Raj 
5417e5f49aeSRohit Raj 	if (fif->mac_type == fman_offline_internal ||
5427e5f49aeSRohit Raj 	    fif->mac_type == fman_onic)
543a0edbb8aSRohit Raj 		return 0;
544a0edbb8aSRohit Raj 
5457a292619SRohit Raj 	/* Reset link to autoneg */
5467a292619SRohit Raj 	if (link->link_status && !link->link_autoneg)
5477a292619SRohit Raj 		dpaa_restart_link_autoneg(__fif->node_name);
5487a292619SRohit Raj 
549d61138d4SHarman Kalra 	if (intr_handle && rte_intr_fd_get(intr_handle) &&
5502aa10990SRohit Raj 	    dev->data->dev_conf.intr_conf.lsc != 0) {
5512aa10990SRohit Raj 		dpaa_intr_disable(__fif->node_name);
5522aa10990SRohit Raj 		rte_intr_callback_unregister(intr_handle,
5532aa10990SRohit Raj 					     dpaa_interrupt_handler,
5542aa10990SRohit Raj 					     (void *)dev);
5552aa10990SRohit Raj 	}
556b142387bSThomas Monjalon 
5572defb114SSachin Saxena 	/* release configuration memory */
5582defb114SSachin Saxena 	rte_free(dpaa_intf->fc_conf);
5592defb114SSachin Saxena 
5602defb114SSachin Saxena 	/* Release RX congestion Groups */
5612defb114SSachin Saxena 	if (dpaa_intf->cgr_rx) {
5622defb114SSachin Saxena 		for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
5632defb114SSachin Saxena 			qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
5642defb114SSachin Saxena 		rte_free(dpaa_intf->cgr_rx);
5652defb114SSachin Saxena 		dpaa_intf->cgr_rx = NULL;
566*e498f3b5SGagandeep Singh 	}
567*e498f3b5SGagandeep Singh 
5682defb114SSachin Saxena 	/* Release TX congestion Groups */
5692defb114SSachin Saxena 	if (dpaa_intf->cgr_tx) {
5702defb114SSachin Saxena 		for (loop = 0; loop < MAX_DPAA_CORES; loop++)
5712defb114SSachin Saxena 			qman_delete_cgr(&dpaa_intf->cgr_tx[loop]);
5722defb114SSachin Saxena 		rte_free(dpaa_intf->cgr_tx);
5732defb114SSachin Saxena 		dpaa_intf->cgr_tx = NULL;
5742defb114SSachin Saxena 	}
5752defb114SSachin Saxena 
5762defb114SSachin Saxena 	rte_free(dpaa_intf->rx_queues);
5772defb114SSachin Saxena 	dpaa_intf->rx_queues = NULL;
5782defb114SSachin Saxena 
5792defb114SSachin Saxena 	rte_free(dpaa_intf->tx_queues);
5802defb114SSachin Saxena 	dpaa_intf->tx_queues = NULL;
581*e498f3b5SGagandeep Singh 	if (dpaa_intf->port_handle) {
582*e498f3b5SGagandeep Singh 		if (dpaa_fm_deconfig(dpaa_intf, fif))
583*e498f3b5SGagandeep Singh 			DPAA_PMD_WARN("DPAA FM "
584*e498f3b5SGagandeep Singh 				"deconfig failed");
585*e498f3b5SGagandeep Singh 	}
586*e498f3b5SGagandeep Singh 	if (fif->num_profiles) {
587*e498f3b5SGagandeep Singh 		if (dpaa_port_vsp_cleanup(dpaa_intf, fif))
588*e498f3b5SGagandeep Singh 			DPAA_PMD_WARN("DPAA FM vsp cleanup failed");
589*e498f3b5SGagandeep Singh 	}
5902defb114SSachin Saxena 
59162024eb8SIvan Ilchenko 	return ret;
59237f9b54bSShreyansh Jain }
59337f9b54bSShreyansh Jain 
594cf0fab1dSHemant Agrawal static int
595cf0fab1dSHemant Agrawal dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
596cf0fab1dSHemant Agrawal 		     char *fw_version,
597cf0fab1dSHemant Agrawal 		     size_t fw_size)
598cf0fab1dSHemant Agrawal {
599cf0fab1dSHemant Agrawal 	int ret;
600cf0fab1dSHemant Agrawal 	FILE *svr_file = NULL;
601cf0fab1dSHemant Agrawal 	unsigned int svr_ver = 0;
602cf0fab1dSHemant Agrawal 
603cf0fab1dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
604cf0fab1dSHemant Agrawal 
605cf0fab1dSHemant Agrawal 	svr_file = fopen(DPAA_SOC_ID_FILE, "r");
606cf0fab1dSHemant Agrawal 	if (!svr_file) {
607cf0fab1dSHemant Agrawal 		DPAA_PMD_ERR("Unable to open SoC device");
608cf0fab1dSHemant Agrawal 		return -ENOTSUP; /* Not supported on this infra */
609cf0fab1dSHemant Agrawal 	}
6103b59b73dSHemant Agrawal 	if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
6113b59b73dSHemant Agrawal 		dpaa_svr_family = svr_ver & SVR_MASK;
6123b59b73dSHemant Agrawal 	else
613cf0fab1dSHemant Agrawal 		DPAA_PMD_ERR("Unable to read SoC device");
614cf0fab1dSHemant Agrawal 
615a8e78906SHemant Agrawal 	fclose(svr_file);
616cf0fab1dSHemant Agrawal 
617a8e78906SHemant Agrawal 	ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
618a8e78906SHemant Agrawal 		       svr_ver, fman_ip_rev);
619d345d6c9SFerruh Yigit 	if (ret < 0)
620d345d6c9SFerruh Yigit 		return -EINVAL;
621a8e78906SHemant Agrawal 
622d345d6c9SFerruh Yigit 	ret += 1; /* add the size of '\0' */
623d345d6c9SFerruh Yigit 	if (fw_size < (size_t)ret)
624cf0fab1dSHemant Agrawal 		return ret;
625cf0fab1dSHemant Agrawal 	else
626cf0fab1dSHemant Agrawal 		return 0;
627cf0fab1dSHemant Agrawal }
628cf0fab1dSHemant Agrawal 
629bdad90d1SIvan Ilchenko static int dpaa_eth_dev_info(struct rte_eth_dev *dev,
630799db456SShreyansh Jain 			     struct rte_eth_dev_info *dev_info)
631799db456SShreyansh Jain {
632799db456SShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
6336b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
634799db456SShreyansh Jain 
63536528452SHemant Agrawal 	DPAA_PMD_DEBUG(": %s", dpaa_intf->name);
636799db456SShreyansh Jain 
637799db456SShreyansh Jain 	dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
638799db456SShreyansh Jain 	dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
639799db456SShreyansh Jain 	dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
640799db456SShreyansh Jain 	dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
641799db456SShreyansh Jain 	dev_info->max_hash_mac_addrs = 0;
642799db456SShreyansh Jain 	dev_info->max_vfs = 0;
643295968d1SFerruh Yigit 	dev_info->max_vmdq_pools = RTE_ETH_16_POOLS;
6444fa5e0bbSShreyansh Jain 	dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
645c1752a36SSachin Saxena 
6466b10d1f7SNipun Gupta 	if (fif->mac_type == fman_mac_1g) {
647295968d1SFerruh Yigit 		dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M_HD
648295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10M
649295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M_HD
650295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M
651295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_1G;
6526b10d1f7SNipun Gupta 	} else if (fif->mac_type == fman_mac_2_5g) {
653295968d1SFerruh Yigit 		dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M_HD
654295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10M
655295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M_HD
656295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M
657295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_1G
658295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_2_5G;
6596b10d1f7SNipun Gupta 	} else if (fif->mac_type == fman_mac_10g) {
660295968d1SFerruh Yigit 		dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M_HD
661295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10M
662295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M_HD
663295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_100M
664295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_1G
665295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_2_5G
666295968d1SFerruh Yigit 					| RTE_ETH_LINK_SPEED_10G;
6677e5f49aeSRohit Raj 	} else if (fif->mac_type == fman_offline_internal ||
6687e5f49aeSRohit Raj 		   fif->mac_type == fman_onic) {
669a0edbb8aSRohit Raj 		dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M_HD
670a0edbb8aSRohit Raj 					| RTE_ETH_LINK_SPEED_10M
671a0edbb8aSRohit Raj 					| RTE_ETH_LINK_SPEED_100M_HD
6727e5f49aeSRohit Raj 					| RTE_ETH_LINK_SPEED_100M
6737e5f49aeSRohit Raj 					| RTE_ETH_LINK_SPEED_1G
6747e5f49aeSRohit Raj 					| RTE_ETH_LINK_SPEED_2_5G;
675bdad90d1SIvan Ilchenko 	} else {
676c1752a36SSachin Saxena 		DPAA_PMD_ERR("invalid link_speed: %s, %d",
6776b10d1f7SNipun Gupta 			     dpaa_intf->name, fif->mac_type);
678bdad90d1SIvan Ilchenko 		return -EINVAL;
679bdad90d1SIvan Ilchenko 	}
680c1752a36SSachin Saxena 
681c5836218SSunil Kumar Kori 	dev_info->rx_offload_capa = dev_rx_offloads_sup |
682c5836218SSunil Kumar Kori 					dev_rx_offloads_nodis;
683c5836218SSunil Kumar Kori 	dev_info->tx_offload_capa = dev_tx_offloads_sup |
684c5836218SSunil Kumar Kori 					dev_tx_offloads_nodis;
6852c01a48aSShreyansh Jain 	dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE;
6862c01a48aSShreyansh Jain 	dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE;
687e35ead33SHemant Agrawal 	dev_info->default_rxportconf.nb_queues = 1;
688e35ead33SHemant Agrawal 	dev_info->default_txportconf.nb_queues = 1;
689e35ead33SHemant Agrawal 	dev_info->default_txportconf.ring_size = CGR_TX_CGR_THRESH;
690e35ead33SHemant Agrawal 	dev_info->default_rxportconf.ring_size = CGR_RX_PERFQ_THRESH;
691bdad90d1SIvan Ilchenko 
692bdad90d1SIvan Ilchenko 	return 0;
693799db456SShreyansh Jain }
694799db456SShreyansh Jain 
6952e6f5657SApeksha Gupta static int
6962e6f5657SApeksha Gupta dpaa_dev_rx_burst_mode_get(struct rte_eth_dev *dev,
6972e6f5657SApeksha Gupta 			__rte_unused uint16_t queue_id,
6982e6f5657SApeksha Gupta 			struct rte_eth_burst_mode *mode)
6992e6f5657SApeksha Gupta {
7002e6f5657SApeksha Gupta 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
7012e6f5657SApeksha Gupta 	int ret = -EINVAL;
7022e6f5657SApeksha Gupta 	unsigned int i;
7032e6f5657SApeksha Gupta 	const struct burst_info {
7042e6f5657SApeksha Gupta 		uint64_t flags;
7052e6f5657SApeksha Gupta 		const char *output;
7062e6f5657SApeksha Gupta 	} rx_offload_map[] = {
707295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_SCATTER, " Scattered,"},
708295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_IPV4_CKSUM, " IPV4 csum,"},
709295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_UDP_CKSUM, " UDP csum,"},
710295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_TCP_CKSUM, " TCP csum,"},
711295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"},
712295968d1SFerruh Yigit 			{RTE_ETH_RX_OFFLOAD_RSS_HASH, " RSS,"}
7132e6f5657SApeksha Gupta 	};
7142e6f5657SApeksha Gupta 
7152e6f5657SApeksha Gupta 	/* Update Rx offload info */
7162e6f5657SApeksha Gupta 	for (i = 0; i < RTE_DIM(rx_offload_map); i++) {
7172e6f5657SApeksha Gupta 		if (eth_conf->rxmode.offloads & rx_offload_map[i].flags) {
7182e6f5657SApeksha Gupta 			snprintf(mode->info, sizeof(mode->info), "%s",
7192e6f5657SApeksha Gupta 				rx_offload_map[i].output);
7202e6f5657SApeksha Gupta 			ret = 0;
7212e6f5657SApeksha Gupta 			break;
7222e6f5657SApeksha Gupta 		}
7232e6f5657SApeksha Gupta 	}
7242e6f5657SApeksha Gupta 	return ret;
7252e6f5657SApeksha Gupta }
7262e6f5657SApeksha Gupta 
7272e6f5657SApeksha Gupta static int
7282e6f5657SApeksha Gupta dpaa_dev_tx_burst_mode_get(struct rte_eth_dev *dev,
7292e6f5657SApeksha Gupta 			__rte_unused uint16_t queue_id,
7302e6f5657SApeksha Gupta 			struct rte_eth_burst_mode *mode)
7312e6f5657SApeksha Gupta {
7322e6f5657SApeksha Gupta 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
7332e6f5657SApeksha Gupta 	int ret = -EINVAL;
7342e6f5657SApeksha Gupta 	unsigned int i;
7352e6f5657SApeksha Gupta 	const struct burst_info {
7362e6f5657SApeksha Gupta 		uint64_t flags;
7372e6f5657SApeksha Gupta 		const char *output;
7382e6f5657SApeksha Gupta 	} tx_offload_map[] = {
739295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_MT_LOCKFREE, " MT lockfree,"},
740295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE, " MBUF free disable,"},
741295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_IPV4_CKSUM, " IPV4 csum,"},
742295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_UDP_CKSUM, " UDP csum,"},
743295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_TCP_CKSUM, " TCP csum,"},
744295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_SCTP_CKSUM, " SCTP csum,"},
745295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"},
746295968d1SFerruh Yigit 			{RTE_ETH_TX_OFFLOAD_MULTI_SEGS, " Scattered,"}
7472e6f5657SApeksha Gupta 	};
7482e6f5657SApeksha Gupta 
7492e6f5657SApeksha Gupta 	/* Update Tx offload info */
7502e6f5657SApeksha Gupta 	for (i = 0; i < RTE_DIM(tx_offload_map); i++) {
7512e6f5657SApeksha Gupta 		if (eth_conf->txmode.offloads & tx_offload_map[i].flags) {
7522e6f5657SApeksha Gupta 			snprintf(mode->info, sizeof(mode->info), "%s",
7532e6f5657SApeksha Gupta 				tx_offload_map[i].output);
7542e6f5657SApeksha Gupta 			ret = 0;
7552e6f5657SApeksha Gupta 			break;
7562e6f5657SApeksha Gupta 		}
7572e6f5657SApeksha Gupta 	}
7582e6f5657SApeksha Gupta 	return ret;
7592e6f5657SApeksha Gupta }
7602e6f5657SApeksha Gupta 
761e124a69fSShreyansh Jain static int dpaa_eth_link_update(struct rte_eth_dev *dev,
76289b9bb08SRohit Raj 				int wait_to_complete)
763e124a69fSShreyansh Jain {
764e124a69fSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
765e124a69fSShreyansh Jain 	struct rte_eth_link *link = &dev->data->dev_link;
7666b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
7672aa10990SRohit Raj 	struct __fman_if *__fif = container_of(fif, struct __fman_if, __if);
7687a292619SRohit Raj 	int ret, ioctl_version;
76989b9bb08SRohit Raj 	uint8_t count;
770e124a69fSShreyansh Jain 
771e124a69fSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
772e124a69fSShreyansh Jain 
7737a292619SRohit Raj 	ioctl_version = dpaa_get_ioctl_version_number();
7747a292619SRohit Raj 
775a0edbb8aSRohit Raj 	if (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC &&
7767e5f49aeSRohit Raj 	    fif->mac_type != fman_offline_internal &&
7777e5f49aeSRohit Raj 	    fif->mac_type != fman_onic) {
77889b9bb08SRohit Raj 		for (count = 0; count <= MAX_REPEAT_TIME; count++) {
7797a292619SRohit Raj 			ret = dpaa_get_link_status(__fif->node_name, link);
7807a292619SRohit Raj 			if (ret)
7817a292619SRohit Raj 				return ret;
782295968d1SFerruh Yigit 			if (link->link_status == RTE_ETH_LINK_DOWN &&
78389b9bb08SRohit Raj 			    wait_to_complete)
78489b9bb08SRohit Raj 				rte_delay_ms(CHECK_INTERVAL);
78589b9bb08SRohit Raj 			else
78689b9bb08SRohit Raj 				break;
78789b9bb08SRohit Raj 		}
7887a292619SRohit Raj 	} else {
7897a292619SRohit Raj 		link->link_status = dpaa_intf->valid;
7907e5f49aeSRohit Raj 		if (fif->mac_type == fman_offline_internal ||
7917e5f49aeSRohit Raj 		    fif->mac_type == fman_onic) {
792a0edbb8aSRohit Raj 			/*Max supported rate for O/H port is 3.75Mpps*/
793a0edbb8aSRohit Raj 			link->link_speed = RTE_ETH_SPEED_NUM_2_5G;
794a0edbb8aSRohit Raj 			link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
795a0edbb8aSRohit Raj 		}
7967a292619SRohit Raj 	}
7977a292619SRohit Raj 
7987a292619SRohit Raj 	if (ioctl_version < 2) {
799295968d1SFerruh Yigit 		link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
800295968d1SFerruh Yigit 		link->link_autoneg = RTE_ETH_LINK_AUTONEG;
8017a292619SRohit Raj 
8026b10d1f7SNipun Gupta 		if (fif->mac_type == fman_mac_1g)
803295968d1SFerruh Yigit 			link->link_speed = RTE_ETH_SPEED_NUM_1G;
8046b10d1f7SNipun Gupta 		else if (fif->mac_type == fman_mac_2_5g)
805295968d1SFerruh Yigit 			link->link_speed = RTE_ETH_SPEED_NUM_2_5G;
8066b10d1f7SNipun Gupta 		else if (fif->mac_type == fman_mac_10g)
807295968d1SFerruh Yigit 			link->link_speed = RTE_ETH_SPEED_NUM_10G;
808e124a69fSShreyansh Jain 		else
809e124a69fSShreyansh Jain 			DPAA_PMD_ERR("invalid link_speed: %s, %d",
8106b10d1f7SNipun Gupta 				     dpaa_intf->name, fif->mac_type);
8112aa10990SRohit Raj 	}
8122aa10990SRohit Raj 
8131ec9a3afSHemant Agrawal 	DPAA_PMD_INFO("Port %d Link is %s", dev->data->port_id,
8142aa10990SRohit Raj 		      link->link_status ? "Up" : "Down");
815e124a69fSShreyansh Jain 	return 0;
816e124a69fSShreyansh Jain }
817e124a69fSShreyansh Jain 
818d5b0924bSMatan Azrad static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
819e1ad3a05SShreyansh Jain 			       struct rte_eth_stats *stats)
820e1ad3a05SShreyansh Jain {
821e1ad3a05SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
822e1ad3a05SShreyansh Jain 
8236b10d1f7SNipun Gupta 	fman_if_stats_get(dev->process_private, stats);
824d5b0924bSMatan Azrad 	return 0;
825e1ad3a05SShreyansh Jain }
826e1ad3a05SShreyansh Jain 
8279970a9adSIgor Romanov static int dpaa_eth_stats_reset(struct rte_eth_dev *dev)
828e1ad3a05SShreyansh Jain {
829e1ad3a05SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
830e1ad3a05SShreyansh Jain 
8316b10d1f7SNipun Gupta 	fman_if_stats_reset(dev->process_private);
832d2536b00SHemant Agrawal 	fman_if_bmi_stats_reset(dev->process_private);
8339970a9adSIgor Romanov 
8349970a9adSIgor Romanov 	return 0;
835e1ad3a05SShreyansh Jain }
83695ef603dSShreyansh Jain 
837b21ed3e2SHemant Agrawal static int
838b21ed3e2SHemant Agrawal dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
839b21ed3e2SHemant Agrawal 		    unsigned int n)
840b21ed3e2SHemant Agrawal {
841d2536b00SHemant Agrawal 	unsigned int i = 0, j, num = RTE_DIM(dpaa_xstats_strings);
842b21ed3e2SHemant Agrawal 	uint64_t values[sizeof(struct dpaa_if_stats) / 8];
843d2536b00SHemant Agrawal 	unsigned int bmi_count = sizeof(struct dpaa_if_rx_bmi_stats) / 4;
844b21ed3e2SHemant Agrawal 
845b21ed3e2SHemant Agrawal 	if (n < num)
846b21ed3e2SHemant Agrawal 		return num;
847b21ed3e2SHemant Agrawal 
848339c1025SHemant Agrawal 	if (xstats == NULL)
849339c1025SHemant Agrawal 		return 0;
850339c1025SHemant Agrawal 
8516b10d1f7SNipun Gupta 	fman_if_stats_get_all(dev->process_private, values,
852b21ed3e2SHemant Agrawal 			      sizeof(struct dpaa_if_stats) / 8);
853b21ed3e2SHemant Agrawal 
854d2536b00SHemant Agrawal 	for (i = 0; i < num - (bmi_count - 1); i++) {
855b21ed3e2SHemant Agrawal 		xstats[i].id = i;
856b21ed3e2SHemant Agrawal 		xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
857b21ed3e2SHemant Agrawal 	}
858d2536b00SHemant Agrawal 	fman_if_bmi_stats_get_all(dev->process_private, values);
859d2536b00SHemant Agrawal 	for (j = 0; i < num; i++, j++) {
860d2536b00SHemant Agrawal 		xstats[i].id = i;
861d2536b00SHemant Agrawal 		xstats[i].value = values[j];
862d2536b00SHemant Agrawal 	}
863d2536b00SHemant Agrawal 
864b21ed3e2SHemant Agrawal 	return i;
865b21ed3e2SHemant Agrawal }
866b21ed3e2SHemant Agrawal 
867b21ed3e2SHemant Agrawal static int
868b21ed3e2SHemant Agrawal dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
869b21ed3e2SHemant Agrawal 		      struct rte_eth_xstat_name *xstats_names,
8705c3fc73eSHemant Agrawal 		      unsigned int limit)
871b21ed3e2SHemant Agrawal {
872b21ed3e2SHemant Agrawal 	unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
873b21ed3e2SHemant Agrawal 
8745c3fc73eSHemant Agrawal 	if (limit < stat_cnt)
8755c3fc73eSHemant Agrawal 		return stat_cnt;
8765c3fc73eSHemant Agrawal 
877b21ed3e2SHemant Agrawal 	if (xstats_names != NULL)
878b21ed3e2SHemant Agrawal 		for (i = 0; i < stat_cnt; i++)
8796723c0fcSBruce Richardson 			strlcpy(xstats_names[i].name,
8806723c0fcSBruce Richardson 				dpaa_xstats_strings[i].name,
8816723c0fcSBruce Richardson 				sizeof(xstats_names[i].name));
882b21ed3e2SHemant Agrawal 
883b21ed3e2SHemant Agrawal 	return stat_cnt;
884b21ed3e2SHemant Agrawal }
885b21ed3e2SHemant Agrawal 
886b21ed3e2SHemant Agrawal static int
887b21ed3e2SHemant Agrawal dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
888b21ed3e2SHemant Agrawal 		      uint64_t *values, unsigned int n)
889b21ed3e2SHemant Agrawal {
890d2536b00SHemant Agrawal 	unsigned int i, j, stat_cnt = RTE_DIM(dpaa_xstats_strings);
891b21ed3e2SHemant Agrawal 	uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
892d2536b00SHemant Agrawal 	unsigned int bmi_count = sizeof(struct dpaa_if_rx_bmi_stats) / 4;
893b21ed3e2SHemant Agrawal 
894b21ed3e2SHemant Agrawal 	if (!ids) {
895b21ed3e2SHemant Agrawal 		if (n < stat_cnt)
896b21ed3e2SHemant Agrawal 			return stat_cnt;
897b21ed3e2SHemant Agrawal 
898b21ed3e2SHemant Agrawal 		if (!values)
899b21ed3e2SHemant Agrawal 			return 0;
900b21ed3e2SHemant Agrawal 
9016b10d1f7SNipun Gupta 		fman_if_stats_get_all(dev->process_private, values_copy,
9025c3fc73eSHemant Agrawal 				      sizeof(struct dpaa_if_stats) / 8);
903b21ed3e2SHemant Agrawal 
904d2536b00SHemant Agrawal 		for (i = 0; i < stat_cnt - (bmi_count - 1); i++)
905b21ed3e2SHemant Agrawal 			values[i] =
906b21ed3e2SHemant Agrawal 				values_copy[dpaa_xstats_strings[i].offset / 8];
907b21ed3e2SHemant Agrawal 
908d2536b00SHemant Agrawal 		fman_if_bmi_stats_get_all(dev->process_private, values);
909d2536b00SHemant Agrawal 		for (j = 0; i < stat_cnt; i++, j++)
910d2536b00SHemant Agrawal 			values[i] = values_copy[j];
911d2536b00SHemant Agrawal 
912b21ed3e2SHemant Agrawal 		return stat_cnt;
913b21ed3e2SHemant Agrawal 	}
914b21ed3e2SHemant Agrawal 
915b21ed3e2SHemant Agrawal 	dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
916b21ed3e2SHemant Agrawal 
917b21ed3e2SHemant Agrawal 	for (i = 0; i < n; i++) {
918b21ed3e2SHemant Agrawal 		if (ids[i] >= stat_cnt) {
919b21ed3e2SHemant Agrawal 			DPAA_PMD_ERR("id value isn't valid");
920b21ed3e2SHemant Agrawal 			return -1;
921b21ed3e2SHemant Agrawal 		}
922b21ed3e2SHemant Agrawal 		values[i] = values_copy[ids[i]];
923b21ed3e2SHemant Agrawal 	}
924b21ed3e2SHemant Agrawal 	return n;
925b21ed3e2SHemant Agrawal }
926b21ed3e2SHemant Agrawal 
927b21ed3e2SHemant Agrawal static int
928b21ed3e2SHemant Agrawal dpaa_xstats_get_names_by_id(
929b21ed3e2SHemant Agrawal 	struct rte_eth_dev *dev,
930b21ed3e2SHemant Agrawal 	const uint64_t *ids,
9318c9f976fSAndrew Rybchenko 	struct rte_eth_xstat_name *xstats_names,
932b21ed3e2SHemant Agrawal 	unsigned int limit)
933b21ed3e2SHemant Agrawal {
934b21ed3e2SHemant Agrawal 	unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
935b21ed3e2SHemant Agrawal 	struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
936b21ed3e2SHemant Agrawal 
937b21ed3e2SHemant Agrawal 	if (!ids)
938b21ed3e2SHemant Agrawal 		return dpaa_xstats_get_names(dev, xstats_names, limit);
939b21ed3e2SHemant Agrawal 
940b21ed3e2SHemant Agrawal 	dpaa_xstats_get_names(dev, xstats_names_copy, limit);
941b21ed3e2SHemant Agrawal 
942b21ed3e2SHemant Agrawal 	for (i = 0; i < limit; i++) {
943b21ed3e2SHemant Agrawal 		if (ids[i] >= stat_cnt) {
944b21ed3e2SHemant Agrawal 			DPAA_PMD_ERR("id value isn't valid");
945b21ed3e2SHemant Agrawal 			return -1;
946b21ed3e2SHemant Agrawal 		}
947b21ed3e2SHemant Agrawal 		strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
948b21ed3e2SHemant Agrawal 	}
949b21ed3e2SHemant Agrawal 	return limit;
950b21ed3e2SHemant Agrawal }
951b21ed3e2SHemant Agrawal 
9529039c812SAndrew Rybchenko static int dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
95395ef603dSShreyansh Jain {
9547e5f49aeSRohit Raj 	struct fman_if *fif = dev->process_private;
9557e5f49aeSRohit Raj 
95695ef603dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
95795ef603dSShreyansh Jain 
9587e5f49aeSRohit Raj 	if (fif->mac_type == fman_onic) {
9597e5f49aeSRohit Raj 		DPAA_PMD_INFO("Enable promiscuous mode not supported on ONIC "
9607e5f49aeSRohit Raj 			      "port");
9617e5f49aeSRohit Raj 		return 0;
9627e5f49aeSRohit Raj 	}
9637e5f49aeSRohit Raj 
9646b10d1f7SNipun Gupta 	fman_if_promiscuous_enable(dev->process_private);
9659039c812SAndrew Rybchenko 
9669039c812SAndrew Rybchenko 	return 0;
96795ef603dSShreyansh Jain }
96895ef603dSShreyansh Jain 
9699039c812SAndrew Rybchenko static int dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
97095ef603dSShreyansh Jain {
9717e5f49aeSRohit Raj 	struct fman_if *fif = dev->process_private;
9727e5f49aeSRohit Raj 
97395ef603dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
97495ef603dSShreyansh Jain 
9757e5f49aeSRohit Raj 	if (fif->mac_type == fman_onic) {
9767e5f49aeSRohit Raj 		DPAA_PMD_INFO("Disable promiscuous mode not supported on ONIC "
9777e5f49aeSRohit Raj 			      "port");
9787e5f49aeSRohit Raj 		return 0;
9797e5f49aeSRohit Raj 	}
9807e5f49aeSRohit Raj 
9816b10d1f7SNipun Gupta 	fman_if_promiscuous_disable(dev->process_private);
9829039c812SAndrew Rybchenko 
9839039c812SAndrew Rybchenko 	return 0;
98495ef603dSShreyansh Jain }
98595ef603dSShreyansh Jain 
986ca041cd4SIvan Ilchenko static int dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
98744dd70a3SShreyansh Jain {
9887e5f49aeSRohit Raj 	struct fman_if *fif = dev->process_private;
9897e5f49aeSRohit Raj 
99044dd70a3SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
99144dd70a3SShreyansh Jain 
9927e5f49aeSRohit Raj 	if (fif->mac_type == fman_onic) {
9937e5f49aeSRohit Raj 		DPAA_PMD_INFO("Enable Multicast not supported on ONIC port");
9947e5f49aeSRohit Raj 		return 0;
9957e5f49aeSRohit Raj 	}
9967e5f49aeSRohit Raj 
9976b10d1f7SNipun Gupta 	fman_if_set_mcast_filter_table(dev->process_private);
998ca041cd4SIvan Ilchenko 
999ca041cd4SIvan Ilchenko 	return 0;
100044dd70a3SShreyansh Jain }
100144dd70a3SShreyansh Jain 
1002ca041cd4SIvan Ilchenko static int dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
100344dd70a3SShreyansh Jain {
10047e5f49aeSRohit Raj 	struct fman_if *fif = dev->process_private;
10057e5f49aeSRohit Raj 
100644dd70a3SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
100744dd70a3SShreyansh Jain 
10087e5f49aeSRohit Raj 	if (fif->mac_type == fman_onic) {
10097e5f49aeSRohit Raj 		DPAA_PMD_INFO("Disable Multicast not supported on ONIC port");
10107e5f49aeSRohit Raj 		return 0;
10117e5f49aeSRohit Raj 	}
10127e5f49aeSRohit Raj 
10136b10d1f7SNipun Gupta 	fman_if_reset_mcast_filter_table(dev->process_private);
1014ca041cd4SIvan Ilchenko 
1015ca041cd4SIvan Ilchenko 	return 0;
101644dd70a3SShreyansh Jain }
101744dd70a3SShreyansh Jain 
1018e4abd4ffSJun Yang static void dpaa_fman_if_pool_setup(struct rte_eth_dev *dev)
1019e4abd4ffSJun Yang {
1020e4abd4ffSJun Yang 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
1021e4abd4ffSJun Yang 	struct fman_if_ic_params icp;
1022e4abd4ffSJun Yang 	uint32_t fd_offset;
1023e4abd4ffSJun Yang 	uint32_t bp_size;
1024e4abd4ffSJun Yang 
1025e4abd4ffSJun Yang 	memset(&icp, 0, sizeof(icp));
1026e4abd4ffSJun Yang 	/* set ICEOF for to the default value , which is 0*/
1027e4abd4ffSJun Yang 	icp.iciof = DEFAULT_ICIOF;
1028e4abd4ffSJun Yang 	icp.iceof = DEFAULT_RX_ICEOF;
1029e4abd4ffSJun Yang 	icp.icsz = DEFAULT_ICSZ;
1030e4abd4ffSJun Yang 	fman_if_set_ic_params(dev->process_private, &icp);
1031e4abd4ffSJun Yang 
1032e4abd4ffSJun Yang 	fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
1033e4abd4ffSJun Yang 	fman_if_set_fdoff(dev->process_private, fd_offset);
1034e4abd4ffSJun Yang 
1035e4abd4ffSJun Yang 	/* Buffer pool size should be equal to Dataroom Size*/
1036e4abd4ffSJun Yang 	bp_size = rte_pktmbuf_data_room_size(dpaa_intf->bp_info->mp);
1037e4abd4ffSJun Yang 
1038e4abd4ffSJun Yang 	fman_if_set_bp(dev->process_private,
1039e4abd4ffSJun Yang 		       dpaa_intf->bp_info->mp->size,
1040e4abd4ffSJun Yang 		       dpaa_intf->bp_info->bpid, bp_size);
1041e4abd4ffSJun Yang }
1042e4abd4ffSJun Yang 
1043e4abd4ffSJun Yang static inline int dpaa_eth_rx_queue_bp_check(struct rte_eth_dev *dev,
1044e4abd4ffSJun Yang 					     int8_t vsp_id, uint32_t bpid)
1045e4abd4ffSJun Yang {
1046e4abd4ffSJun Yang 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
1047e4abd4ffSJun Yang 	struct fman_if *fif = dev->process_private;
1048e4abd4ffSJun Yang 
1049e4abd4ffSJun Yang 	if (fif->num_profiles) {
1050e4abd4ffSJun Yang 		if (vsp_id < 0)
1051e4abd4ffSJun Yang 			vsp_id = fif->base_profile_id;
1052e4abd4ffSJun Yang 	} else {
1053e4abd4ffSJun Yang 		if (vsp_id < 0)
1054e4abd4ffSJun Yang 			vsp_id = 0;
1055e4abd4ffSJun Yang 	}
1056e4abd4ffSJun Yang 
1057e4abd4ffSJun Yang 	if (dpaa_intf->vsp_bpid[vsp_id] &&
1058e4abd4ffSJun Yang 		bpid != dpaa_intf->vsp_bpid[vsp_id]) {
1059e4abd4ffSJun Yang 		DPAA_PMD_ERR("Various MPs are assigned to RXQs with same VSP");
1060e4abd4ffSJun Yang 
1061e4abd4ffSJun Yang 		return -1;
1062e4abd4ffSJun Yang 	}
1063e4abd4ffSJun Yang 
1064e4abd4ffSJun Yang 	return 0;
1065e4abd4ffSJun Yang }
1066e4abd4ffSJun Yang 
106737f9b54bSShreyansh Jain static
106837f9b54bSShreyansh Jain int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
106962f53995SHemant Agrawal 			    uint16_t nb_desc,
107037f9b54bSShreyansh Jain 			    unsigned int socket_id __rte_unused,
1071e335cce4SHemant Agrawal 			    const struct rte_eth_rxconf *rx_conf,
107237f9b54bSShreyansh Jain 			    struct rte_mempool *mp)
107337f9b54bSShreyansh Jain {
107437f9b54bSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
10756b10d1f7SNipun Gupta 	struct fman_if *fif = dev->process_private;
107662f53995SHemant Agrawal 	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
10770c504f69SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
10785edc61eeSRohit Raj 	u32 ch_id, flags = 0;
10790c504f69SHemant Agrawal 	int ret;
108055576ac2SHemant Agrawal 	u32 buffsz = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM;
10811bb4a528SFerruh Yigit 	uint32_t max_rx_pktlen;
108237f9b54bSShreyansh Jain 
108337f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
108437f9b54bSShreyansh Jain 
10856fd3639aSHemant Agrawal 	if (queue_idx >= dev->data->nb_rx_queues) {
10866fd3639aSHemant Agrawal 		rte_errno = EOVERFLOW;
10876fd3639aSHemant Agrawal 		DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
10886fd3639aSHemant Agrawal 		      (void *)dev, queue_idx, dev->data->nb_rx_queues);
10896fd3639aSHemant Agrawal 		return -rte_errno;
10906fd3639aSHemant Agrawal 	}
10916fd3639aSHemant Agrawal 
1092e335cce4SHemant Agrawal 	/* Rx deferred start is not supported */
1093e335cce4SHemant Agrawal 	if (rx_conf->rx_deferred_start) {
1094e335cce4SHemant Agrawal 		DPAA_PMD_ERR("%p:Rx deferred start not supported", (void *)dev);
1095e335cce4SHemant Agrawal 		return -EINVAL;
1096e335cce4SHemant Agrawal 	}
10972cf9264fSHemant Agrawal 	rxq->nb_desc = UINT16_MAX;
10982cf9264fSHemant Agrawal 	rxq->offloads = rx_conf->offloads;
1099e335cce4SHemant Agrawal 
11006fd3639aSHemant Agrawal 	DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)",
11016fd3639aSHemant Agrawal 			queue_idx, rxq->fqid);
110237f9b54bSShreyansh Jain 
1103e4abd4ffSJun Yang 	if (!fif->num_profiles) {
1104e4abd4ffSJun Yang 		if (dpaa_intf->bp_info && dpaa_intf->bp_info->bp &&
1105e4abd4ffSJun Yang 			dpaa_intf->bp_info->mp != mp) {
1106e4abd4ffSJun Yang 			DPAA_PMD_WARN("Multiple pools on same interface not"
1107e4abd4ffSJun Yang 				      " supported");
1108e4abd4ffSJun Yang 			return -EINVAL;
1109e4abd4ffSJun Yang 		}
1110e4abd4ffSJun Yang 	} else {
1111e4abd4ffSJun Yang 		if (dpaa_eth_rx_queue_bp_check(dev, rxq->vsp_id,
1112e4abd4ffSJun Yang 			DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid)) {
1113e4abd4ffSJun Yang 			return -EINVAL;
1114e4abd4ffSJun Yang 		}
1115e4abd4ffSJun Yang 	}
1116e4abd4ffSJun Yang 
1117376fb49eSNipun Gupta 	if (dpaa_intf->bp_info && dpaa_intf->bp_info->bp &&
1118376fb49eSNipun Gupta 	    dpaa_intf->bp_info->mp != mp) {
1119376fb49eSNipun Gupta 		DPAA_PMD_WARN("Multiple pools on same interface not supported");
1120376fb49eSNipun Gupta 		return -EINVAL;
1121376fb49eSNipun Gupta 	}
1122376fb49eSNipun Gupta 
11231bb4a528SFerruh Yigit 	max_rx_pktlen = dev->data->mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN +
11241bb4a528SFerruh Yigit 		VLAN_TAG_SIZE;
112555576ac2SHemant Agrawal 	/* Max packet can fit in single buffer */
11261bb4a528SFerruh Yigit 	if (max_rx_pktlen <= buffsz) {
112755576ac2SHemant Agrawal 		;
112855576ac2SHemant Agrawal 	} else if (dev->data->dev_conf.rxmode.offloads &
1129295968d1SFerruh Yigit 			RTE_ETH_RX_OFFLOAD_SCATTER) {
11301bb4a528SFerruh Yigit 		if (max_rx_pktlen > buffsz * DPAA_SGT_MAX_ENTRIES) {
11311bb4a528SFerruh Yigit 			DPAA_PMD_ERR("Maximum Rx packet size %d too big to fit "
113255576ac2SHemant Agrawal 				"MaxSGlist %d",
11331bb4a528SFerruh Yigit 				max_rx_pktlen, buffsz * DPAA_SGT_MAX_ENTRIES);
113455576ac2SHemant Agrawal 			rte_errno = EOVERFLOW;
113555576ac2SHemant Agrawal 			return -rte_errno;
113655576ac2SHemant Agrawal 		}
113755576ac2SHemant Agrawal 	} else {
113855576ac2SHemant Agrawal 		DPAA_PMD_WARN("The requested maximum Rx packet size (%u) is"
113955576ac2SHemant Agrawal 		     " larger than a single mbuf (%u) and scattered"
114065afdda0SRohit Raj 		     " mode has not been requested", max_rx_pktlen, buffsz);
114155576ac2SHemant Agrawal 	}
114255576ac2SHemant Agrawal 
114337f9b54bSShreyansh Jain 	dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
114437f9b54bSShreyansh Jain 
1145e4abd4ffSJun Yang 	/* For shared interface, it's done in kernel, skip.*/
11467e5f49aeSRohit Raj 	if (!fif->is_shared_mac && fif->mac_type != fman_offline_internal &&
11477e5f49aeSRohit Raj 	    fif->mac_type != fman_onic)
1148e4abd4ffSJun Yang 		dpaa_fman_if_pool_setup(dev);
114937f9b54bSShreyansh Jain 
1150e4abd4ffSJun Yang 	if (fif->num_profiles) {
1151e4abd4ffSJun Yang 		int8_t vsp_id = rxq->vsp_id;
115237f9b54bSShreyansh Jain 
1153e4abd4ffSJun Yang 		if (vsp_id >= 0) {
1154e4abd4ffSJun Yang 			ret = dpaa_port_vsp_update(dpaa_intf, fmc_q, vsp_id,
1155e4abd4ffSJun Yang 					DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid,
115665afdda0SRohit Raj 					fif, buffsz + RTE_PKTMBUF_HEADROOM);
1157e4abd4ffSJun Yang 			if (ret) {
1158e4abd4ffSJun Yang 				DPAA_PMD_ERR("dpaa_port_vsp_update failed");
1159e4abd4ffSJun Yang 				return ret;
116037f9b54bSShreyansh Jain 			}
1161e4abd4ffSJun Yang 		} else {
1162e4abd4ffSJun Yang 			DPAA_PMD_INFO("Base profile is associated to"
11631ec9a3afSHemant Agrawal 				" RXQ fqid:%d", rxq->fqid);
1164e4abd4ffSJun Yang 			if (fif->is_shared_mac) {
1165e4abd4ffSJun Yang 				DPAA_PMD_ERR("Fatal: Base profile is associated"
1166e4abd4ffSJun Yang 					     " to shared interface on DPDK.");
1167e4abd4ffSJun Yang 				return -EINVAL;
1168e4abd4ffSJun Yang 			}
1169e4abd4ffSJun Yang 			dpaa_intf->vsp_bpid[fif->base_profile_id] =
1170e4abd4ffSJun Yang 				DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid;
1171e4abd4ffSJun Yang 		}
1172e4abd4ffSJun Yang 	} else {
1173e4abd4ffSJun Yang 		dpaa_intf->vsp_bpid[0] =
1174e4abd4ffSJun Yang 			DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid;
1175e4abd4ffSJun Yang 	}
1176e4abd4ffSJun Yang 
1177e4abd4ffSJun Yang 	dpaa_intf->valid = 1;
11787e5f49aeSRohit Raj 	if (fif->mac_type != fman_onic)
117955576ac2SHemant Agrawal 		DPAA_PMD_DEBUG("if:%s sg_on = %d, max_frm =%d", dpaa_intf->name,
11801bb4a528SFerruh Yigit 			       fman_if_get_sg_enable(fif), max_rx_pktlen);
11810c504f69SHemant Agrawal 	/* checking if push mode only, no error check for now */
1182a6a75240SNipun Gupta 	if (!rxq->is_static &&
1183a6a75240SNipun Gupta 	    dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
1184b9c94167SNipun Gupta 		struct qman_portal *qp;
1185a6a75240SNipun Gupta 		int q_fd;
1186b9c94167SNipun Gupta 
11870c504f69SHemant Agrawal 		dpaa_push_queue_idx++;
11880c504f69SHemant Agrawal 		opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
11890c504f69SHemant Agrawal 		opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
11900c504f69SHemant Agrawal 				   QM_FQCTRL_CTXASTASHING |
11910c504f69SHemant Agrawal 				   QM_FQCTRL_PREFERINCACHE;
11920c504f69SHemant Agrawal 		opts.fqd.context_a.stashing.exclusive = 0;
11937be78d02SJosh Soref 		/* In multicore scenario stashing becomes a bottleneck on LS1046.
1194b9083ea5SNipun Gupta 		 * So do not enable stashing in this case
1195b9083ea5SNipun Gupta 		 */
1196b9083ea5SNipun Gupta 		if (dpaa_svr_family != SVR_LS1046A_FAMILY)
11970c504f69SHemant Agrawal 			opts.fqd.context_a.stashing.annotation_cl =
11980c504f69SHemant Agrawal 						DPAA_IF_RX_ANNOTATION_STASH;
11990c504f69SHemant Agrawal 		opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
12000c504f69SHemant Agrawal 		opts.fqd.context_a.stashing.context_cl =
12010c504f69SHemant Agrawal 						DPAA_IF_RX_CONTEXT_STASH;
120262f53995SHemant Agrawal 
12030c504f69SHemant Agrawal 		/*Create a channel and associate given queue with the channel*/
12045edc61eeSRohit Raj 		qman_alloc_pool_range(&ch_id, 1, 1, 0);
12055edc61eeSRohit Raj 		rxq->ch_id = (u16)ch_id;
12065edc61eeSRohit Raj 
12070c504f69SHemant Agrawal 		opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
12080c504f69SHemant Agrawal 		opts.fqd.dest.channel = rxq->ch_id;
12090c504f69SHemant Agrawal 		opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
12100c504f69SHemant Agrawal 		flags = QMAN_INITFQ_FLAG_SCHED;
12110c504f69SHemant Agrawal 
12120c504f69SHemant Agrawal 		/* Configure tail drop */
12130c504f69SHemant Agrawal 		if (dpaa_intf->cgr_rx) {
12140c504f69SHemant Agrawal 			opts.we_mask |= QM_INITFQ_WE_CGID;
12150c504f69SHemant Agrawal 			opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
12160c504f69SHemant Agrawal 			opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
12170c504f69SHemant Agrawal 		}
12180c504f69SHemant Agrawal 		ret = qman_init_fq(rxq, flags, &opts);
12196fd3639aSHemant Agrawal 		if (ret) {
12206fd3639aSHemant Agrawal 			DPAA_PMD_ERR("Channel/Q association failed. fqid 0x%x "
12216fd3639aSHemant Agrawal 				"ret:%d(%s)", rxq->fqid, ret, strerror(ret));
12226fd3639aSHemant Agrawal 			return ret;
12236fd3639aSHemant Agrawal 		}
122419b4aba2SHemant Agrawal 		if (dpaa_svr_family == SVR_LS1043A_FAMILY) {
122519b4aba2SHemant Agrawal 			rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb_no_prefetch;
122619b4aba2SHemant Agrawal 		} else {
1227b9083ea5SNipun Gupta 			rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb;
1228b9083ea5SNipun Gupta 			rxq->cb.dqrr_prepare = dpaa_rx_cb_prepare;
122919b4aba2SHemant Agrawal 		}
123019b4aba2SHemant Agrawal 
12310c504f69SHemant Agrawal 		rxq->is_static = true;
1232b9c94167SNipun Gupta 
1233b9c94167SNipun Gupta 		/* Allocate qman specific portals */
1234a6a75240SNipun Gupta 		qp = fsl_qman_fq_portal_create(&q_fd);
1235b9c94167SNipun Gupta 		if (!qp) {
1236b9c94167SNipun Gupta 			DPAA_PMD_ERR("Unable to alloc fq portal");
1237b9c94167SNipun Gupta 			return -1;
1238b9c94167SNipun Gupta 		}
1239b9c94167SNipun Gupta 		rxq->qp = qp;
1240a6a75240SNipun Gupta 
1241a6a75240SNipun Gupta 		/* Set up the device interrupt handler */
1242d61138d4SHarman Kalra 		if (dev->intr_handle == NULL) {
1243a6a75240SNipun Gupta 			struct rte_dpaa_device *dpaa_dev;
1244a6a75240SNipun Gupta 			struct rte_device *rdev = dev->device;
1245a6a75240SNipun Gupta 
1246a6a75240SNipun Gupta 			dpaa_dev = container_of(rdev, struct rte_dpaa_device,
1247a6a75240SNipun Gupta 						device);
1248d61138d4SHarman Kalra 			dev->intr_handle = dpaa_dev->intr_handle;
1249d61138d4SHarman Kalra 			if (rte_intr_vec_list_alloc(dev->intr_handle,
1250d61138d4SHarman Kalra 					NULL, dpaa_push_mode_max_queue)) {
1251a6a75240SNipun Gupta 				DPAA_PMD_ERR("intr_vec alloc failed");
1252a6a75240SNipun Gupta 				return -ENOMEM;
1253a6a75240SNipun Gupta 			}
1254d61138d4SHarman Kalra 			if (rte_intr_nb_efd_set(dev->intr_handle,
1255d61138d4SHarman Kalra 					dpaa_push_mode_max_queue))
1256d61138d4SHarman Kalra 				return -rte_errno;
1257d61138d4SHarman Kalra 
1258d61138d4SHarman Kalra 			if (rte_intr_max_intr_set(dev->intr_handle,
1259d61138d4SHarman Kalra 					dpaa_push_mode_max_queue))
1260d61138d4SHarman Kalra 				return -rte_errno;
1261a6a75240SNipun Gupta 		}
1262a6a75240SNipun Gupta 
1263d61138d4SHarman Kalra 		if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_EXT))
1264d61138d4SHarman Kalra 			return -rte_errno;
1265d61138d4SHarman Kalra 
1266d61138d4SHarman Kalra 		if (rte_intr_vec_list_index_set(dev->intr_handle,
1267d61138d4SHarman Kalra 						queue_idx, queue_idx + 1))
1268d61138d4SHarman Kalra 			return -rte_errno;
1269d61138d4SHarman Kalra 
1270d61138d4SHarman Kalra 		if (rte_intr_efds_index_set(dev->intr_handle, queue_idx,
1271d61138d4SHarman Kalra 						   q_fd))
1272d61138d4SHarman Kalra 			return -rte_errno;
1273d61138d4SHarman Kalra 
1274a6a75240SNipun Gupta 		rxq->q_fd = q_fd;
12750c504f69SHemant Agrawal 	}
1276e1797f4bSAkhil Goyal 	rxq->bp_array = rte_dpaa_bpid_info;
127762f53995SHemant Agrawal 	dev->data->rx_queues[queue_idx] = rxq;
127862f53995SHemant Agrawal 
127962f53995SHemant Agrawal 	/* configure the CGR size as per the desc size */
128062f53995SHemant Agrawal 	if (dpaa_intf->cgr_rx) {
128162f53995SHemant Agrawal 		struct qm_mcc_initcgr cgr_opts = {0};
128262f53995SHemant Agrawal 
12832cf9264fSHemant Agrawal 		rxq->nb_desc = nb_desc;
128462f53995SHemant Agrawal 		/* Enable tail drop with cgr on this queue */
128562f53995SHemant Agrawal 		qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
128662f53995SHemant Agrawal 		ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
128762f53995SHemant Agrawal 		if (ret) {
128862f53995SHemant Agrawal 			DPAA_PMD_WARN(
128962f53995SHemant Agrawal 				"rx taildrop modify fail on fqid %d (ret=%d)",
129062f53995SHemant Agrawal 				rxq->fqid, ret);
129162f53995SHemant Agrawal 		}
129262f53995SHemant Agrawal 	}
1293a0edbb8aSRohit Raj 
129495d226f0SNipun Gupta 	/* Enable main queue to receive error packets also by default */
12957e5f49aeSRohit Raj 	if (fif->mac_type != fman_offline_internal &&
12967e5f49aeSRohit Raj 	    fif->mac_type != fman_onic)
129795d226f0SNipun Gupta 		fman_if_set_err_fqid(fif, rxq->fqid);
1298a0edbb8aSRohit Raj 
129937f9b54bSShreyansh Jain 	return 0;
130037f9b54bSShreyansh Jain }
130137f9b54bSShreyansh Jain 
13021e06b6dcSHemant Agrawal int
130377b7b81eSNeil Horman dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
13045e745593SSunil Kumar Kori 		int eth_rx_queue_id,
13055e745593SSunil Kumar Kori 		u16 ch_id,
13065e745593SSunil Kumar Kori 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
13075e745593SSunil Kumar Kori {
13085e745593SSunil Kumar Kori 	int ret;
13095e745593SSunil Kumar Kori 	u32 flags = 0;
13105e745593SSunil Kumar Kori 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
13115e745593SSunil Kumar Kori 	struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
13125e745593SSunil Kumar Kori 	struct qm_mcc_initfq opts = {0};
13135e745593SSunil Kumar Kori 
13141af8b0b2SDavid Marchand 	if (dpaa_push_mode_max_queue) {
13151af8b0b2SDavid Marchand 		DPAA_PMD_WARN("PUSH mode q and EVENTDEV are not compatible");
13161af8b0b2SDavid Marchand 		DPAA_PMD_WARN("PUSH mode already enabled for first %d queues.",
13175e745593SSunil Kumar Kori 			      dpaa_push_mode_max_queue);
13181af8b0b2SDavid Marchand 		DPAA_PMD_WARN("To disable set DPAA_PUSH_QUEUES_NUMBER to 0");
13191af8b0b2SDavid Marchand 	}
13205e745593SSunil Kumar Kori 
13215e745593SSunil Kumar Kori 	dpaa_poll_queue_default_config(&opts);
13225e745593SSunil Kumar Kori 
13235e745593SSunil Kumar Kori 	switch (queue_conf->ev.sched_type) {
13245e745593SSunil Kumar Kori 	case RTE_SCHED_TYPE_ATOMIC:
13255e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
13265e745593SSunil Kumar Kori 		/* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
13275e745593SSunil Kumar Kori 		 * configuration with HOLD_ACTIVE setting
13285e745593SSunil Kumar Kori 		 */
13295e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
13305e745593SSunil Kumar Kori 		rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_atomic;
13315e745593SSunil Kumar Kori 		break;
13325e745593SSunil Kumar Kori 	case RTE_SCHED_TYPE_ORDERED:
13331ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Ordered queue schedule type is not supported");
13345e745593SSunil Kumar Kori 		return -1;
13355e745593SSunil Kumar Kori 	default:
13365e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
13375e745593SSunil Kumar Kori 		rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_parallel;
13385e745593SSunil Kumar Kori 		break;
13395e745593SSunil Kumar Kori 	}
13405e745593SSunil Kumar Kori 
13415e745593SSunil Kumar Kori 	opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
13425e745593SSunil Kumar Kori 	opts.fqd.dest.channel = ch_id;
13435e745593SSunil Kumar Kori 	opts.fqd.dest.wq = queue_conf->ev.priority;
13445e745593SSunil Kumar Kori 
13455e745593SSunil Kumar Kori 	if (dpaa_intf->cgr_rx) {
13465e745593SSunil Kumar Kori 		opts.we_mask |= QM_INITFQ_WE_CGID;
13475e745593SSunil Kumar Kori 		opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
13485e745593SSunil Kumar Kori 		opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
13495e745593SSunil Kumar Kori 	}
13505e745593SSunil Kumar Kori 
13515e745593SSunil Kumar Kori 	flags = QMAN_INITFQ_FLAG_SCHED;
13525e745593SSunil Kumar Kori 
13535e745593SSunil Kumar Kori 	ret = qman_init_fq(rxq, flags, &opts);
13545e745593SSunil Kumar Kori 	if (ret) {
13556fd3639aSHemant Agrawal 		DPAA_PMD_ERR("Ev-Channel/Q association failed. fqid 0x%x "
13566fd3639aSHemant Agrawal 				"ret:%d(%s)", rxq->fqid, ret, strerror(ret));
13575e745593SSunil Kumar Kori 		return ret;
13585e745593SSunil Kumar Kori 	}
13595e745593SSunil Kumar Kori 
13605e745593SSunil Kumar Kori 	/* copy configuration which needs to be filled during dequeue */
13615e745593SSunil Kumar Kori 	memcpy(&rxq->ev, &queue_conf->ev, sizeof(struct rte_event));
13625e745593SSunil Kumar Kori 	dev->data->rx_queues[eth_rx_queue_id] = rxq;
13635e745593SSunil Kumar Kori 
13645e745593SSunil Kumar Kori 	return ret;
13655e745593SSunil Kumar Kori }
13665e745593SSunil Kumar Kori 
13671e06b6dcSHemant Agrawal int
136877b7b81eSNeil Horman dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
13695e745593SSunil Kumar Kori 		int eth_rx_queue_id)
13705e745593SSunil Kumar Kori {
1371ee6647e0SGagandeep Singh 	struct qm_mcc_initfq opts = {0};
13725e745593SSunil Kumar Kori 	int ret;
13735e745593SSunil Kumar Kori 	u32 flags = 0;
13745e745593SSunil Kumar Kori 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
13755e745593SSunil Kumar Kori 	struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
13765e745593SSunil Kumar Kori 
1377ee6647e0SGagandeep Singh 	qman_retire_fq(rxq, NULL);
1378ee6647e0SGagandeep Singh 	qman_oos_fq(rxq);
13795e745593SSunil Kumar Kori 	ret = qman_init_fq(rxq, flags, &opts);
13805e745593SSunil Kumar Kori 	if (ret) {
1381ee6647e0SGagandeep Singh 		DPAA_PMD_ERR("detach rx fqid %d failed with ret: %d",
13825e745593SSunil Kumar Kori 			     rxq->fqid, ret);
13835e745593SSunil Kumar Kori 	}
13845e745593SSunil Kumar Kori 
13855e745593SSunil Kumar Kori 	rxq->cb.dqrr_dpdk_cb = NULL;
13865e745593SSunil Kumar Kori 	dev->data->rx_queues[eth_rx_queue_id] = NULL;
13875e745593SSunil Kumar Kori 
13885e745593SSunil Kumar Kori 	return 0;
13895e745593SSunil Kumar Kori }
13905e745593SSunil Kumar Kori 
139137f9b54bSShreyansh Jain static
139237f9b54bSShreyansh Jain int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
139337f9b54bSShreyansh Jain 			    uint16_t nb_desc __rte_unused,
139437f9b54bSShreyansh Jain 		unsigned int socket_id __rte_unused,
1395e335cce4SHemant Agrawal 		const struct rte_eth_txconf *tx_conf)
139637f9b54bSShreyansh Jain {
139737f9b54bSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
13982cf9264fSHemant Agrawal 	struct qman_fq *txq = &dpaa_intf->tx_queues[queue_idx];
139937f9b54bSShreyansh Jain 
140037f9b54bSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
140137f9b54bSShreyansh Jain 
1402e335cce4SHemant Agrawal 	/* Tx deferred start is not supported */
1403e335cce4SHemant Agrawal 	if (tx_conf->tx_deferred_start) {
1404e335cce4SHemant Agrawal 		DPAA_PMD_ERR("%p:Tx deferred start not supported", (void *)dev);
1405e335cce4SHemant Agrawal 		return -EINVAL;
1406e335cce4SHemant Agrawal 	}
14072cf9264fSHemant Agrawal 	txq->nb_desc = UINT16_MAX;
14082cf9264fSHemant Agrawal 	txq->offloads = tx_conf->offloads;
14092cf9264fSHemant Agrawal 
14106fd3639aSHemant Agrawal 	if (queue_idx >= dev->data->nb_tx_queues) {
14116fd3639aSHemant Agrawal 		rte_errno = EOVERFLOW;
14126fd3639aSHemant Agrawal 		DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
14136fd3639aSHemant Agrawal 		      (void *)dev, queue_idx, dev->data->nb_tx_queues);
14146fd3639aSHemant Agrawal 		return -rte_errno;
14156fd3639aSHemant Agrawal 	}
14166fd3639aSHemant Agrawal 
14176fd3639aSHemant Agrawal 	DPAA_PMD_INFO("Tx queue setup for queue index: %d fq_id (0x%x)",
14182cf9264fSHemant Agrawal 			queue_idx, txq->fqid);
14192cf9264fSHemant Agrawal 	dev->data->tx_queues[queue_idx] = txq;
14209124e65dSGagandeep Singh 
142137f9b54bSShreyansh Jain 	return 0;
142237f9b54bSShreyansh Jain }
142337f9b54bSShreyansh Jain 
1424b005d729SHemant Agrawal static uint32_t
14258d7d4fcdSKonstantin Ananyev dpaa_dev_rx_queue_count(void *rx_queue)
1426b005d729SHemant Agrawal {
14278d7d4fcdSKonstantin Ananyev 	struct qman_fq *rxq = rx_queue;
1428b005d729SHemant Agrawal 	u32 frm_cnt = 0;
1429b005d729SHemant Agrawal 
1430b005d729SHemant Agrawal 	PMD_INIT_FUNC_TRACE();
1431b005d729SHemant Agrawal 
1432b005d729SHemant Agrawal 	if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
14338d7d4fcdSKonstantin Ananyev 		DPAA_PMD_DEBUG("RX frame count for q(%p) is %u",
14348d7d4fcdSKonstantin Ananyev 			       rx_queue, frm_cnt);
1435b005d729SHemant Agrawal 	}
1436b005d729SHemant Agrawal 	return frm_cnt;
1437b005d729SHemant Agrawal }
1438b005d729SHemant Agrawal 
1439e124a69fSShreyansh Jain static int dpaa_link_down(struct rte_eth_dev *dev)
1440e124a69fSShreyansh Jain {
1441f231d48dSRohit Raj 	struct fman_if *fif = dev->process_private;
1442f231d48dSRohit Raj 	struct __fman_if *__fif;
1443f231d48dSRohit Raj 
1444e124a69fSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1445e124a69fSShreyansh Jain 
1446f231d48dSRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
1447f231d48dSRohit Raj 
1448a0edbb8aSRohit Raj 	if (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC &&
14497e5f49aeSRohit Raj 	    fif->mac_type != fman_offline_internal &&
14507e5f49aeSRohit Raj 	    fif->mac_type != fman_onic)
1451295968d1SFerruh Yigit 		dpaa_update_link_status(__fif->node_name, RTE_ETH_LINK_DOWN);
1452f231d48dSRohit Raj 	else
145362024eb8SIvan Ilchenko 		return dpaa_eth_dev_stop(dev);
1454e124a69fSShreyansh Jain 	return 0;
1455e124a69fSShreyansh Jain }
1456e124a69fSShreyansh Jain 
1457e124a69fSShreyansh Jain static int dpaa_link_up(struct rte_eth_dev *dev)
1458e124a69fSShreyansh Jain {
1459f231d48dSRohit Raj 	struct fman_if *fif = dev->process_private;
1460f231d48dSRohit Raj 	struct __fman_if *__fif;
1461f231d48dSRohit Raj 
1462e124a69fSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1463e124a69fSShreyansh Jain 
1464f231d48dSRohit Raj 	__fif = container_of(fif, struct __fman_if, __if);
1465f231d48dSRohit Raj 
1466a0edbb8aSRohit Raj 	if (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC &&
14677e5f49aeSRohit Raj 	    fif->mac_type != fman_offline_internal &&
14687e5f49aeSRohit Raj 	    fif->mac_type != fman_onic)
1469295968d1SFerruh Yigit 		dpaa_update_link_status(__fif->node_name, RTE_ETH_LINK_UP);
1470f231d48dSRohit Raj 	else
1471e124a69fSShreyansh Jain 		dpaa_eth_dev_start(dev);
1472e124a69fSShreyansh Jain 	return 0;
1473e124a69fSShreyansh Jain }
1474e124a69fSShreyansh Jain 
1475fe6c6032SShreyansh Jain static int
147612a4678aSShreyansh Jain dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
147712a4678aSShreyansh Jain 		   struct rte_eth_fc_conf *fc_conf)
147812a4678aSShreyansh Jain {
147912a4678aSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
148012a4678aSShreyansh Jain 	struct rte_eth_fc_conf *net_fc;
148112a4678aSShreyansh Jain 
148212a4678aSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
148312a4678aSShreyansh Jain 
148412a4678aSShreyansh Jain 	if (!(dpaa_intf->fc_conf)) {
148512a4678aSShreyansh Jain 		dpaa_intf->fc_conf = rte_zmalloc(NULL,
148612a4678aSShreyansh Jain 			sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
148712a4678aSShreyansh Jain 		if (!dpaa_intf->fc_conf) {
148812a4678aSShreyansh Jain 			DPAA_PMD_ERR("unable to save flow control info");
148912a4678aSShreyansh Jain 			return -ENOMEM;
149012a4678aSShreyansh Jain 		}
149112a4678aSShreyansh Jain 	}
149212a4678aSShreyansh Jain 	net_fc = dpaa_intf->fc_conf;
149312a4678aSShreyansh Jain 
149412a4678aSShreyansh Jain 	if (fc_conf->high_water < fc_conf->low_water) {
149512a4678aSShreyansh Jain 		DPAA_PMD_ERR("Incorrect Flow Control Configuration");
149612a4678aSShreyansh Jain 		return -EINVAL;
149712a4678aSShreyansh Jain 	}
149812a4678aSShreyansh Jain 
1499295968d1SFerruh Yigit 	if (fc_conf->mode == RTE_ETH_FC_NONE) {
150012a4678aSShreyansh Jain 		return 0;
1501295968d1SFerruh Yigit 	} else if (fc_conf->mode == RTE_ETH_FC_TX_PAUSE ||
1502295968d1SFerruh Yigit 		 fc_conf->mode == RTE_ETH_FC_FULL) {
15036b10d1f7SNipun Gupta 		fman_if_set_fc_threshold(dev->process_private,
15046b10d1f7SNipun Gupta 					 fc_conf->high_water,
150512a4678aSShreyansh Jain 					 fc_conf->low_water,
150612a4678aSShreyansh Jain 					 dpaa_intf->bp_info->bpid);
150712a4678aSShreyansh Jain 		if (fc_conf->pause_time)
15086b10d1f7SNipun Gupta 			fman_if_set_fc_quanta(dev->process_private,
150912a4678aSShreyansh Jain 					      fc_conf->pause_time);
151012a4678aSShreyansh Jain 	}
151112a4678aSShreyansh Jain 
151212a4678aSShreyansh Jain 	/* Save the information in dpaa device */
151312a4678aSShreyansh Jain 	net_fc->pause_time = fc_conf->pause_time;
151412a4678aSShreyansh Jain 	net_fc->high_water = fc_conf->high_water;
151512a4678aSShreyansh Jain 	net_fc->low_water = fc_conf->low_water;
151612a4678aSShreyansh Jain 	net_fc->send_xon = fc_conf->send_xon;
151712a4678aSShreyansh Jain 	net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
151812a4678aSShreyansh Jain 	net_fc->mode = fc_conf->mode;
151912a4678aSShreyansh Jain 	net_fc->autoneg = fc_conf->autoneg;
152012a4678aSShreyansh Jain 
152112a4678aSShreyansh Jain 	return 0;
152212a4678aSShreyansh Jain }
152312a4678aSShreyansh Jain 
152412a4678aSShreyansh Jain static int
152512a4678aSShreyansh Jain dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
152612a4678aSShreyansh Jain 		   struct rte_eth_fc_conf *fc_conf)
152712a4678aSShreyansh Jain {
152812a4678aSShreyansh Jain 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
152912a4678aSShreyansh Jain 	struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
153012a4678aSShreyansh Jain 	int ret;
153112a4678aSShreyansh Jain 
153212a4678aSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
153312a4678aSShreyansh Jain 
153412a4678aSShreyansh Jain 	if (net_fc) {
153512a4678aSShreyansh Jain 		fc_conf->pause_time = net_fc->pause_time;
153612a4678aSShreyansh Jain 		fc_conf->high_water = net_fc->high_water;
153712a4678aSShreyansh Jain 		fc_conf->low_water = net_fc->low_water;
153812a4678aSShreyansh Jain 		fc_conf->send_xon = net_fc->send_xon;
153912a4678aSShreyansh Jain 		fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
154012a4678aSShreyansh Jain 		fc_conf->mode = net_fc->mode;
154112a4678aSShreyansh Jain 		fc_conf->autoneg = net_fc->autoneg;
154212a4678aSShreyansh Jain 		return 0;
154312a4678aSShreyansh Jain 	}
15446b10d1f7SNipun Gupta 	ret = fman_if_get_fc_threshold(dev->process_private);
154512a4678aSShreyansh Jain 	if (ret) {
1546295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_TX_PAUSE;
15476b10d1f7SNipun Gupta 		fc_conf->pause_time =
15486b10d1f7SNipun Gupta 			fman_if_get_fc_quanta(dev->process_private);
154912a4678aSShreyansh Jain 	} else {
1550295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_NONE;
155112a4678aSShreyansh Jain 	}
155212a4678aSShreyansh Jain 
155312a4678aSShreyansh Jain 	return 0;
155412a4678aSShreyansh Jain }
155512a4678aSShreyansh Jain 
155612a4678aSShreyansh Jain static int
1557fe6c6032SShreyansh Jain dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
15586d13ea8eSOlivier Matz 			     struct rte_ether_addr *addr,
1559fe6c6032SShreyansh Jain 			     uint32_t index,
1560fe6c6032SShreyansh Jain 			     __rte_unused uint32_t pool)
1561fe6c6032SShreyansh Jain {
1562fe6c6032SShreyansh Jain 	int ret;
1563a0edbb8aSRohit Raj 	struct fman_if *fif = dev->process_private;
1564fe6c6032SShreyansh Jain 
1565fe6c6032SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1566fe6c6032SShreyansh Jain 
15677e5f49aeSRohit Raj 	if (fif->mac_type == fman_offline_internal) {
1568a0edbb8aSRohit Raj 		DPAA_PMD_DEBUG("Add MAC Address not supported on O/H port");
1569a0edbb8aSRohit Raj 		return 0;
1570a0edbb8aSRohit Raj 	}
1571a0edbb8aSRohit Raj 
15727e5f49aeSRohit Raj 	if (fif->mac_type == fman_onic) {
15737e5f49aeSRohit Raj 		DPAA_PMD_INFO("Add MAC Address not supported on ONIC port");
15747e5f49aeSRohit Raj 		return 0;
15757e5f49aeSRohit Raj 	}
15767e5f49aeSRohit Raj 
15776b10d1f7SNipun Gupta 	ret = fman_if_add_mac_addr(dev->process_private,
15786b10d1f7SNipun Gupta 				   addr->addr_bytes, index);
1579fe6c6032SShreyansh Jain 
1580fe6c6032SShreyansh Jain 	if (ret)
1581b7c7ff6eSStephen Hemminger 		DPAA_PMD_ERR("Adding the MAC ADDR failed: err = %d", ret);
1582fe6c6032SShreyansh Jain 	return 0;
1583fe6c6032SShreyansh Jain }
1584fe6c6032SShreyansh Jain 
1585fe6c6032SShreyansh Jain static void
1586fe6c6032SShreyansh Jain dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
1587fe6c6032SShreyansh Jain 			  uint32_t index)
1588fe6c6032SShreyansh Jain {
1589a0edbb8aSRohit Raj 	struct fman_if *fif = dev->process_private;
1590a0edbb8aSRohit Raj 
1591fe6c6032SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1592fe6c6032SShreyansh Jain 
15937e5f49aeSRohit Raj 	if (fif->mac_type == fman_offline_internal) {
1594a0edbb8aSRohit Raj 		DPAA_PMD_DEBUG("Remove MAC Address not supported on O/H port");
1595a0edbb8aSRohit Raj 		return;
1596a0edbb8aSRohit Raj 	}
1597a0edbb8aSRohit Raj 
15987e5f49aeSRohit Raj 	if (fif->mac_type == fman_onic) {
15997e5f49aeSRohit Raj 		DPAA_PMD_INFO("Remove MAC Address not supported on ONIC port");
16007e5f49aeSRohit Raj 		return;
16017e5f49aeSRohit Raj 	}
16027e5f49aeSRohit Raj 
16036b10d1f7SNipun Gupta 	fman_if_clear_mac_addr(dev->process_private, index);
1604fe6c6032SShreyansh Jain }
1605fe6c6032SShreyansh Jain 
1606caccf8b3SOlivier Matz static int
1607fe6c6032SShreyansh Jain dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
16086d13ea8eSOlivier Matz 		       struct rte_ether_addr *addr)
1609fe6c6032SShreyansh Jain {
1610fe6c6032SShreyansh Jain 	int ret;
1611a0edbb8aSRohit Raj 	struct fman_if *fif = dev->process_private;
1612fe6c6032SShreyansh Jain 
1613fe6c6032SShreyansh Jain 	PMD_INIT_FUNC_TRACE();
1614fe6c6032SShreyansh Jain 
16157e5f49aeSRohit Raj 	if (fif->mac_type == fman_offline_internal) {
1616a0edbb8aSRohit Raj 		DPAA_PMD_DEBUG("Set MAC Address not supported on O/H port");
1617a0edbb8aSRohit Raj 		return 0;
1618a0edbb8aSRohit Raj 	}
1619a0edbb8aSRohit Raj 
16207e5f49aeSRohit Raj 	if (fif->mac_type == fman_onic) {
16217e5f49aeSRohit Raj 		DPAA_PMD_INFO("Set MAC Address not supported on ONIC port");
16227e5f49aeSRohit Raj 		return 0;
16237e5f49aeSRohit Raj 	}
16247e5f49aeSRohit Raj 
16256b10d1f7SNipun Gupta 	ret = fman_if_add_mac_addr(dev->process_private, addr->addr_bytes, 0);
1626fe6c6032SShreyansh Jain 	if (ret)
1627b7c7ff6eSStephen Hemminger 		DPAA_PMD_ERR("Setting the MAC ADDR failed %d", ret);
1628caccf8b3SOlivier Matz 
1629caccf8b3SOlivier Matz 	return ret;
1630fe6c6032SShreyansh Jain }
1631fe6c6032SShreyansh Jain 
1632627e677dSSachin Saxena static int
1633627e677dSSachin Saxena dpaa_dev_rss_hash_update(struct rte_eth_dev *dev,
1634627e677dSSachin Saxena 			 struct rte_eth_rss_conf *rss_conf)
1635627e677dSSachin Saxena {
1636627e677dSSachin Saxena 	struct rte_eth_dev_data *data = dev->data;
1637627e677dSSachin Saxena 	struct rte_eth_conf *eth_conf = &data->dev_conf;
1638627e677dSSachin Saxena 
1639627e677dSSachin Saxena 	PMD_INIT_FUNC_TRACE();
1640627e677dSSachin Saxena 
1641627e677dSSachin Saxena 	if (!(default_q || fmc_q)) {
1642627e677dSSachin Saxena 		if (dpaa_fm_config(dev, rss_conf->rss_hf)) {
16431ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("FM port configuration: Failed");
1644627e677dSSachin Saxena 			return -1;
1645627e677dSSachin Saxena 		}
1646627e677dSSachin Saxena 		eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1647627e677dSSachin Saxena 	} else {
16481ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Function not supported");
1649627e677dSSachin Saxena 		return -ENOTSUP;
1650627e677dSSachin Saxena 	}
1651627e677dSSachin Saxena 	return 0;
1652627e677dSSachin Saxena }
1653627e677dSSachin Saxena 
1654627e677dSSachin Saxena static int
1655627e677dSSachin Saxena dpaa_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1656627e677dSSachin Saxena 			   struct rte_eth_rss_conf *rss_conf)
1657627e677dSSachin Saxena {
1658627e677dSSachin Saxena 	struct rte_eth_dev_data *data = dev->data;
1659627e677dSSachin Saxena 	struct rte_eth_conf *eth_conf = &data->dev_conf;
1660627e677dSSachin Saxena 
1661627e677dSSachin Saxena 	/* dpaa does not support rss_key, so length should be 0*/
1662627e677dSSachin Saxena 	rss_conf->rss_key_len = 0;
1663627e677dSSachin Saxena 	rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1664627e677dSSachin Saxena 	return 0;
1665627e677dSSachin Saxena }
1666627e677dSSachin Saxena 
1667b1b5d6c9SNipun Gupta static int dpaa_dev_queue_intr_enable(struct rte_eth_dev *dev,
1668b1b5d6c9SNipun Gupta 				      uint16_t queue_id)
1669b1b5d6c9SNipun Gupta {
1670b1b5d6c9SNipun Gupta 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
1671b1b5d6c9SNipun Gupta 	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
1672b1b5d6c9SNipun Gupta 
1673b1b5d6c9SNipun Gupta 	if (!rxq->is_static)
1674b1b5d6c9SNipun Gupta 		return -EINVAL;
1675b1b5d6c9SNipun Gupta 
1676b1b5d6c9SNipun Gupta 	return qman_fq_portal_irqsource_add(rxq->qp, QM_PIRQ_DQRI);
1677b1b5d6c9SNipun Gupta }
1678b1b5d6c9SNipun Gupta 
1679b1b5d6c9SNipun Gupta static int dpaa_dev_queue_intr_disable(struct rte_eth_dev *dev,
1680b1b5d6c9SNipun Gupta 				       uint16_t queue_id)
1681b1b5d6c9SNipun Gupta {
1682b1b5d6c9SNipun Gupta 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
1683b1b5d6c9SNipun Gupta 	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
1684b1b5d6c9SNipun Gupta 	uint32_t temp;
1685b1b5d6c9SNipun Gupta 	ssize_t temp1;
1686b1b5d6c9SNipun Gupta 
1687b1b5d6c9SNipun Gupta 	if (!rxq->is_static)
1688b1b5d6c9SNipun Gupta 		return -EINVAL;
1689b1b5d6c9SNipun Gupta 
1690b1b5d6c9SNipun Gupta 	qman_fq_portal_irqsource_remove(rxq->qp, ~0);
1691b1b5d6c9SNipun Gupta 
1692b1b5d6c9SNipun Gupta 	temp1 = read(rxq->q_fd, &temp, sizeof(temp));
1693b1b5d6c9SNipun Gupta 	if (temp1 != sizeof(temp))
169405500852SVanshika Shukla 		DPAA_PMD_DEBUG("read did not return anything");
1695b1b5d6c9SNipun Gupta 
1696b1b5d6c9SNipun Gupta 	qman_fq_portal_thread_irq(rxq->qp);
1697b1b5d6c9SNipun Gupta 
1698b1b5d6c9SNipun Gupta 	return 0;
1699b1b5d6c9SNipun Gupta }
1700b1b5d6c9SNipun Gupta 
17012cf9264fSHemant Agrawal static void
17022cf9264fSHemant Agrawal dpaa_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
17032cf9264fSHemant Agrawal 	struct rte_eth_rxq_info *qinfo)
17042cf9264fSHemant Agrawal {
17052cf9264fSHemant Agrawal 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
17062cf9264fSHemant Agrawal 	struct qman_fq *rxq;
1707378cd488SHemant Agrawal 	int ret;
17082cf9264fSHemant Agrawal 
17092cf9264fSHemant Agrawal 	rxq = dev->data->rx_queues[queue_id];
17102cf9264fSHemant Agrawal 
17112cf9264fSHemant Agrawal 	qinfo->mp = dpaa_intf->bp_info->mp;
17122cf9264fSHemant Agrawal 	qinfo->scattered_rx = dev->data->scattered_rx;
17132cf9264fSHemant Agrawal 	qinfo->nb_desc = rxq->nb_desc;
1714378cd488SHemant Agrawal 
1715378cd488SHemant Agrawal 	/* Report the HW Rx buffer length to user */
1716378cd488SHemant Agrawal 	ret = fman_if_get_maxfrm(dev->process_private);
1717378cd488SHemant Agrawal 	if (ret > 0)
1718378cd488SHemant Agrawal 		qinfo->rx_buf_size = ret;
1719378cd488SHemant Agrawal 
17202cf9264fSHemant Agrawal 	qinfo->conf.rx_free_thresh = 1;
17212cf9264fSHemant Agrawal 	qinfo->conf.rx_drop_en = 1;
17222cf9264fSHemant Agrawal 	qinfo->conf.rx_deferred_start = 0;
17232cf9264fSHemant Agrawal 	qinfo->conf.offloads = rxq->offloads;
17242cf9264fSHemant Agrawal }
17252cf9264fSHemant Agrawal 
17262cf9264fSHemant Agrawal static void
17272cf9264fSHemant Agrawal dpaa_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
17282cf9264fSHemant Agrawal 	struct rte_eth_txq_info *qinfo)
17292cf9264fSHemant Agrawal {
17302cf9264fSHemant Agrawal 	struct qman_fq *txq;
17312cf9264fSHemant Agrawal 
17322cf9264fSHemant Agrawal 	txq = dev->data->tx_queues[queue_id];
17332cf9264fSHemant Agrawal 
17342cf9264fSHemant Agrawal 	qinfo->nb_desc = txq->nb_desc;
17352cf9264fSHemant Agrawal 	qinfo->conf.tx_thresh.pthresh = 0;
17362cf9264fSHemant Agrawal 	qinfo->conf.tx_thresh.hthresh = 0;
17372cf9264fSHemant Agrawal 	qinfo->conf.tx_thresh.wthresh = 0;
17382cf9264fSHemant Agrawal 
17392cf9264fSHemant Agrawal 	qinfo->conf.tx_free_thresh = 0;
17402cf9264fSHemant Agrawal 	qinfo->conf.tx_rs_thresh = 0;
17412cf9264fSHemant Agrawal 	qinfo->conf.offloads = txq->offloads;
17422cf9264fSHemant Agrawal 	qinfo->conf.tx_deferred_start = 0;
17432cf9264fSHemant Agrawal }
17442cf9264fSHemant Agrawal 
1745ff9e112dSShreyansh Jain static struct eth_dev_ops dpaa_devops = {
1746ff9e112dSShreyansh Jain 	.dev_configure		  = dpaa_eth_dev_configure,
1747ff9e112dSShreyansh Jain 	.dev_start		  = dpaa_eth_dev_start,
1748ff9e112dSShreyansh Jain 	.dev_stop		  = dpaa_eth_dev_stop,
1749ff9e112dSShreyansh Jain 	.dev_close		  = dpaa_eth_dev_close,
1750799db456SShreyansh Jain 	.dev_infos_get		  = dpaa_eth_dev_info,
1751a7bdc3bdSShreyansh Jain 	.dev_supported_ptypes_get = dpaa_supported_ptypes_get,
175237f9b54bSShreyansh Jain 
175337f9b54bSShreyansh Jain 	.rx_queue_setup		  = dpaa_eth_rx_queue_setup,
175437f9b54bSShreyansh Jain 	.tx_queue_setup		  = dpaa_eth_tx_queue_setup,
17552e6f5657SApeksha Gupta 	.rx_burst_mode_get	  = dpaa_dev_rx_burst_mode_get,
17562e6f5657SApeksha Gupta 	.tx_burst_mode_get	  = dpaa_dev_tx_burst_mode_get,
17572cf9264fSHemant Agrawal 	.rxq_info_get		  = dpaa_rxq_info_get,
17582cf9264fSHemant Agrawal 	.txq_info_get		  = dpaa_txq_info_get,
17592cf9264fSHemant Agrawal 
176012a4678aSShreyansh Jain 	.flow_ctrl_get		  = dpaa_flow_ctrl_get,
176112a4678aSShreyansh Jain 	.flow_ctrl_set		  = dpaa_flow_ctrl_set,
176212a4678aSShreyansh Jain 
1763e124a69fSShreyansh Jain 	.link_update		  = dpaa_eth_link_update,
1764e1ad3a05SShreyansh Jain 	.stats_get		  = dpaa_eth_stats_get,
1765b21ed3e2SHemant Agrawal 	.xstats_get		  = dpaa_dev_xstats_get,
1766b21ed3e2SHemant Agrawal 	.xstats_get_by_id	  = dpaa_xstats_get_by_id,
1767b21ed3e2SHemant Agrawal 	.xstats_get_names_by_id	  = dpaa_xstats_get_names_by_id,
1768b21ed3e2SHemant Agrawal 	.xstats_get_names	  = dpaa_xstats_get_names,
1769b21ed3e2SHemant Agrawal 	.xstats_reset		  = dpaa_eth_stats_reset,
1770e1ad3a05SShreyansh Jain 	.stats_reset		  = dpaa_eth_stats_reset,
177195ef603dSShreyansh Jain 	.promiscuous_enable	  = dpaa_eth_promiscuous_enable,
177295ef603dSShreyansh Jain 	.promiscuous_disable	  = dpaa_eth_promiscuous_disable,
177344dd70a3SShreyansh Jain 	.allmulticast_enable	  = dpaa_eth_multicast_enable,
177444dd70a3SShreyansh Jain 	.allmulticast_disable	  = dpaa_eth_multicast_disable,
17750cbec027SShreyansh Jain 	.mtu_set		  = dpaa_mtu_set,
1776e124a69fSShreyansh Jain 	.dev_set_link_down	  = dpaa_link_down,
1777e124a69fSShreyansh Jain 	.dev_set_link_up	  = dpaa_link_up,
1778fe6c6032SShreyansh Jain 	.mac_addr_add		  = dpaa_dev_add_mac_addr,
1779fe6c6032SShreyansh Jain 	.mac_addr_remove	  = dpaa_dev_remove_mac_addr,
1780fe6c6032SShreyansh Jain 	.mac_addr_set		  = dpaa_dev_set_mac_addr,
1781fe6c6032SShreyansh Jain 
1782cf0fab1dSHemant Agrawal 	.fw_version_get		  = dpaa_fw_version_get,
1783b1b5d6c9SNipun Gupta 
1784b1b5d6c9SNipun Gupta 	.rx_queue_intr_enable	  = dpaa_dev_queue_intr_enable,
1785b1b5d6c9SNipun Gupta 	.rx_queue_intr_disable	  = dpaa_dev_queue_intr_disable,
1786627e677dSSachin Saxena 	.rss_hash_update	  = dpaa_dev_rss_hash_update,
1787627e677dSSachin Saxena 	.rss_hash_conf_get        = dpaa_dev_rss_hash_conf_get,
178873585446SVanshika Shukla 	.timesync_enable	  = dpaa_timesync_enable,
178973585446SVanshika Shukla 	.timesync_disable	  = dpaa_timesync_disable,
179073585446SVanshika Shukla 	.timesync_read_time	  = dpaa_timesync_read_time,
179173585446SVanshika Shukla 	.timesync_write_time	  = dpaa_timesync_write_time,
179273585446SVanshika Shukla 	.timesync_adjust_time	  = dpaa_timesync_adjust_time,
1793615352f5SVanshika Shukla 	.timesync_read_rx_timestamp = dpaa_timesync_read_rx_timestamp,
1794615352f5SVanshika Shukla 	.timesync_read_tx_timestamp = dpaa_timesync_read_tx_timestamp,
1795ff9e112dSShreyansh Jain };
1796ff9e112dSShreyansh Jain 
17978c3495f5SHemant Agrawal static bool
17988c3495f5SHemant Agrawal is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
17998c3495f5SHemant Agrawal {
18008c3495f5SHemant Agrawal 	if (strcmp(dev->device->driver->name,
18018c3495f5SHemant Agrawal 		   drv->driver.name))
18028c3495f5SHemant Agrawal 		return false;
18038c3495f5SHemant Agrawal 
18048c3495f5SHemant Agrawal 	return true;
18058c3495f5SHemant Agrawal }
18068c3495f5SHemant Agrawal 
18078c3495f5SHemant Agrawal static bool
18088c3495f5SHemant Agrawal is_dpaa_supported(struct rte_eth_dev *dev)
18098c3495f5SHemant Agrawal {
18108c3495f5SHemant Agrawal 	return is_device_supported(dev, &rte_dpaa_pmd);
18118c3495f5SHemant Agrawal }
18128c3495f5SHemant Agrawal 
18131e06b6dcSHemant Agrawal int
1814ae8f4cf3SFerruh Yigit rte_pmd_dpaa_set_tx_loopback(uint16_t port, uint8_t on)
18158c3495f5SHemant Agrawal {
18168c3495f5SHemant Agrawal 	struct rte_eth_dev *dev;
18178c3495f5SHemant Agrawal 
18188c3495f5SHemant Agrawal 	RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
18198c3495f5SHemant Agrawal 
18208c3495f5SHemant Agrawal 	dev = &rte_eth_devices[port];
18218c3495f5SHemant Agrawal 
18228c3495f5SHemant Agrawal 	if (!is_dpaa_supported(dev))
18238c3495f5SHemant Agrawal 		return -ENOTSUP;
18248c3495f5SHemant Agrawal 
18258c3495f5SHemant Agrawal 	if (on)
18266b10d1f7SNipun Gupta 		fman_if_loopback_enable(dev->process_private);
18278c3495f5SHemant Agrawal 	else
18286b10d1f7SNipun Gupta 		fman_if_loopback_disable(dev->process_private);
18298c3495f5SHemant Agrawal 
18308c3495f5SHemant Agrawal 	return 0;
18318c3495f5SHemant Agrawal }
18328c3495f5SHemant Agrawal 
18336b10d1f7SNipun Gupta static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf,
18346b10d1f7SNipun Gupta 			       struct fman_if *fman_intf)
183512a4678aSShreyansh Jain {
183612a4678aSShreyansh Jain 	struct rte_eth_fc_conf *fc_conf;
183712a4678aSShreyansh Jain 	int ret;
183812a4678aSShreyansh Jain 
183912a4678aSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
184012a4678aSShreyansh Jain 
184112a4678aSShreyansh Jain 	if (!(dpaa_intf->fc_conf)) {
184212a4678aSShreyansh Jain 		dpaa_intf->fc_conf = rte_zmalloc(NULL,
184312a4678aSShreyansh Jain 			sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
184412a4678aSShreyansh Jain 		if (!dpaa_intf->fc_conf) {
184512a4678aSShreyansh Jain 			DPAA_PMD_ERR("unable to save flow control info");
184612a4678aSShreyansh Jain 			return -ENOMEM;
184712a4678aSShreyansh Jain 		}
184812a4678aSShreyansh Jain 	}
184912a4678aSShreyansh Jain 	fc_conf = dpaa_intf->fc_conf;
18506b10d1f7SNipun Gupta 	ret = fman_if_get_fc_threshold(fman_intf);
185112a4678aSShreyansh Jain 	if (ret) {
1852295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_TX_PAUSE;
18536b10d1f7SNipun Gupta 		fc_conf->pause_time = fman_if_get_fc_quanta(fman_intf);
185412a4678aSShreyansh Jain 	} else {
1855295968d1SFerruh Yigit 		fc_conf->mode = RTE_ETH_FC_NONE;
185612a4678aSShreyansh Jain 	}
185712a4678aSShreyansh Jain 
185812a4678aSShreyansh Jain 	return 0;
185912a4678aSShreyansh Jain }
186012a4678aSShreyansh Jain 
186137f9b54bSShreyansh Jain /* Initialise an Rx FQ */
186262f53995SHemant Agrawal static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
186337f9b54bSShreyansh Jain 			      uint32_t fqid)
186437f9b54bSShreyansh Jain {
18658d804cf1SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
186637f9b54bSShreyansh Jain 	int ret;
1867f04e7139SHemant Agrawal 	u32 flags = QMAN_FQ_FLAG_NO_ENQUEUE;
186862f53995SHemant Agrawal 	struct qm_mcc_initcgr cgr_opts = {
186962f53995SHemant Agrawal 		.we_mask = QM_CGR_WE_CS_THRES |
187062f53995SHemant Agrawal 				QM_CGR_WE_CSTD_EN |
187162f53995SHemant Agrawal 				QM_CGR_WE_MODE,
187262f53995SHemant Agrawal 		.cgr = {
187362f53995SHemant Agrawal 			.cstd_en = QM_CGR_EN,
187462f53995SHemant Agrawal 			.mode = QMAN_CGR_MODE_FRAME
187562f53995SHemant Agrawal 		}
187662f53995SHemant Agrawal 	};
187737f9b54bSShreyansh Jain 
18784defbc8cSSachin Saxena 	if (fmc_q || default_q) {
187937f9b54bSShreyansh Jain 		ret = qman_reserve_fqid(fqid);
188037f9b54bSShreyansh Jain 		if (ret) {
18814defbc8cSSachin Saxena 			DPAA_PMD_ERR("reserve rx fqid 0x%x failed, ret: %d",
188237f9b54bSShreyansh Jain 				     fqid, ret);
188337f9b54bSShreyansh Jain 			return -EINVAL;
188437f9b54bSShreyansh Jain 		}
1885f04e7139SHemant Agrawal 	}
18864defbc8cSSachin Saxena 
18878d6fc8b6SHemant Agrawal 	DPAA_PMD_DEBUG("creating rx fq %p, fqid 0x%x", fq, fqid);
1888f04e7139SHemant Agrawal 	ret = qman_create_fq(fqid, flags, fq);
188937f9b54bSShreyansh Jain 	if (ret) {
18906fd3639aSHemant Agrawal 		DPAA_PMD_ERR("create rx fqid 0x%x failed with ret: %d",
189137f9b54bSShreyansh Jain 			fqid, ret);
189237f9b54bSShreyansh Jain 		return ret;
189337f9b54bSShreyansh Jain 	}
18940c504f69SHemant Agrawal 	fq->is_static = false;
18955e745593SSunil Kumar Kori 
18965e745593SSunil Kumar Kori 	dpaa_poll_queue_default_config(&opts);
189737f9b54bSShreyansh Jain 
189862f53995SHemant Agrawal 	if (cgr_rx) {
189962f53995SHemant Agrawal 		/* Enable tail drop with cgr on this queue */
190062f53995SHemant Agrawal 		qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
190162f53995SHemant Agrawal 		cgr_rx->cb = NULL;
190262f53995SHemant Agrawal 		ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
190362f53995SHemant Agrawal 				      &cgr_opts);
190462f53995SHemant Agrawal 		if (ret) {
190562f53995SHemant Agrawal 			DPAA_PMD_WARN(
19068d6fc8b6SHemant Agrawal 				"rx taildrop init fail on rx fqid 0x%x(ret=%d)",
1907f04e7139SHemant Agrawal 				fq->fqid, ret);
190862f53995SHemant Agrawal 			goto without_cgr;
190962f53995SHemant Agrawal 		}
191062f53995SHemant Agrawal 		opts.we_mask |= QM_INITFQ_WE_CGID;
191162f53995SHemant Agrawal 		opts.fqd.cgid = cgr_rx->cgrid;
191262f53995SHemant Agrawal 		opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
191362f53995SHemant Agrawal 	}
191462f53995SHemant Agrawal without_cgr:
1915f04e7139SHemant Agrawal 	ret = qman_init_fq(fq, 0, &opts);
191637f9b54bSShreyansh Jain 	if (ret)
19178d6fc8b6SHemant Agrawal 		DPAA_PMD_ERR("init rx fqid 0x%x failed with ret:%d", fqid, ret);
191837f9b54bSShreyansh Jain 	return ret;
191937f9b54bSShreyansh Jain }
192037f9b54bSShreyansh Jain 
1921a0edbb8aSRohit Raj uint8_t fm_default_vsp_id(struct fman_if *fif)
1922a0edbb8aSRohit Raj {
1923a0edbb8aSRohit Raj 	/* Avoid being same as base profile which could be used
1924a0edbb8aSRohit Raj 	 * for kernel interface of shared mac.
1925a0edbb8aSRohit Raj 	 */
1926a0edbb8aSRohit Raj 	if (fif->base_profile_id)
1927a0edbb8aSRohit Raj 		return 0;
1928a0edbb8aSRohit Raj 	else
1929a0edbb8aSRohit Raj 		return DPAA_DEFAULT_RXQ_VSP_ID;
1930a0edbb8aSRohit Raj }
1931a0edbb8aSRohit Raj 
193237f9b54bSShreyansh Jain /* Initialise a Tx FQ */
193337f9b54bSShreyansh Jain static int dpaa_tx_queue_init(struct qman_fq *fq,
19349124e65dSGagandeep Singh 			      struct fman_if *fman_intf,
19359124e65dSGagandeep Singh 			      struct qman_cgr *cgr_tx)
193637f9b54bSShreyansh Jain {
19378d804cf1SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
19389124e65dSGagandeep Singh 	struct qm_mcc_initcgr cgr_opts = {
19399124e65dSGagandeep Singh 		.we_mask = QM_CGR_WE_CS_THRES |
19409124e65dSGagandeep Singh 				QM_CGR_WE_CSTD_EN |
19419124e65dSGagandeep Singh 				QM_CGR_WE_MODE,
19429124e65dSGagandeep Singh 		.cgr = {
19439124e65dSGagandeep Singh 			.cstd_en = QM_CGR_EN,
19449124e65dSGagandeep Singh 			.mode = QMAN_CGR_MODE_FRAME
19459124e65dSGagandeep Singh 		}
19469124e65dSGagandeep Singh 	};
194737f9b54bSShreyansh Jain 	int ret;
194837f9b54bSShreyansh Jain 
194937f9b54bSShreyansh Jain 	ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
195037f9b54bSShreyansh Jain 			     QMAN_FQ_FLAG_TO_DCPORTAL, fq);
195137f9b54bSShreyansh Jain 	if (ret) {
195237f9b54bSShreyansh Jain 		DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
195337f9b54bSShreyansh Jain 		return ret;
195437f9b54bSShreyansh Jain 	}
195537f9b54bSShreyansh Jain 	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
195637f9b54bSShreyansh Jain 		       QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
195737f9b54bSShreyansh Jain 	opts.fqd.dest.channel = fman_intf->tx_channel_id;
195837f9b54bSShreyansh Jain 	opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
195937f9b54bSShreyansh Jain 	opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
196037f9b54bSShreyansh Jain 	opts.fqd.context_b = 0;
196158e0420fSVanshika Shukla 	if (dpaa_ieee_1588) {
196258e0420fSVanshika Shukla 		opts.fqd.context_a.lo = 0;
196358e0420fSVanshika Shukla 		opts.fqd.context_a.hi = fman_dealloc_bufs_mask_hi;
196458e0420fSVanshika Shukla 	} else {
196537f9b54bSShreyansh Jain 		/* no tx-confirmation */
196658e0420fSVanshika Shukla 		opts.fqd.context_a.lo = fman_dealloc_bufs_mask_lo;
1967a0edbb8aSRohit Raj 		opts.fqd.context_a.hi = DPAA_FQD_CTX_A_OVERRIDE_FQ |
1968a0edbb8aSRohit Raj 					fman_dealloc_bufs_mask_hi;
196958e0420fSVanshika Shukla 	}
197058e0420fSVanshika Shukla 
1971a0edbb8aSRohit Raj 	if (fman_ip_rev >= FMAN_V3)
197272e9e0c9SNipun Gupta 		/* Set B0V bit in contextA to set ASPID to 0 */
1973a0edbb8aSRohit Raj 		opts.fqd.context_a.hi |= DPAA_FQD_CTX_A_B0_FIELD_VALID;
1974a0edbb8aSRohit Raj 
19757e5f49aeSRohit Raj 	if (fman_intf->mac_type == fman_offline_internal ||
19767e5f49aeSRohit Raj 	    fman_intf->mac_type == fman_onic) {
1977a0edbb8aSRohit Raj 		opts.fqd.context_a.lo |= DPAA_FQD_CTX_A2_VSPE_BIT;
1978a0edbb8aSRohit Raj 		opts.fqd.context_b = fm_default_vsp_id(fman_intf) <<
1979a0edbb8aSRohit Raj 				     DPAA_FQD_CTX_B_SHIFT_BITS;
198072e9e0c9SNipun Gupta 	}
1981a0edbb8aSRohit Raj 
19828d6fc8b6SHemant Agrawal 	DPAA_PMD_DEBUG("init tx fq %p, fqid 0x%x", fq, fq->fqid);
19839124e65dSGagandeep Singh 
19849124e65dSGagandeep Singh 	if (cgr_tx) {
19859124e65dSGagandeep Singh 		/* Enable tail drop with cgr on this queue */
19869124e65dSGagandeep Singh 		qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres,
19879124e65dSGagandeep Singh 				      td_tx_threshold, 0);
19889124e65dSGagandeep Singh 		cgr_tx->cb = NULL;
19899124e65dSGagandeep Singh 		ret = qman_create_cgr(cgr_tx, QMAN_CGR_FLAG_USE_INIT,
19909124e65dSGagandeep Singh 				      &cgr_opts);
19919124e65dSGagandeep Singh 		if (ret) {
19929124e65dSGagandeep Singh 			DPAA_PMD_WARN(
19939124e65dSGagandeep Singh 				"rx taildrop init fail on rx fqid 0x%x(ret=%d)",
19949124e65dSGagandeep Singh 				fq->fqid, ret);
19959124e65dSGagandeep Singh 			goto without_cgr;
19969124e65dSGagandeep Singh 		}
19979124e65dSGagandeep Singh 		opts.we_mask |= QM_INITFQ_WE_CGID;
19989124e65dSGagandeep Singh 		opts.fqd.cgid = cgr_tx->cgrid;
19999124e65dSGagandeep Singh 		opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
20001ec9a3afSHemant Agrawal 		DPAA_PMD_DEBUG("Tx FQ tail drop enabled, threshold = %d",
20019124e65dSGagandeep Singh 				td_tx_threshold);
20029124e65dSGagandeep Singh 	}
20039124e65dSGagandeep Singh without_cgr:
200437f9b54bSShreyansh Jain 	ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
200537f9b54bSShreyansh Jain 	if (ret)
20068d6fc8b6SHemant Agrawal 		DPAA_PMD_ERR("init tx fqid 0x%x failed %d", fq->fqid, ret);
200737f9b54bSShreyansh Jain 	return ret;
200837f9b54bSShreyansh Jain }
200937f9b54bSShreyansh Jain 
2010d11482d9SVanshika Shukla static int
2011d11482d9SVanshika Shukla dpaa_tx_conf_queue_init(struct qman_fq *fq)
2012d11482d9SVanshika Shukla {
2013d11482d9SVanshika Shukla 	struct qm_mcc_initfq opts = {0};
2014d11482d9SVanshika Shukla 	int ret;
2015d11482d9SVanshika Shukla 
2016d11482d9SVanshika Shukla 	PMD_INIT_FUNC_TRACE();
2017d11482d9SVanshika Shukla 
2018d11482d9SVanshika Shukla 	ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID, fq);
2019d11482d9SVanshika Shukla 	if (ret) {
2020d11482d9SVanshika Shukla 		DPAA_PMD_ERR("create Tx_conf failed with ret: %d", ret);
2021d11482d9SVanshika Shukla 		return ret;
2022d11482d9SVanshika Shukla 	}
2023d11482d9SVanshika Shukla 
2024d11482d9SVanshika Shukla 	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
2025d11482d9SVanshika Shukla 	opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
2026d11482d9SVanshika Shukla 	ret = qman_init_fq(fq, 0, &opts);
2027d11482d9SVanshika Shukla 	if (ret)
2028d11482d9SVanshika Shukla 		DPAA_PMD_ERR("init Tx_conf fqid %d failed with ret: %d",
2029d11482d9SVanshika Shukla 			fq->fqid, ret);
2030d11482d9SVanshika Shukla 	return ret;
2031d11482d9SVanshika Shukla }
2032d11482d9SVanshika Shukla 
20339e97abf2SJun Yang #if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER)
2034d11482d9SVanshika Shukla /* Initialise a DEBUG FQ ([rt]x_error, rx_default) */
203558e0420fSVanshika Shukla static int dpaa_def_queue_init(struct qman_fq *fq, uint32_t fqid)
203605ba55bcSShreyansh Jain {
20378d804cf1SHemant Agrawal 	struct qm_mcc_initfq opts = {0};
203805ba55bcSShreyansh Jain 	int ret;
203905ba55bcSShreyansh Jain 
204005ba55bcSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
204105ba55bcSShreyansh Jain 
204205ba55bcSShreyansh Jain 	ret = qman_reserve_fqid(fqid);
204305ba55bcSShreyansh Jain 	if (ret) {
204458e0420fSVanshika Shukla 		DPAA_PMD_ERR("Reserve fqid %d failed with ret: %d",
204505ba55bcSShreyansh Jain 			fqid, ret);
204605ba55bcSShreyansh Jain 		return -EINVAL;
204705ba55bcSShreyansh Jain 	}
204805ba55bcSShreyansh Jain 	/* "map" this Rx FQ to one of the interfaces Tx FQID */
204958e0420fSVanshika Shukla 	DPAA_PMD_DEBUG("Creating fq %p, fqid %d", fq, fqid);
205005ba55bcSShreyansh Jain 	ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
205105ba55bcSShreyansh Jain 	if (ret) {
205258e0420fSVanshika Shukla 		DPAA_PMD_ERR("create fqid %d failed with ret: %d",
205305ba55bcSShreyansh Jain 			fqid, ret);
205405ba55bcSShreyansh Jain 		return ret;
205505ba55bcSShreyansh Jain 	}
205605ba55bcSShreyansh Jain 	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
205705ba55bcSShreyansh Jain 	opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
205805ba55bcSShreyansh Jain 	ret = qman_init_fq(fq, 0, &opts);
205905ba55bcSShreyansh Jain 	if (ret)
206058e0420fSVanshika Shukla 		DPAA_PMD_ERR("init fqid %d failed with ret: %d",
206105ba55bcSShreyansh Jain 			    fqid, ret);
206205ba55bcSShreyansh Jain 	return ret;
206305ba55bcSShreyansh Jain }
20649e97abf2SJun Yang #endif
206505ba55bcSShreyansh Jain 
2066ff9e112dSShreyansh Jain /* Initialise a network interface */
2067ff9e112dSShreyansh Jain static int
20686b10d1f7SNipun Gupta dpaa_dev_init_secondary(struct rte_eth_dev *eth_dev)
20696b10d1f7SNipun Gupta {
20706b10d1f7SNipun Gupta 	struct rte_dpaa_device *dpaa_device;
20716b10d1f7SNipun Gupta 	struct fm_eth_port_cfg *cfg;
20726b10d1f7SNipun Gupta 	struct dpaa_if *dpaa_intf;
20736b10d1f7SNipun Gupta 	struct fman_if *fman_intf;
20746b10d1f7SNipun Gupta 	int dev_id;
20756b10d1f7SNipun Gupta 
20766b10d1f7SNipun Gupta 	PMD_INIT_FUNC_TRACE();
20776b10d1f7SNipun Gupta 
20786b10d1f7SNipun Gupta 	dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
20796b10d1f7SNipun Gupta 	dev_id = dpaa_device->id.dev_id;
20806b10d1f7SNipun Gupta 	cfg = dpaa_get_eth_port_cfg(dev_id);
20816b10d1f7SNipun Gupta 	fman_intf = cfg->fman_if;
20826b10d1f7SNipun Gupta 	eth_dev->process_private = fman_intf;
20836b10d1f7SNipun Gupta 
20846b10d1f7SNipun Gupta 	/* Plugging of UCODE burst API not supported in Secondary */
20856b10d1f7SNipun Gupta 	dpaa_intf = eth_dev->data->dev_private;
20866b10d1f7SNipun Gupta 	eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
20876b10d1f7SNipun Gupta 	if (dpaa_intf->cgr_tx)
20886b10d1f7SNipun Gupta 		eth_dev->tx_pkt_burst = dpaa_eth_queue_tx_slow;
20896b10d1f7SNipun Gupta 	else
20906b10d1f7SNipun Gupta 		eth_dev->tx_pkt_burst = dpaa_eth_queue_tx;
20916b10d1f7SNipun Gupta #ifdef CONFIG_FSL_QMAN_FQ_LOOKUP
20926b10d1f7SNipun Gupta 	qman_set_fq_lookup_table(
20936b10d1f7SNipun Gupta 		dpaa_intf->rx_queues->qman_fq_lookup_table);
20946b10d1f7SNipun Gupta #endif
20956b10d1f7SNipun Gupta 
20966b10d1f7SNipun Gupta 	return 0;
20976b10d1f7SNipun Gupta }
20986b10d1f7SNipun Gupta 
20999e97abf2SJun Yang #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
21009e97abf2SJun Yang static int
21019e97abf2SJun Yang dpaa_error_queue_init(struct dpaa_if *dpaa_intf,
21029e97abf2SJun Yang 	struct fman_if *fman_intf)
21039e97abf2SJun Yang {
21049e97abf2SJun Yang 	int i, ret;
21059e97abf2SJun Yang 	struct qman_fq *err_queues = dpaa_intf->debug_queues;
21069e97abf2SJun Yang 	uint32_t err_fqid = 0;
21079e97abf2SJun Yang 
21089e97abf2SJun Yang 	if (fman_intf->is_shared_mac) {
21099e97abf2SJun Yang 		DPAA_PMD_DEBUG("Shared MAC's err queues are handled in kernel");
21109e97abf2SJun Yang 		return 0;
21119e97abf2SJun Yang 	}
21129e97abf2SJun Yang 
21139e97abf2SJun Yang 	for (i = 0; i < DPAA_DEBUG_FQ_MAX_NUM; i++) {
21149e97abf2SJun Yang 		if (i == DPAA_DEBUG_FQ_RX_ERROR)
21159e97abf2SJun Yang 			err_fqid = fman_intf->fqid_rx_err;
21169e97abf2SJun Yang 		else if (i == DPAA_DEBUG_FQ_TX_ERROR)
21179e97abf2SJun Yang 			err_fqid = fman_intf->fqid_tx_err;
21189e97abf2SJun Yang 		else
21199e97abf2SJun Yang 			continue;
21209e97abf2SJun Yang 		ret = dpaa_def_queue_init(&err_queues[i], err_fqid);
21219e97abf2SJun Yang 		if (ret) {
21229e97abf2SJun Yang 			DPAA_PMD_ERR("DPAA %s ERROR queue init failed!",
21239e97abf2SJun Yang 				i == DPAA_DEBUG_FQ_RX_ERROR ?
21249e97abf2SJun Yang 				"RX" : "TX");
21259e97abf2SJun Yang 			return ret;
21269e97abf2SJun Yang 		}
21279e97abf2SJun Yang 		err_queues[i].dpaa_intf = dpaa_intf;
21289e97abf2SJun Yang 	}
21299e97abf2SJun Yang 
21309e97abf2SJun Yang 	return 0;
21319e97abf2SJun Yang }
21329e97abf2SJun Yang #endif
21339e97abf2SJun Yang 
213458e0420fSVanshika Shukla static int
213558e0420fSVanshika Shukla check_devargs_handler(__rte_unused const char *key, const char *value,
213658e0420fSVanshika Shukla 		      __rte_unused void *opaque)
213758e0420fSVanshika Shukla {
213858e0420fSVanshika Shukla 	if (strcmp(value, "1"))
213958e0420fSVanshika Shukla 		return -1;
214058e0420fSVanshika Shukla 
214158e0420fSVanshika Shukla 	return 0;
214258e0420fSVanshika Shukla }
214358e0420fSVanshika Shukla 
214458e0420fSVanshika Shukla static int
214558e0420fSVanshika Shukla dpaa_get_devargs(struct rte_devargs *devargs, const char *key)
214658e0420fSVanshika Shukla {
214758e0420fSVanshika Shukla 	struct rte_kvargs *kvlist;
214858e0420fSVanshika Shukla 
214958e0420fSVanshika Shukla 	if (!devargs)
215058e0420fSVanshika Shukla 		return 0;
215158e0420fSVanshika Shukla 
215258e0420fSVanshika Shukla 	kvlist = rte_kvargs_parse(devargs->args, NULL);
215358e0420fSVanshika Shukla 	if (!kvlist)
215458e0420fSVanshika Shukla 		return 0;
215558e0420fSVanshika Shukla 
215658e0420fSVanshika Shukla 	if (!rte_kvargs_count(kvlist, key)) {
215758e0420fSVanshika Shukla 		rte_kvargs_free(kvlist);
215858e0420fSVanshika Shukla 		return 0;
215958e0420fSVanshika Shukla 	}
216058e0420fSVanshika Shukla 
216158e0420fSVanshika Shukla 	if (rte_kvargs_process(kvlist, key,
216258e0420fSVanshika Shukla 			       check_devargs_handler, NULL) < 0) {
216358e0420fSVanshika Shukla 		rte_kvargs_free(kvlist);
216458e0420fSVanshika Shukla 		return 0;
216558e0420fSVanshika Shukla 	}
216658e0420fSVanshika Shukla 	rte_kvargs_free(kvlist);
216758e0420fSVanshika Shukla 
216858e0420fSVanshika Shukla 	return 1;
216958e0420fSVanshika Shukla }
217058e0420fSVanshika Shukla 
21716b10d1f7SNipun Gupta /* Initialise a network interface */
21726b10d1f7SNipun Gupta static int
2173ff9e112dSShreyansh Jain dpaa_dev_init(struct rte_eth_dev *eth_dev)
2174ff9e112dSShreyansh Jain {
2175af2828cfSAkhil Goyal 	int num_rx_fqs, fqid;
217637f9b54bSShreyansh Jain 	int loop, ret = 0;
2177ff9e112dSShreyansh Jain 	int dev_id;
2178ff9e112dSShreyansh Jain 	struct rte_dpaa_device *dpaa_device;
2179ff9e112dSShreyansh Jain 	struct dpaa_if *dpaa_intf;
218037f9b54bSShreyansh Jain 	struct fm_eth_port_cfg *cfg;
218137f9b54bSShreyansh Jain 	struct fman_if *fman_intf;
218237f9b54bSShreyansh Jain 	struct fman_if_bpool *bp, *tmp_bp;
218362f53995SHemant Agrawal 	uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
21849124e65dSGagandeep Singh 	uint32_t cgrid_tx[MAX_DPAA_CORES];
21854defbc8cSSachin Saxena 	uint32_t dev_rx_fqids[DPAA_MAX_NUM_PCD_QUEUES];
2186e4abd4ffSJun Yang 	int8_t dev_vspids[DPAA_MAX_NUM_PCD_QUEUES];
2187e4abd4ffSJun Yang 	int8_t vsp_id = -1;
218858e0420fSVanshika Shukla 	struct rte_device *dev = eth_dev->device;
2189480ec5b4SHemant Agrawal #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
2190480ec5b4SHemant Agrawal 	char *penv;
2191480ec5b4SHemant Agrawal #endif
2192ff9e112dSShreyansh Jain 
2193ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
2194ff9e112dSShreyansh Jain 
2195ff9e112dSShreyansh Jain 	dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
2196ff9e112dSShreyansh Jain 	dev_id = dpaa_device->id.dev_id;
2197ff9e112dSShreyansh Jain 	dpaa_intf = eth_dev->data->dev_private;
2198051ae3afSHemant Agrawal 	cfg = dpaa_get_eth_port_cfg(dev_id);
219937f9b54bSShreyansh Jain 	fman_intf = cfg->fman_if;
2200ff9e112dSShreyansh Jain 
2201ff9e112dSShreyansh Jain 	dpaa_intf->name = dpaa_device->name;
2202ff9e112dSShreyansh Jain 
22037be78d02SJosh Soref 	/* save fman_if & cfg in the interface structure */
22046b10d1f7SNipun Gupta 	eth_dev->process_private = fman_intf;
2205ff9e112dSShreyansh Jain 	dpaa_intf->ifid = dev_id;
220637f9b54bSShreyansh Jain 	dpaa_intf->cfg = cfg;
2207ff9e112dSShreyansh Jain 
220858e0420fSVanshika Shukla 	if (dpaa_get_devargs(dev->devargs, DRIVER_IEEE1588))
220958e0420fSVanshika Shukla 		dpaa_ieee_1588 = 1;
221058e0420fSVanshika Shukla 
22114defbc8cSSachin Saxena 	memset((char *)dev_rx_fqids, 0,
22124defbc8cSSachin Saxena 		sizeof(uint32_t) * DPAA_MAX_NUM_PCD_QUEUES);
22134defbc8cSSachin Saxena 
2214e4abd4ffSJun Yang 	memset(dev_vspids, -1, DPAA_MAX_NUM_PCD_QUEUES);
2215e4abd4ffSJun Yang 
221637f9b54bSShreyansh Jain 	/* Initialize Rx FQ's */
22178d6fc8b6SHemant Agrawal 	if (default_q) {
22188d6fc8b6SHemant Agrawal 		num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
22194defbc8cSSachin Saxena 	} else if (fmc_q) {
2220f5fe3eedSJun Yang 		num_rx_fqs = dpaa_port_fmc_init(fman_intf, dev_rx_fqids,
2221f5fe3eedSJun Yang 						dev_vspids,
2222f5fe3eedSJun Yang 						DPAA_MAX_NUM_PCD_QUEUES);
2223f5fe3eedSJun Yang 		if (num_rx_fqs < 0) {
2224f5fe3eedSJun Yang 			DPAA_PMD_ERR("%s FMC initializes failed!",
2225f5fe3eedSJun Yang 				dpaa_intf->name);
2226f5fe3eedSJun Yang 			goto free_rx;
2227f5fe3eedSJun Yang 		}
2228f5fe3eedSJun Yang 		if (!num_rx_fqs) {
22297e5f49aeSRohit Raj 			if (fman_intf->mac_type == fman_offline_internal ||
22307e5f49aeSRohit Raj 			    fman_intf->mac_type == fman_onic) {
22317e5f49aeSRohit Raj 				ret = -ENODEV;
22327e5f49aeSRohit Raj 				goto free_rx;
22337e5f49aeSRohit Raj 			}
2234f5fe3eedSJun Yang 			DPAA_PMD_WARN("%s is not configured by FMC.",
2235f5fe3eedSJun Yang 				dpaa_intf->name);
2236f5fe3eedSJun Yang 		}
22378d6fc8b6SHemant Agrawal 	} else {
22384defbc8cSSachin Saxena 		/* FMCLESS mode, load balance to multiple cores.*/
22394defbc8cSSachin Saxena 		num_rx_fqs = rte_lcore_count();
22408d6fc8b6SHemant Agrawal 	}
22418d6fc8b6SHemant Agrawal 
2242e4f931ccSHemant Agrawal 	/* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX
224337f9b54bSShreyansh Jain 	 * queues.
224437f9b54bSShreyansh Jain 	 */
22454defbc8cSSachin Saxena 	if (num_rx_fqs < 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) {
22461ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Invalid number of RX queues");
224737f9b54bSShreyansh Jain 		return -EINVAL;
224837f9b54bSShreyansh Jain 	}
224937f9b54bSShreyansh Jain 
22504defbc8cSSachin Saxena 	if (num_rx_fqs > 0) {
225137f9b54bSShreyansh Jain 		dpaa_intf->rx_queues = rte_zmalloc(NULL,
225237f9b54bSShreyansh Jain 			sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
22530ff76833SYong Wang 		if (!dpaa_intf->rx_queues) {
22541ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc mem for RX queues");
22550ff76833SYong Wang 			return -ENOMEM;
22560ff76833SYong Wang 		}
22574defbc8cSSachin Saxena 	} else {
22584defbc8cSSachin Saxena 		dpaa_intf->rx_queues = NULL;
22594defbc8cSSachin Saxena 	}
226062f53995SHemant Agrawal 
22619124e65dSGagandeep Singh 	memset(cgrid, 0, sizeof(cgrid));
22629124e65dSGagandeep Singh 	memset(cgrid_tx, 0, sizeof(cgrid_tx));
22639124e65dSGagandeep Singh 
22649124e65dSGagandeep Singh 	/* if DPAA_TX_TAILDROP_THRESHOLD is set, use that value; if 0, it means
22659124e65dSGagandeep Singh 	 * Tx tail drop is disabled.
22669124e65dSGagandeep Singh 	 */
22679124e65dSGagandeep Singh 	if (getenv("DPAA_TX_TAILDROP_THRESHOLD")) {
22689124e65dSGagandeep Singh 		td_tx_threshold = atoi(getenv("DPAA_TX_TAILDROP_THRESHOLD"));
22699124e65dSGagandeep Singh 		DPAA_PMD_DEBUG("Tail drop threshold env configured: %u",
22709124e65dSGagandeep Singh 			       td_tx_threshold);
22719124e65dSGagandeep Singh 		/* if a very large value is being configured */
22729124e65dSGagandeep Singh 		if (td_tx_threshold > UINT16_MAX)
22739124e65dSGagandeep Singh 			td_tx_threshold = CGR_RX_PERFQ_THRESH;
22749124e65dSGagandeep Singh 	}
22759124e65dSGagandeep Singh 
2276480ec5b4SHemant Agrawal #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
2277480ec5b4SHemant Agrawal 	penv = getenv("DPAA_DISPLAY_FRAME_AND_PARSER_RESULT");
2278480ec5b4SHemant Agrawal 	if (penv)
2279480ec5b4SHemant Agrawal 		dpaa_force_display_frame_set(atoi(penv));
2280480ec5b4SHemant Agrawal #endif
2281480ec5b4SHemant Agrawal 
228262f53995SHemant Agrawal 	/* If congestion control is enabled globally*/
22834defbc8cSSachin Saxena 	if (num_rx_fqs > 0 && td_threshold) {
228462f53995SHemant Agrawal 		dpaa_intf->cgr_rx = rte_zmalloc(NULL,
228562f53995SHemant Agrawal 			sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
22860ff76833SYong Wang 		if (!dpaa_intf->cgr_rx) {
22871ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc mem for cgr_rx");
22880ff76833SYong Wang 			ret = -ENOMEM;
22890ff76833SYong Wang 			goto free_rx;
22900ff76833SYong Wang 		}
229162f53995SHemant Agrawal 
229262f53995SHemant Agrawal 		ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
229362f53995SHemant Agrawal 		if (ret != num_rx_fqs) {
229462f53995SHemant Agrawal 			DPAA_PMD_WARN("insufficient CGRIDs available");
22950ff76833SYong Wang 			ret = -EINVAL;
22960ff76833SYong Wang 			goto free_rx;
229762f53995SHemant Agrawal 		}
229862f53995SHemant Agrawal 	} else {
229962f53995SHemant Agrawal 		dpaa_intf->cgr_rx = NULL;
230062f53995SHemant Agrawal 	}
230162f53995SHemant Agrawal 
23024defbc8cSSachin Saxena 	if (!fmc_q && !default_q) {
23034defbc8cSSachin Saxena 		ret = qman_alloc_fqid_range(dev_rx_fqids, num_rx_fqs,
23044defbc8cSSachin Saxena 					    num_rx_fqs, 0);
23054defbc8cSSachin Saxena 		if (ret < 0) {
23061ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc rx fqid's");
23074defbc8cSSachin Saxena 			goto free_rx;
23084defbc8cSSachin Saxena 		}
23094defbc8cSSachin Saxena 	}
23104defbc8cSSachin Saxena 
231137f9b54bSShreyansh Jain 	for (loop = 0; loop < num_rx_fqs; loop++) {
23128d6fc8b6SHemant Agrawal 		if (default_q)
23138d6fc8b6SHemant Agrawal 			fqid = cfg->rx_def;
23148d6fc8b6SHemant Agrawal 		else
23154defbc8cSSachin Saxena 			fqid = dev_rx_fqids[loop];
231662f53995SHemant Agrawal 
2317e4abd4ffSJun Yang 		vsp_id = dev_vspids[loop];
2318e4abd4ffSJun Yang 
231962f53995SHemant Agrawal 		if (dpaa_intf->cgr_rx)
232062f53995SHemant Agrawal 			dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
232162f53995SHemant Agrawal 
232262f53995SHemant Agrawal 		ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
232362f53995SHemant Agrawal 			dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
232462f53995SHemant Agrawal 			fqid);
232537f9b54bSShreyansh Jain 		if (ret)
23260ff76833SYong Wang 			goto free_rx;
2327e4abd4ffSJun Yang 		dpaa_intf->rx_queues[loop].vsp_id = vsp_id;
232837f9b54bSShreyansh Jain 		dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
232937f9b54bSShreyansh Jain 	}
233037f9b54bSShreyansh Jain 	dpaa_intf->nb_rx_queues = num_rx_fqs;
233137f9b54bSShreyansh Jain 
23320ff76833SYong Wang 	/* Initialise Tx FQs.free_rx Have as many Tx FQ's as number of cores */
233337f9b54bSShreyansh Jain 	dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
2334af2828cfSAkhil Goyal 		MAX_DPAA_CORES, MAX_CACHELINE);
23350ff76833SYong Wang 	if (!dpaa_intf->tx_queues) {
23361ec9a3afSHemant Agrawal 		DPAA_PMD_ERR("Failed to alloc mem for TX queues");
23370ff76833SYong Wang 		ret = -ENOMEM;
23380ff76833SYong Wang 		goto free_rx;
23390ff76833SYong Wang 	}
234037f9b54bSShreyansh Jain 
234158e0420fSVanshika Shukla 	dpaa_intf->tx_conf_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
234258e0420fSVanshika Shukla 		MAX_DPAA_CORES, MAX_CACHELINE);
234358e0420fSVanshika Shukla 	if (!dpaa_intf->tx_conf_queues) {
234458e0420fSVanshika Shukla 		DPAA_PMD_ERR("Failed to alloc mem for TX conf queues");
234558e0420fSVanshika Shukla 		ret = -ENOMEM;
234658e0420fSVanshika Shukla 		goto free_rx;
234758e0420fSVanshika Shukla 	}
234858e0420fSVanshika Shukla 
23499124e65dSGagandeep Singh 	/* If congestion control is enabled globally*/
23509124e65dSGagandeep Singh 	if (td_tx_threshold) {
23519124e65dSGagandeep Singh 		dpaa_intf->cgr_tx = rte_zmalloc(NULL,
23529124e65dSGagandeep Singh 			sizeof(struct qman_cgr) * MAX_DPAA_CORES,
23539124e65dSGagandeep Singh 			MAX_CACHELINE);
23549124e65dSGagandeep Singh 		if (!dpaa_intf->cgr_tx) {
23551ec9a3afSHemant Agrawal 			DPAA_PMD_ERR("Failed to alloc mem for cgr_tx");
23569124e65dSGagandeep Singh 			ret = -ENOMEM;
23579124e65dSGagandeep Singh 			goto free_rx;
23589124e65dSGagandeep Singh 		}
23599124e65dSGagandeep Singh 
23609124e65dSGagandeep Singh 		ret = qman_alloc_cgrid_range(&cgrid_tx[0], MAX_DPAA_CORES,
23619124e65dSGagandeep Singh 					     1, 0);
23629124e65dSGagandeep Singh 		if (ret != MAX_DPAA_CORES) {
23639124e65dSGagandeep Singh 			DPAA_PMD_WARN("insufficient CGRIDs available");
23649124e65dSGagandeep Singh 			ret = -EINVAL;
23659124e65dSGagandeep Singh 			goto free_rx;
23669124e65dSGagandeep Singh 		}
23679124e65dSGagandeep Singh 	} else {
23689124e65dSGagandeep Singh 		dpaa_intf->cgr_tx = NULL;
23699124e65dSGagandeep Singh 	}
23709124e65dSGagandeep Singh 
23719124e65dSGagandeep Singh 
2372af2828cfSAkhil Goyal 	for (loop = 0; loop < MAX_DPAA_CORES; loop++) {
23739124e65dSGagandeep Singh 		if (dpaa_intf->cgr_tx)
23749124e65dSGagandeep Singh 			dpaa_intf->cgr_tx[loop].cgrid = cgrid_tx[loop];
23759124e65dSGagandeep Singh 
237637f9b54bSShreyansh Jain 		ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
23779124e65dSGagandeep Singh 			fman_intf,
23789124e65dSGagandeep Singh 			dpaa_intf->cgr_tx ? &dpaa_intf->cgr_tx[loop] : NULL);
237937f9b54bSShreyansh Jain 		if (ret)
23800ff76833SYong Wang 			goto free_tx;
238137f9b54bSShreyansh Jain 		dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
2382d11482d9SVanshika Shukla 
2383d11482d9SVanshika Shukla 		if (dpaa_ieee_1588) {
2384d11482d9SVanshika Shukla 			ret = dpaa_tx_conf_queue_init(&dpaa_intf->tx_conf_queues[loop]);
2385d11482d9SVanshika Shukla 			if (ret)
2386d11482d9SVanshika Shukla 				goto free_tx;
2387d11482d9SVanshika Shukla 
2388d11482d9SVanshika Shukla 			dpaa_intf->tx_conf_queues[loop].dpaa_intf = dpaa_intf;
2389d11482d9SVanshika Shukla 			dpaa_intf->tx_queues[loop].tx_conf_queue = &dpaa_intf->tx_conf_queues[loop];
2390d11482d9SVanshika Shukla 		}
239137f9b54bSShreyansh Jain 	}
2392af2828cfSAkhil Goyal 	dpaa_intf->nb_tx_queues = MAX_DPAA_CORES;
23939e97abf2SJun Yang #if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER)
23949e97abf2SJun Yang 	ret = dpaa_error_queue_init(dpaa_intf, fman_intf);
23959e97abf2SJun Yang 	if (ret)
23969e97abf2SJun Yang 		goto free_tx;
239758e0420fSVanshika Shukla #endif
239837f9b54bSShreyansh Jain 	DPAA_PMD_DEBUG("All frame queues created");
239937f9b54bSShreyansh Jain 
240012a4678aSShreyansh Jain 	/* Get the initial configuration for flow control */
24017e5f49aeSRohit Raj 	if (fman_intf->mac_type != fman_offline_internal &&
24027e5f49aeSRohit Raj 	    fman_intf->mac_type != fman_onic)
24036b10d1f7SNipun Gupta 		dpaa_fc_set_default(dpaa_intf, fman_intf);
240412a4678aSShreyansh Jain 
240537f9b54bSShreyansh Jain 	/* reset bpool list, initialize bpool dynamically */
240637f9b54bSShreyansh Jain 	list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
240737f9b54bSShreyansh Jain 		list_del(&bp->node);
24084762b3d4SHemant Agrawal 		rte_free(bp);
240937f9b54bSShreyansh Jain 	}
241037f9b54bSShreyansh Jain 
241137f9b54bSShreyansh Jain 	/* Populate ethdev structure */
2412ff9e112dSShreyansh Jain 	eth_dev->dev_ops = &dpaa_devops;
2413cbfc6111SFerruh Yigit 	eth_dev->rx_queue_count = dpaa_dev_rx_queue_count;
241437f9b54bSShreyansh Jain 	eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
241537f9b54bSShreyansh Jain 	eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
241637f9b54bSShreyansh Jain 
241737f9b54bSShreyansh Jain 	/* Allocate memory for storing MAC addresses */
241837f9b54bSShreyansh Jain 	eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
241935b2d13fSOlivier Matz 		RTE_ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
242037f9b54bSShreyansh Jain 	if (eth_dev->data->mac_addrs == NULL) {
242137f9b54bSShreyansh Jain 		DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
242237f9b54bSShreyansh Jain 						"store MAC addresses",
242335b2d13fSOlivier Matz 				RTE_ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
24240ff76833SYong Wang 		ret = -ENOMEM;
24250ff76833SYong Wang 		goto free_tx;
242637f9b54bSShreyansh Jain 	}
242737f9b54bSShreyansh Jain 
242837f9b54bSShreyansh Jain 	/* copy the primary mac address */
2429538da7a1SOlivier Matz 	rte_ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
243037f9b54bSShreyansh Jain 
2431a247fcd9SStephen Hemminger 	DPAA_PMD_INFO("net: dpaa: %s: " RTE_ETHER_ADDR_PRT_FMT,
2432a7db3afcSAman Deep Singh 		      dpaa_device->name, RTE_ETHER_ADDR_BYTES(&fman_intf->mac_addr));
24334defbc8cSSachin Saxena 
24347e5f49aeSRohit Raj 	if (!fman_intf->is_shared_mac &&
24357e5f49aeSRohit Raj 	    fman_intf->mac_type != fman_offline_internal &&
24367e5f49aeSRohit Raj 	    fman_intf->mac_type != fman_onic) {
243795d226f0SNipun Gupta 		/* Configure error packet handling */
243877393f56SSachin Saxena 		fman_if_receive_rx_errors(fman_intf,
243977393f56SSachin Saxena 					  FM_FD_RX_STATUS_ERR_MASK);
244095d226f0SNipun Gupta 		/* Disable RX mode */
244137f9b54bSShreyansh Jain 		fman_if_disable_rx(fman_intf);
244237f9b54bSShreyansh Jain 		/* Disable promiscuous mode */
244337f9b54bSShreyansh Jain 		fman_if_promiscuous_disable(fman_intf);
244437f9b54bSShreyansh Jain 		/* Disable multicast */
244537f9b54bSShreyansh Jain 		fman_if_reset_mcast_filter_table(fman_intf);
244637f9b54bSShreyansh Jain 		/* Reset interface statistics */
244737f9b54bSShreyansh Jain 		fman_if_stats_reset(fman_intf);
244855576ac2SHemant Agrawal 		/* Disable SG by default */
244955576ac2SHemant Agrawal 		fman_if_set_sg(fman_intf, 0);
2450133332f0SRadu Bulie 		fman_if_set_maxfrm(fman_intf,
2451133332f0SRadu Bulie 				   RTE_ETHER_MAX_LEN + VLAN_TAG_SIZE);
2452133332f0SRadu Bulie 	}
2453ff9e112dSShreyansh Jain 
2454ff9e112dSShreyansh Jain 	return 0;
24550ff76833SYong Wang 
24560ff76833SYong Wang free_tx:
24570ff76833SYong Wang 	rte_free(dpaa_intf->tx_queues);
24580ff76833SYong Wang 	dpaa_intf->tx_queues = NULL;
24590ff76833SYong Wang 	dpaa_intf->nb_tx_queues = 0;
24600ff76833SYong Wang 
24610ff76833SYong Wang free_rx:
24620ff76833SYong Wang 	rte_free(dpaa_intf->cgr_rx);
24639124e65dSGagandeep Singh 	rte_free(dpaa_intf->cgr_tx);
24640ff76833SYong Wang 	rte_free(dpaa_intf->rx_queues);
24650ff76833SYong Wang 	dpaa_intf->rx_queues = NULL;
24660ff76833SYong Wang 	dpaa_intf->nb_rx_queues = 0;
24670ff76833SYong Wang 	return ret;
2468ff9e112dSShreyansh Jain }
2469ff9e112dSShreyansh Jain 
2470ff9e112dSShreyansh Jain static int
24714defbc8cSSachin Saxena rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv,
2472ff9e112dSShreyansh Jain 	       struct rte_dpaa_device *dpaa_dev)
2473ff9e112dSShreyansh Jain {
2474ff9e112dSShreyansh Jain 	int diag;
2475ff9e112dSShreyansh Jain 	int ret;
2476ff9e112dSShreyansh Jain 	struct rte_eth_dev *eth_dev;
2477ff9e112dSShreyansh Jain 
2478ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
2479ff9e112dSShreyansh Jain 
248047854c18SHemant Agrawal 	if ((DPAA_MBUF_HW_ANNOTATION + DPAA_FD_PTA_SIZE) >
248147854c18SHemant Agrawal 		RTE_PKTMBUF_HEADROOM) {
248247854c18SHemant Agrawal 		DPAA_PMD_ERR(
248347854c18SHemant Agrawal 		"RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA Annotation req(%d)",
248447854c18SHemant Agrawal 		RTE_PKTMBUF_HEADROOM,
248547854c18SHemant Agrawal 		DPAA_MBUF_HW_ANNOTATION + DPAA_FD_PTA_SIZE);
248647854c18SHemant Agrawal 
248747854c18SHemant Agrawal 		return -1;
248847854c18SHemant Agrawal 	}
248947854c18SHemant Agrawal 
2490ff9e112dSShreyansh Jain 	/* In case of secondary process, the device is already configured
2491ff9e112dSShreyansh Jain 	 * and no further action is required, except portal initialization
2492ff9e112dSShreyansh Jain 	 * and verifying secondary attachment to port name.
2493ff9e112dSShreyansh Jain 	 */
2494ff9e112dSShreyansh Jain 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2495ff9e112dSShreyansh Jain 		eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
2496ff9e112dSShreyansh Jain 		if (!eth_dev)
2497ff9e112dSShreyansh Jain 			return -ENOMEM;
2498d1c3ab22SFerruh Yigit 		eth_dev->device = &dpaa_dev->device;
2499d1c3ab22SFerruh Yigit 		eth_dev->dev_ops = &dpaa_devops;
25006b10d1f7SNipun Gupta 
25016b10d1f7SNipun Gupta 		ret = dpaa_dev_init_secondary(eth_dev);
25026b10d1f7SNipun Gupta 		if (ret != 0) {
2503a247fcd9SStephen Hemminger 			DPAA_PMD_ERR("secondary dev init failed");
25046b10d1f7SNipun Gupta 			return ret;
25056b10d1f7SNipun Gupta 		}
25066b10d1f7SNipun Gupta 
2507fbe90cddSThomas Monjalon 		rte_eth_dev_probing_finish(eth_dev);
2508ff9e112dSShreyansh Jain 		return 0;
2509ff9e112dSShreyansh Jain 	}
2510ff9e112dSShreyansh Jain 
2511af2828cfSAkhil Goyal 	if (!is_global_init && (rte_eal_process_type() == RTE_PROC_PRIMARY)) {
25128d6fc8b6SHemant Agrawal 		if (access("/tmp/fmc.bin", F_OK) == -1) {
2513b7c7ff6eSStephen Hemminger 			DPAA_PMD_INFO("* FMC not configured.Enabling default mode");
25148d6fc8b6SHemant Agrawal 			default_q = 1;
25158d6fc8b6SHemant Agrawal 		}
25168d6fc8b6SHemant Agrawal 
25174defbc8cSSachin Saxena 		if (!(default_q || fmc_q)) {
25184defbc8cSSachin Saxena 			if (dpaa_fm_init()) {
25191ec9a3afSHemant Agrawal 				DPAA_PMD_ERR("FM init failed");
25204defbc8cSSachin Saxena 				return -1;
25214defbc8cSSachin Saxena 			}
25224defbc8cSSachin Saxena 		}
25234defbc8cSSachin Saxena 
2524e507498dSHemant Agrawal 		/* disabling the default push mode for LS1043 */
2525e507498dSHemant Agrawal 		if (dpaa_svr_family == SVR_LS1043A_FAMILY)
2526e507498dSHemant Agrawal 			dpaa_push_mode_max_queue = 0;
2527e507498dSHemant Agrawal 
25287be78d02SJosh Soref 		/* if push mode queues to be enabled. Currently we are allowing
2529e507498dSHemant Agrawal 		 * only one queue per thread.
2530e507498dSHemant Agrawal 		 */
2531e507498dSHemant Agrawal 		if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
2532e507498dSHemant Agrawal 			dpaa_push_mode_max_queue =
2533e507498dSHemant Agrawal 					atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
2534e507498dSHemant Agrawal 			if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
2535e507498dSHemant Agrawal 			    dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
2536e507498dSHemant Agrawal 		}
2537e507498dSHemant Agrawal 
2538ff9e112dSShreyansh Jain 		is_global_init = 1;
2539ff9e112dSShreyansh Jain 	}
2540ff9e112dSShreyansh Jain 
2541e5872221SRohit Raj 	if (unlikely(!DPAA_PER_LCORE_PORTAL)) {
2542ff9e112dSShreyansh Jain 		ret = rte_dpaa_portal_init((void *)1);
2543ff9e112dSShreyansh Jain 		if (ret) {
2544ff9e112dSShreyansh Jain 			DPAA_PMD_ERR("Unable to initialize portal");
2545ff9e112dSShreyansh Jain 			return ret;
2546ff9e112dSShreyansh Jain 		}
25475d944582SNipun Gupta 	}
2548ff9e112dSShreyansh Jain 
25496b10d1f7SNipun Gupta 	eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
2550af2828cfSAkhil Goyal 	if (!eth_dev)
2551af2828cfSAkhil Goyal 		return -ENOMEM;
2552ff9e112dSShreyansh Jain 
25536b10d1f7SNipun Gupta 	eth_dev->data->dev_private =
25546b10d1f7SNipun Gupta 			rte_zmalloc("ethdev private structure",
2555ff9e112dSShreyansh Jain 					sizeof(struct dpaa_if),
2556ff9e112dSShreyansh Jain 					RTE_CACHE_LINE_SIZE);
2557ff9e112dSShreyansh Jain 	if (!eth_dev->data->dev_private) {
2558ff9e112dSShreyansh Jain 		DPAA_PMD_ERR("Cannot allocate memzone for port data");
2559ff9e112dSShreyansh Jain 		rte_eth_dev_release_port(eth_dev);
2560ff9e112dSShreyansh Jain 		return -ENOMEM;
2561ff9e112dSShreyansh Jain 	}
25626b10d1f7SNipun Gupta 
2563ff9e112dSShreyansh Jain 	eth_dev->device = &dpaa_dev->device;
2564ff9e112dSShreyansh Jain 	dpaa_dev->eth_dev = eth_dev;
2565ff9e112dSShreyansh Jain 
25669124e65dSGagandeep Singh 	qman_ern_register_cb(dpaa_free_mbuf);
25679124e65dSGagandeep Singh 
25682aa10990SRohit Raj 	if (dpaa_drv->drv_flags & RTE_DPAA_DRV_INTR_LSC)
25692aa10990SRohit Raj 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
25702aa10990SRohit Raj 
2571ff9e112dSShreyansh Jain 	/* Invoke PMD device initialization function */
2572ff9e112dSShreyansh Jain 	diag = dpaa_dev_init(eth_dev);
2573fbe90cddSThomas Monjalon 	if (diag == 0) {
2574533c31ccSGagandeep Singh 		if (!dpaa_tx_sg_pool) {
2575533c31ccSGagandeep Singh 			dpaa_tx_sg_pool =
2576533c31ccSGagandeep Singh 				rte_pktmbuf_pool_create("dpaa_mbuf_tx_sg_pool",
2577533c31ccSGagandeep Singh 				DPAA_POOL_SIZE,
2578533c31ccSGagandeep Singh 				DPAA_POOL_CACHE_SIZE, 0,
2579533c31ccSGagandeep Singh 				DPAA_MAX_SGS * sizeof(struct qm_sg_entry),
2580533c31ccSGagandeep Singh 				rte_socket_id());
2581533c31ccSGagandeep Singh 			if (dpaa_tx_sg_pool == NULL) {
25821ec9a3afSHemant Agrawal 				DPAA_PMD_ERR("SG pool creation failed");
2583533c31ccSGagandeep Singh 				return -ENOMEM;
2584533c31ccSGagandeep Singh 			}
2585533c31ccSGagandeep Singh 		}
2586fbe90cddSThomas Monjalon 		rte_eth_dev_probing_finish(eth_dev);
2587533c31ccSGagandeep Singh 		dpaa_valid_dev++;
2588ff9e112dSShreyansh Jain 		return 0;
2589fbe90cddSThomas Monjalon 	}
2590ff9e112dSShreyansh Jain 
2591ff9e112dSShreyansh Jain 	rte_eth_dev_release_port(eth_dev);
2592ff9e112dSShreyansh Jain 	return diag;
2593ff9e112dSShreyansh Jain }
2594ff9e112dSShreyansh Jain 
2595ff9e112dSShreyansh Jain static int
2596ff9e112dSShreyansh Jain rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
2597ff9e112dSShreyansh Jain {
2598ff9e112dSShreyansh Jain 	struct rte_eth_dev *eth_dev;
25992defb114SSachin Saxena 	int ret;
2600ff9e112dSShreyansh Jain 
2601ff9e112dSShreyansh Jain 	PMD_INIT_FUNC_TRACE();
2602ff9e112dSShreyansh Jain 
2603ff9e112dSShreyansh Jain 	eth_dev = dpaa_dev->eth_dev;
26042defb114SSachin Saxena 	dpaa_eth_dev_close(eth_dev);
2605533c31ccSGagandeep Singh 	dpaa_valid_dev--;
2606533c31ccSGagandeep Singh 	if (!dpaa_valid_dev)
2607533c31ccSGagandeep Singh 		rte_mempool_free(dpaa_tx_sg_pool);
26082defb114SSachin Saxena 	ret = rte_eth_dev_release_port(eth_dev);
2609ff9e112dSShreyansh Jain 
26102defb114SSachin Saxena 	return ret;
2611ff9e112dSShreyansh Jain }
2612ff9e112dSShreyansh Jain 
26134defbc8cSSachin Saxena static void __attribute__((destructor(102))) dpaa_finish(void)
26144defbc8cSSachin Saxena {
26154defbc8cSSachin Saxena 	/* For secondary, primary will do all the cleanup */
26164defbc8cSSachin Saxena 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
26174defbc8cSSachin Saxena 		return;
26184defbc8cSSachin Saxena 
26194defbc8cSSachin Saxena 	if (!(default_q || fmc_q)) {
26204defbc8cSSachin Saxena 		if (is_global_init)
26214defbc8cSSachin Saxena 			if (dpaa_fm_term())
26221ec9a3afSHemant Agrawal 				DPAA_PMD_WARN("DPAA FM term failed");
26234defbc8cSSachin Saxena 
26244defbc8cSSachin Saxena 		is_global_init = 0;
26254defbc8cSSachin Saxena 
26264defbc8cSSachin Saxena 		DPAA_PMD_INFO("DPAA fman cleaned up");
26274defbc8cSSachin Saxena 	}
26284defbc8cSSachin Saxena }
26294defbc8cSSachin Saxena 
2630ff9e112dSShreyansh Jain static struct rte_dpaa_driver rte_dpaa_pmd = {
26312aa10990SRohit Raj 	.drv_flags = RTE_DPAA_DRV_INTR_LSC,
2632ff9e112dSShreyansh Jain 	.drv_type = FSL_DPAA_ETH,
2633ff9e112dSShreyansh Jain 	.probe = rte_dpaa_probe,
2634ff9e112dSShreyansh Jain 	.remove = rte_dpaa_remove,
2635ff9e112dSShreyansh Jain };
2636ff9e112dSShreyansh Jain 
2637ff9e112dSShreyansh Jain RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);
263858e0420fSVanshika Shukla RTE_PMD_REGISTER_PARAM_STRING(net_dpaa,
263958e0420fSVanshika Shukla 		DRIVER_IEEE1588 "=<int>");
2640eeded204SDavid Marchand RTE_LOG_REGISTER_DEFAULT(dpaa_logtype_pmd, NOTICE);
2641