xref: /dpdk/drivers/net/cxgbe/base/t4_regs_values.h (revision ed7092069a3fdef2e520199ae7b835ec42948d79)
12aa5c722SRahul Lakkireddy /* SPDX-License-Identifier: BSD-3-Clause
22aa5c722SRahul Lakkireddy  * Copyright(c) 2014-2018 Chelsio Communications.
33bd122eeSRahul Lakkireddy  * All rights reserved.
43bd122eeSRahul Lakkireddy  */
53bd122eeSRahul Lakkireddy 
63bd122eeSRahul Lakkireddy #ifndef __T4_REGS_VALUES_H__
73bd122eeSRahul Lakkireddy #define __T4_REGS_VALUES_H__
83bd122eeSRahul Lakkireddy 
93bd122eeSRahul Lakkireddy /*
103bd122eeSRahul Lakkireddy  * This file contains definitions for various T4 register value hardware
113bd122eeSRahul Lakkireddy  * constants.  The types of values encoded here are predominantly those for
123bd122eeSRahul Lakkireddy  * register fields which control "modal" behavior.  For the most part, we do
133bd122eeSRahul Lakkireddy  * not include definitions for register fields which are simple numeric
143bd122eeSRahul Lakkireddy  * metrics, etc.
153bd122eeSRahul Lakkireddy  */
163bd122eeSRahul Lakkireddy 
173bd122eeSRahul Lakkireddy /*
183bd122eeSRahul Lakkireddy  * SGE definitions.
193bd122eeSRahul Lakkireddy  * ================
203bd122eeSRahul Lakkireddy  */
213bd122eeSRahul Lakkireddy 
223bd122eeSRahul Lakkireddy /*
233bd122eeSRahul Lakkireddy  * SGE register field values.
243bd122eeSRahul Lakkireddy  */
253bd122eeSRahul Lakkireddy 
263bd122eeSRahul Lakkireddy /* CONTROL register */
273bd122eeSRahul Lakkireddy #define X_RXPKTCPLMODE_SPLIT		1
283bd122eeSRahul Lakkireddy #define X_INGPCIEBOUNDARY_32B		0
293bd122eeSRahul Lakkireddy #define X_INGPADBOUNDARY_SHIFT		5
30edd04c61SRahul Lakkireddy #define X_INGPADBOUNDARY_32B		0
31edd04c61SRahul Lakkireddy 
32edd04c61SRahul Lakkireddy #define X_T6_INGPADBOUNDARY_SHIFT	3
33edd04c61SRahul Lakkireddy #define X_T6_INGPADBOUNDARY_8B		0
343bd122eeSRahul Lakkireddy 
353bd122eeSRahul Lakkireddy /* CONTROL2 register */
363bd122eeSRahul Lakkireddy #define X_INGPACKBOUNDARY_SHIFT		5
373bd122eeSRahul Lakkireddy #define X_INGPACKBOUNDARY_16B		0
38edd04c61SRahul Lakkireddy #define X_INGPACKBOUNDARY_64B		1
393bd122eeSRahul Lakkireddy 
403bd122eeSRahul Lakkireddy /* GTS register */
413bd122eeSRahul Lakkireddy #define X_TIMERREG_RESTART_COUNTER	6
423bd122eeSRahul Lakkireddy #define X_TIMERREG_UPDATE_CIDX		7
433bd122eeSRahul Lakkireddy 
443bd122eeSRahul Lakkireddy /*
453bd122eeSRahul Lakkireddy  * Egress Context field values
463bd122eeSRahul Lakkireddy  */
473bd122eeSRahul Lakkireddy #define X_FETCHBURSTMIN_64B		2
4878fc1a71SRahul Lakkireddy #define X_FETCHBURSTMIN_128B		3
493bd122eeSRahul Lakkireddy #define X_FETCHBURSTMAX_256B		2
503bd122eeSRahul Lakkireddy #define X_FETCHBURSTMAX_512B		3
513bd122eeSRahul Lakkireddy 
523bd122eeSRahul Lakkireddy #define X_HOSTFCMODE_NONE		0
533bd122eeSRahul Lakkireddy 
543bd122eeSRahul Lakkireddy /*
553bd122eeSRahul Lakkireddy  * Ingress Context field values
563bd122eeSRahul Lakkireddy  */
576c280962SRahul Lakkireddy #define X_UPDATEDELIVERY_STATUS_PAGE	2
583bd122eeSRahul Lakkireddy 
593bd122eeSRahul Lakkireddy #define X_RSPD_TYPE_FLBUF		0
603bd122eeSRahul Lakkireddy #define X_RSPD_TYPE_CPL			1
613bd122eeSRahul Lakkireddy 
623bd122eeSRahul Lakkireddy /*
633bd122eeSRahul Lakkireddy  * Context field definitions.  This is by no means a complete list of SGE
643bd122eeSRahul Lakkireddy  * Context fields.  In the vast majority of cases the firmware initializes
653bd122eeSRahul Lakkireddy  * things the way they need to be set up.  But in a few small cases, we need
663bd122eeSRahul Lakkireddy  * to compute new values and ship them off to the firmware to be applied to
673bd122eeSRahul Lakkireddy  * the SGE Conexts ...
683bd122eeSRahul Lakkireddy  */
693bd122eeSRahul Lakkireddy 
703bd122eeSRahul Lakkireddy /*
713bd122eeSRahul Lakkireddy  * Congestion Manager Definitions.
723bd122eeSRahul Lakkireddy  */
733bd122eeSRahul Lakkireddy #define S_CONMCTXT_CNGTPMODE		19
743bd122eeSRahul Lakkireddy #define M_CONMCTXT_CNGTPMODE		0x3
753bd122eeSRahul Lakkireddy #define V_CONMCTXT_CNGTPMODE(x)		((x) << S_CONMCTXT_CNGTPMODE)
763bd122eeSRahul Lakkireddy #define G_CONMCTXT_CNGTPMODE(x)  \
773bd122eeSRahul Lakkireddy 	(((x) >> S_CONMCTXT_CNGTPMODE) & M_CONMCTXT_CNGTPMODE)
783bd122eeSRahul Lakkireddy #define S_CONMCTXT_CNGCHMAP		0
793bd122eeSRahul Lakkireddy #define M_CONMCTXT_CNGCHMAP		0xffff
803bd122eeSRahul Lakkireddy #define V_CONMCTXT_CNGCHMAP(x)		((x) << S_CONMCTXT_CNGCHMAP)
813bd122eeSRahul Lakkireddy #define G_CONMCTXT_CNGCHMAP(x)   \
823bd122eeSRahul Lakkireddy 	(((x) >> S_CONMCTXT_CNGCHMAP) & M_CONMCTXT_CNGCHMAP)
833bd122eeSRahul Lakkireddy 
843bd122eeSRahul Lakkireddy #define X_CONMCTXT_CNGTPMODE_QUEUE	1
853bd122eeSRahul Lakkireddy #define X_CONMCTXT_CNGTPMODE_CHANNEL	2
863bd122eeSRahul Lakkireddy 
873bd122eeSRahul Lakkireddy /*
883bd122eeSRahul Lakkireddy  * T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
893bd122eeSRahul Lakkireddy  * The User Doorbells are each 128 bytes in length with a Simple Doorbell at
903bd122eeSRahul Lakkireddy  * offsets 8x and a Write Combining single 64-byte Egress Queue Unit
913bd122eeSRahul Lakkireddy  * (X_IDXSIZE_UNIT) Gather Buffer interface at offset 64.  For Ingress Queues,
923bd122eeSRahul Lakkireddy  * we have a Going To Sleep register at offsets 8x+4.
933bd122eeSRahul Lakkireddy  *
943bd122eeSRahul Lakkireddy  * As noted above, we have many instances of the Simple Doorbell and Going To
953bd122eeSRahul Lakkireddy  * Sleep registers at offsets 8x and 8x+4, respectively.  We want to use a
963bd122eeSRahul Lakkireddy  * non-64-byte aligned offset for the Simple Doorbell in order to attempt to
973bd122eeSRahul Lakkireddy  * avoid buffering of the writes to the Simple Doorbell and we want to use a
983bd122eeSRahul Lakkireddy  * non-contiguous offset for the Going To Sleep writes in order to avoid
993bd122eeSRahul Lakkireddy  * possible combining between them.
1003bd122eeSRahul Lakkireddy  */
1013bd122eeSRahul Lakkireddy #define SGE_UDB_SIZE		128
1023bd122eeSRahul Lakkireddy #define SGE_UDB_KDOORBELL	8
1033bd122eeSRahul Lakkireddy #define SGE_UDB_GTS		20
1043bd122eeSRahul Lakkireddy 
1053bd122eeSRahul Lakkireddy /*
1063bd122eeSRahul Lakkireddy  * CIM definitions.
1073bd122eeSRahul Lakkireddy  * ================
1083bd122eeSRahul Lakkireddy  */
1093bd122eeSRahul Lakkireddy 
1103bd122eeSRahul Lakkireddy /*
1113bd122eeSRahul Lakkireddy  * CIM register field values.
1123bd122eeSRahul Lakkireddy  */
1133bd122eeSRahul Lakkireddy #define X_MBOWNER_NONE			0
1143bd122eeSRahul Lakkireddy #define X_MBOWNER_FW			1
1153bd122eeSRahul Lakkireddy #define X_MBOWNER_PL			2
1163bd122eeSRahul Lakkireddy 
1173bd122eeSRahul Lakkireddy /*
1183bd122eeSRahul Lakkireddy  * PCI-E definitions.
1193bd122eeSRahul Lakkireddy  * ==================
1203bd122eeSRahul Lakkireddy  */
1213bd122eeSRahul Lakkireddy #define X_WINDOW_SHIFT			10
1223bd122eeSRahul Lakkireddy #define X_PCIEOFST_SHIFT		10
1233bd122eeSRahul Lakkireddy 
1243bd122eeSRahul Lakkireddy /*
1253bd122eeSRahul Lakkireddy  * TP definitions.
1263bd122eeSRahul Lakkireddy  * ===============
1273bd122eeSRahul Lakkireddy  */
1283bd122eeSRahul Lakkireddy 
1293bd122eeSRahul Lakkireddy /*
1303bd122eeSRahul Lakkireddy  * TP_VLAN_PRI_MAP controls which subset of fields will be present in the
1313bd122eeSRahul Lakkireddy  * Compressed Filter Tuple for LE filters.  Each bit set in TP_VLAN_PRI_MAP
1323bd122eeSRahul Lakkireddy  * selects for a particular field being present.  These fields, when present
1333bd122eeSRahul Lakkireddy  * in the Compressed Filter Tuple, have the following widths in bits.
1343bd122eeSRahul Lakkireddy  */
1353bd122eeSRahul Lakkireddy #define W_FT_FCOE			1
1363bd122eeSRahul Lakkireddy #define W_FT_PORT			3
1373bd122eeSRahul Lakkireddy #define W_FT_VNIC_ID			17
1383bd122eeSRahul Lakkireddy #define W_FT_VLAN			17
1393bd122eeSRahul Lakkireddy #define W_FT_TOS			8
1403bd122eeSRahul Lakkireddy #define W_FT_PROTOCOL			8
1413bd122eeSRahul Lakkireddy #define W_FT_ETHERTYPE			16
1423bd122eeSRahul Lakkireddy #define W_FT_MACMATCH			9
1433bd122eeSRahul Lakkireddy #define W_FT_MPSHITTYPE			3
1443bd122eeSRahul Lakkireddy #define W_FT_FRAGMENTATION		1
1453bd122eeSRahul Lakkireddy 
146*ed709206SRahul Lakkireddy /*
147*ed709206SRahul Lakkireddy  * Some of the Compressed Filter Tuple fields have internal structure.  These
148*ed709206SRahul Lakkireddy  * bit shifts/masks describe those structures.  All shifts are relative to the
149*ed709206SRahul Lakkireddy  * base position of the fields within the Compressed Filter Tuple
150*ed709206SRahul Lakkireddy  */
151*ed709206SRahul Lakkireddy #define S_FT_VLAN_VLD			16
152*ed709206SRahul Lakkireddy #define V_FT_VLAN_VLD(x)		((x) << S_FT_VLAN_VLD)
153*ed709206SRahul Lakkireddy #define F_FT_VLAN_VLD			V_FT_VLAN_VLD(1U)
154*ed709206SRahul Lakkireddy 
1553bd122eeSRahul Lakkireddy #endif /* __T4_REGS_VALUES_H__ */
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