xref: /dpdk/drivers/net/cxgbe/base/t4_regs_values.h (revision ed7092069a3fdef2e520199ae7b835ec42948d79)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2018 Chelsio Communications.
3  * All rights reserved.
4  */
5 
6 #ifndef __T4_REGS_VALUES_H__
7 #define __T4_REGS_VALUES_H__
8 
9 /*
10  * This file contains definitions for various T4 register value hardware
11  * constants.  The types of values encoded here are predominantly those for
12  * register fields which control "modal" behavior.  For the most part, we do
13  * not include definitions for register fields which are simple numeric
14  * metrics, etc.
15  */
16 
17 /*
18  * SGE definitions.
19  * ================
20  */
21 
22 /*
23  * SGE register field values.
24  */
25 
26 /* CONTROL register */
27 #define X_RXPKTCPLMODE_SPLIT		1
28 #define X_INGPCIEBOUNDARY_32B		0
29 #define X_INGPADBOUNDARY_SHIFT		5
30 #define X_INGPADBOUNDARY_32B		0
31 
32 #define X_T6_INGPADBOUNDARY_SHIFT	3
33 #define X_T6_INGPADBOUNDARY_8B		0
34 
35 /* CONTROL2 register */
36 #define X_INGPACKBOUNDARY_SHIFT		5
37 #define X_INGPACKBOUNDARY_16B		0
38 #define X_INGPACKBOUNDARY_64B		1
39 
40 /* GTS register */
41 #define X_TIMERREG_RESTART_COUNTER	6
42 #define X_TIMERREG_UPDATE_CIDX		7
43 
44 /*
45  * Egress Context field values
46  */
47 #define X_FETCHBURSTMIN_64B		2
48 #define X_FETCHBURSTMIN_128B		3
49 #define X_FETCHBURSTMAX_256B		2
50 #define X_FETCHBURSTMAX_512B		3
51 
52 #define X_HOSTFCMODE_NONE		0
53 
54 /*
55  * Ingress Context field values
56  */
57 #define X_UPDATEDELIVERY_STATUS_PAGE	2
58 
59 #define X_RSPD_TYPE_FLBUF		0
60 #define X_RSPD_TYPE_CPL			1
61 
62 /*
63  * Context field definitions.  This is by no means a complete list of SGE
64  * Context fields.  In the vast majority of cases the firmware initializes
65  * things the way they need to be set up.  But in a few small cases, we need
66  * to compute new values and ship them off to the firmware to be applied to
67  * the SGE Conexts ...
68  */
69 
70 /*
71  * Congestion Manager Definitions.
72  */
73 #define S_CONMCTXT_CNGTPMODE		19
74 #define M_CONMCTXT_CNGTPMODE		0x3
75 #define V_CONMCTXT_CNGTPMODE(x)		((x) << S_CONMCTXT_CNGTPMODE)
76 #define G_CONMCTXT_CNGTPMODE(x)  \
77 	(((x) >> S_CONMCTXT_CNGTPMODE) & M_CONMCTXT_CNGTPMODE)
78 #define S_CONMCTXT_CNGCHMAP		0
79 #define M_CONMCTXT_CNGCHMAP		0xffff
80 #define V_CONMCTXT_CNGCHMAP(x)		((x) << S_CONMCTXT_CNGCHMAP)
81 #define G_CONMCTXT_CNGCHMAP(x)   \
82 	(((x) >> S_CONMCTXT_CNGCHMAP) & M_CONMCTXT_CNGCHMAP)
83 
84 #define X_CONMCTXT_CNGTPMODE_QUEUE	1
85 #define X_CONMCTXT_CNGTPMODE_CHANNEL	2
86 
87 /*
88  * T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
89  * The User Doorbells are each 128 bytes in length with a Simple Doorbell at
90  * offsets 8x and a Write Combining single 64-byte Egress Queue Unit
91  * (X_IDXSIZE_UNIT) Gather Buffer interface at offset 64.  For Ingress Queues,
92  * we have a Going To Sleep register at offsets 8x+4.
93  *
94  * As noted above, we have many instances of the Simple Doorbell and Going To
95  * Sleep registers at offsets 8x and 8x+4, respectively.  We want to use a
96  * non-64-byte aligned offset for the Simple Doorbell in order to attempt to
97  * avoid buffering of the writes to the Simple Doorbell and we want to use a
98  * non-contiguous offset for the Going To Sleep writes in order to avoid
99  * possible combining between them.
100  */
101 #define SGE_UDB_SIZE		128
102 #define SGE_UDB_KDOORBELL	8
103 #define SGE_UDB_GTS		20
104 
105 /*
106  * CIM definitions.
107  * ================
108  */
109 
110 /*
111  * CIM register field values.
112  */
113 #define X_MBOWNER_NONE			0
114 #define X_MBOWNER_FW			1
115 #define X_MBOWNER_PL			2
116 
117 /*
118  * PCI-E definitions.
119  * ==================
120  */
121 #define X_WINDOW_SHIFT			10
122 #define X_PCIEOFST_SHIFT		10
123 
124 /*
125  * TP definitions.
126  * ===============
127  */
128 
129 /*
130  * TP_VLAN_PRI_MAP controls which subset of fields will be present in the
131  * Compressed Filter Tuple for LE filters.  Each bit set in TP_VLAN_PRI_MAP
132  * selects for a particular field being present.  These fields, when present
133  * in the Compressed Filter Tuple, have the following widths in bits.
134  */
135 #define W_FT_FCOE			1
136 #define W_FT_PORT			3
137 #define W_FT_VNIC_ID			17
138 #define W_FT_VLAN			17
139 #define W_FT_TOS			8
140 #define W_FT_PROTOCOL			8
141 #define W_FT_ETHERTYPE			16
142 #define W_FT_MACMATCH			9
143 #define W_FT_MPSHITTYPE			3
144 #define W_FT_FRAGMENTATION		1
145 
146 /*
147  * Some of the Compressed Filter Tuple fields have internal structure.  These
148  * bit shifts/masks describe those structures.  All shifts are relative to the
149  * base position of the fields within the Compressed Filter Tuple
150  */
151 #define S_FT_VLAN_VLD			16
152 #define V_FT_VLAN_VLD(x)		((x) << S_FT_VLAN_VLD)
153 #define F_FT_VLAN_VLD			V_FT_VLAN_VLD(1U)
154 
155 #endif /* __T4_REGS_VALUES_H__ */
156