1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
3 */
4
5 #include "cn9k_ethdev.h"
6 #include "cn9k_tx.h"
7
8 static __rte_used void
pick_tx_func(struct rte_eth_dev * eth_dev,const eth_tx_burst_t tx_burst[NIX_TX_OFFLOAD_MAX])9 pick_tx_func(struct rte_eth_dev *eth_dev,
10 const eth_tx_burst_t tx_burst[NIX_TX_OFFLOAD_MAX])
11 {
12 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
13
14 /* [TS] [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */
15 eth_dev->tx_pkt_burst =
16 tx_burst[dev->tx_offload_flags & (NIX_TX_OFFLOAD_MAX - 1)];
17
18 if (eth_dev->data->dev_started)
19 rte_eth_fp_ops[eth_dev->data->port_id].tx_pkt_burst =
20 eth_dev->tx_pkt_burst;
21 }
22
23 #if defined(RTE_ARCH_ARM64)
24 static int
cn9k_nix_tx_queue_count(void * tx_queue)25 cn9k_nix_tx_queue_count(void *tx_queue)
26 {
27 struct cn9k_eth_txq *txq = (struct cn9k_eth_txq *)tx_queue;
28
29 return cnxk_nix_tx_queue_count(txq->fc_mem, txq->sqes_per_sqb_log2);
30 }
31
32 static int
cn9k_nix_tx_queue_sec_count(void * tx_queue)33 cn9k_nix_tx_queue_sec_count(void *tx_queue)
34 {
35 struct cn9k_eth_txq *txq = (struct cn9k_eth_txq *)tx_queue;
36
37 return cnxk_nix_tx_queue_sec_count(txq->fc_mem, txq->sqes_per_sqb_log2, txq->cpt_fc);
38 }
39
40 static void
cn9k_eth_set_tx_tmplt_func(struct rte_eth_dev * eth_dev)41 cn9k_eth_set_tx_tmplt_func(struct rte_eth_dev *eth_dev)
42 {
43 #if !defined(CNXK_DIS_TMPLT_FUNC)
44 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
45
46 const eth_tx_burst_t nix_eth_tx_burst[NIX_TX_OFFLOAD_MAX] = {
47 #define T(name, sz, flags)[flags] = cn9k_nix_xmit_pkts_##name,
48 NIX_TX_FASTPATH_MODES
49 #undef T
50 };
51
52 const eth_tx_burst_t nix_eth_tx_burst_mseg[NIX_TX_OFFLOAD_MAX] = {
53 #define T(name, sz, flags)[flags] = cn9k_nix_xmit_pkts_mseg_##name,
54 NIX_TX_FASTPATH_MODES
55 #undef T
56 };
57
58 const eth_tx_burst_t nix_eth_tx_vec_burst[NIX_TX_OFFLOAD_MAX] = {
59 #define T(name, sz, flags)[flags] = cn9k_nix_xmit_pkts_vec_##name,
60 NIX_TX_FASTPATH_MODES
61 #undef T
62 };
63
64 const eth_tx_burst_t nix_eth_tx_vec_burst_mseg[NIX_TX_OFFLOAD_MAX] = {
65 #define T(name, sz, flags)[flags] = cn9k_nix_xmit_pkts_vec_mseg_##name,
66 NIX_TX_FASTPATH_MODES
67 #undef T
68 };
69
70 if (dev->scalar_ena || dev->tx_mark) {
71 pick_tx_func(eth_dev, nix_eth_tx_burst);
72 if (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
73 pick_tx_func(eth_dev, nix_eth_tx_burst_mseg);
74 } else {
75 pick_tx_func(eth_dev, nix_eth_tx_vec_burst);
76 if (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
77 pick_tx_func(eth_dev, nix_eth_tx_vec_burst_mseg);
78 }
79 #else
80 RTE_SET_USED(eth_dev);
81 #endif
82 }
83
84 static void
cn9k_eth_set_tx_blk_func(struct rte_eth_dev * eth_dev)85 cn9k_eth_set_tx_blk_func(struct rte_eth_dev *eth_dev)
86 {
87 #if defined(CNXK_DIS_TMPLT_FUNC)
88 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
89 struct cn9k_eth_txq *txq;
90 int i;
91
92 for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
93 txq = (struct cn9k_eth_txq *)eth_dev->data->tx_queues[i];
94 txq->tx_offload_flags = dev->tx_offload_flags;
95 }
96
97 if (dev->scalar_ena || dev->tx_mark)
98 eth_dev->tx_pkt_burst = cn9k_nix_xmit_pkts_all_offload;
99 else
100 eth_dev->tx_pkt_burst = cn9k_nix_xmit_pkts_vec_all_offload;
101
102 if (eth_dev->data->dev_started)
103 rte_eth_fp_ops[eth_dev->data->port_id].tx_pkt_burst = eth_dev->tx_pkt_burst;
104 #else
105 RTE_SET_USED(eth_dev);
106 #endif
107 }
108 #endif
109
110 void
cn9k_eth_set_tx_function(struct rte_eth_dev * eth_dev)111 cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev)
112 {
113 #if defined(RTE_ARCH_ARM64)
114 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
115
116 cn9k_eth_set_tx_blk_func(eth_dev);
117 cn9k_eth_set_tx_tmplt_func(eth_dev);
118
119 if (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY)
120 eth_dev->tx_queue_count = cn9k_nix_tx_queue_sec_count;
121 else
122 eth_dev->tx_queue_count = cn9k_nix_tx_queue_count;
123
124 rte_atomic_thread_fence(rte_memory_order_release);
125 #else
126 RTE_SET_USED(eth_dev);
127 #endif
128 }
129