1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2019-2023 Broadcom 3 * All rights reserved. 4 */ 5 6 #ifndef _TF_DEVICE_P58_H_ 7 #define _TF_DEVICE_P58_H_ 8 9 #include "cfa_resource_types.h" 10 #include "tf_core.h" 11 #include "tf_rm.h" 12 #include "tf_if_tbl.h" 13 #include "tf_global_cfg.h" 14 15 extern struct tf_rm_element_cfg tf_tbl_p58[TF_DIR_MAX][TF_TBL_TYPE_MAX]; 16 17 struct tf_rm_element_cfg tf_ident_p58[TF_IDENT_TYPE_MAX] = { 18 [TF_IDENT_TYPE_L2_CTXT_HIGH] = { 19 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH, 20 0, 0 21 }, 22 [TF_IDENT_TYPE_L2_CTXT_LOW] = { 23 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW, 24 0, 0 25 }, 26 [TF_IDENT_TYPE_PROF_FUNC] = { 27 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_FUNC, 28 0, 0 29 }, 30 [TF_IDENT_TYPE_WC_PROF] = { 31 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID, 32 0, 0 33 }, 34 [TF_IDENT_TYPE_EM_PROF] = { 35 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_PROF_ID, 36 0, 0 37 }, 38 }; 39 40 struct tf_rm_element_cfg tf_tcam_p58[TF_TCAM_TBL_TYPE_MAX] = { 41 [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = { 42 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH, 43 0, 0 44 }, 45 [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = { 46 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW, 47 0, 0 48 }, 49 [TF_TCAM_TBL_TYPE_PROF_TCAM] = { 50 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_TCAM, 51 0, 0 52 }, 53 [TF_TCAM_TBL_TYPE_WC_TCAM] = { 54 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM, 55 0, 0 56 }, 57 [TF_TCAM_TBL_TYPE_VEB_TCAM] = { 58 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_VEB_TCAM, 59 0, 0 60 }, 61 }; 62 63 struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = { 64 [TF_EM_TBL_TYPE_EM_RECORD] = { 65 TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P58_EM_REC, 66 0, 0 67 }, 68 }; 69 70 struct tf_if_tbl_cfg tf_if_tbl_p58[TF_IF_TBL_TYPE_MAX] = { 71 [TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR] = { 72 TF_IF_TBL_CFG, CFA_P58_TBL_PROF_PARIF_DFLT_ACT_REC_PTR}, 73 [TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR] = { 74 TF_IF_TBL_CFG, CFA_P58_TBL_PROF_PARIF_ERR_ACT_REC_PTR}, 75 [TF_IF_TBL_TYPE_ILT] = { 76 TF_IF_TBL_CFG, CFA_P58_TBL_ILT}, 77 [TF_IF_TBL_TYPE_VSPT] = { 78 TF_IF_TBL_CFG, CFA_P58_TBL_VSPT}, 79 }; 80 81 struct tf_global_cfg_cfg tf_global_cfg_p58[TF_GLOBAL_CFG_TYPE_MAX] = { 82 [TF_TUNNEL_ENCAP] = { 83 TF_GLOBAL_CFG_CFG_HCAPI, TF_TUNNEL_ENCAP 84 }, 85 [TF_ACTION_BLOCK] = { 86 TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK 87 }, 88 [TF_COUNTER_CFG] = { 89 TF_GLOBAL_CFG_CFG_HCAPI, TF_COUNTER_CFG 90 }, 91 [TF_METER_CFG] = { 92 TF_GLOBAL_CFG_CFG_HCAPI, TF_METER_CFG 93 }, 94 [TF_METER_INTERVAL_CFG] = { 95 TF_GLOBAL_CFG_CFG_HCAPI, TF_METER_INTERVAL_CFG 96 }, 97 }; 98 99 const struct tf_hcapi_resource_map tf_hcapi_res_map_p58[CFA_RESOURCE_TYPE_P58_LAST + 1] = { 100 [CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH] = { 101 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_L2_CTXT_HIGH 102 }, 103 [CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW] = { 104 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_L2_CTXT_LOW 105 }, 106 [CFA_RESOURCE_TYPE_P58_PROF_FUNC] = { 107 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_PROF_FUNC 108 }, 109 [CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID] = { 110 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_WC_PROF 111 }, 112 [CFA_RESOURCE_TYPE_P58_EM_PROF_ID] = { 113 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_EM_PROF 114 }, 115 [CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH] = { 116 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH 117 }, 118 [CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW] = { 119 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW 120 }, 121 [CFA_RESOURCE_TYPE_P58_PROF_TCAM] = { 122 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_PROF_TCAM 123 }, 124 [CFA_RESOURCE_TYPE_P58_WC_TCAM] = { 125 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_WC_TCAM 126 }, 127 [CFA_RESOURCE_TYPE_P58_VEB_TCAM] = { 128 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_VEB_TCAM 129 }, 130 [CFA_RESOURCE_TYPE_P58_EM_FKB] = { 131 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_EM_FKB 132 }, 133 [CFA_RESOURCE_TYPE_P58_WC_FKB] = { 134 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_WC_FKB 135 }, 136 [CFA_RESOURCE_TYPE_P58_METER_PROF] = { 137 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_METER_PROF 138 }, 139 [CFA_RESOURCE_TYPE_P58_METER] = { 140 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_METER_INST 141 }, 142 [CFA_RESOURCE_TYPE_P58_METER_DROP_CNT] = { 143 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_METER_DROP_CNT 144 }, 145 [CFA_RESOURCE_TYPE_P58_MIRROR] = { 146 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_MIRROR_CONFIG 147 }, 148 [CFA_RESOURCE_TYPE_P58_METADATA] = { 149 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_METADATA 150 }, 151 /* Resources in bank 1 */ 152 [CFA_RESOURCE_TYPE_P58_SRAM_BANK_1] = { 153 TF_MODULE_TYPE_TABLE, 154 1 << TF_TBL_TYPE_FULL_ACT_RECORD 155 | 1 << TF_TBL_TYPE_COMPACT_ACT_RECORD 156 }, 157 /* Resources in bank 2 */ 158 [CFA_RESOURCE_TYPE_P58_SRAM_BANK_2] = { 159 TF_MODULE_TYPE_TABLE, 160 1 << TF_TBL_TYPE_ACT_ENCAP_8B | 161 1 << TF_TBL_TYPE_ACT_ENCAP_16B | 162 1 << TF_TBL_TYPE_ACT_ENCAP_32B | 163 1 << TF_TBL_TYPE_ACT_ENCAP_64B | 164 1 << TF_TBL_TYPE_ACT_MODIFY_8B | 165 1 << TF_TBL_TYPE_ACT_MODIFY_16B | 166 1 << TF_TBL_TYPE_ACT_MODIFY_32B | 167 1 << TF_TBL_TYPE_ACT_MODIFY_64B 168 169 }, 170 /* Resources in bank 0 */ 171 [CFA_RESOURCE_TYPE_P58_SRAM_BANK_0] = { 172 TF_MODULE_TYPE_TABLE, 173 1 << TF_TBL_TYPE_ACT_SP_SMAC | 174 1 << TF_TBL_TYPE_ACT_SP_SMAC_IPV4 | 175 1 << TF_TBL_TYPE_ACT_SP_SMAC_IPV6 176 }, 177 /* Resources in bank 3 */ 178 [CFA_RESOURCE_TYPE_P58_SRAM_BANK_3] = { 179 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_STATS_64 180 }, 181 [CFA_RESOURCE_TYPE_P58_EM_REC] = { 182 TF_MODULE_TYPE_EM, 1 << TF_EM_TBL_TYPE_EM_RECORD 183 }, 184 }; 185 #endif /* _TF_DEVICE_P58_H_ */ 186