1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2007-2013 Broadcom Corporation. 3 * 4 * Eric Davis <edavis@broadcom.com> 5 * David Christensen <davidch@broadcom.com> 6 * Gary Zambrano <zambrano@broadcom.com> 7 * 8 * Copyright (c) 2014-2018 Cavium Inc. 9 * All rights reserved. 10 * www.cavium.com 11 */ 12 13 #ifndef ECORE_MFW_REQ_H 14 #define ECORE_MFW_REQ_H 15 16 17 #define PORT_0 0 18 #define PORT_1 1 19 #define PORT_MAX 2 20 #define NVM_PATH_MAX 2 21 22 /* FCoE capabilities required from the driver */ 23 struct fcoe_capabilities { 24 uint32_t capability1; 25 /* Maximum number of I/Os per connection */ 26 #define FCOE_IOS_PER_CONNECTION_MASK 0x0000ffff 27 #define FCOE_IOS_PER_CONNECTION_SHIFT 0 28 /* Maximum number of Logins per port */ 29 #define FCOE_LOGINS_PER_PORT_MASK 0xffff0000 30 #define FCOE_LOGINS_PER_PORT_SHIFT 16 31 32 uint32_t capability2; 33 /* Maximum number of exchanges */ 34 #define FCOE_NUMBER_OF_EXCHANGES_MASK 0x0000ffff 35 #define FCOE_NUMBER_OF_EXCHANGES_SHIFT 0 36 /* Maximum NPIV WWN per port */ 37 #define FCOE_NPIV_WWN_PER_PORT_MASK 0xffff0000 38 #define FCOE_NPIV_WWN_PER_PORT_SHIFT 16 39 40 uint32_t capability3; 41 /* Maximum number of targets supported */ 42 #define FCOE_TARGETS_SUPPORTED_MASK 0x0000ffff 43 #define FCOE_TARGETS_SUPPORTED_SHIFT 0 44 /* Maximum number of outstanding commands across all connections */ 45 #define FCOE_OUTSTANDING_COMMANDS_MASK 0xffff0000 46 #define FCOE_OUTSTANDING_COMMANDS_SHIFT 16 47 48 uint32_t capability4; 49 #define FCOE_CAPABILITY4_STATEFUL 0x00000001 50 #define FCOE_CAPABILITY4_STATELESS 0x00000002 51 #define FCOE_CAPABILITY4_CAPABILITIES_REPORTED_VALID 0x00000004 52 }; 53 54 struct glob_ncsi_oem_data 55 { 56 uint32_t driver_version; 57 uint32_t unused[3]; 58 struct fcoe_capabilities fcoe_features[NVM_PATH_MAX][PORT_MAX]; 59 }; 60 61 /* current drv_info version */ 62 #define DRV_INFO_CUR_VER 2 63 64 /* drv_info op codes supported */ 65 enum drv_info_opcode { 66 ETH_STATS_OPCODE, 67 FCOE_STATS_OPCODE, 68 ISCSI_STATS_OPCODE 69 }; 70 71 #define ETH_STAT_INFO_VERSION_LEN 12 72 /* Per PCI Function Ethernet Statistics required from the driver */ 73 struct eth_stats_info { 74 /* Function's Driver Version. padded to 12 */ 75 char version[ETH_STAT_INFO_VERSION_LEN]; 76 /* Locally Admin Addr. BigEndian EIU48. Actual size is 6 bytes */ 77 uint8_t mac_local[8]; 78 uint8_t mac_add1[8]; /* Additional Programmed MAC Addr 1. */ 79 uint8_t mac_add2[8]; /* Additional Programmed MAC Addr 2. */ 80 uint32_t mtu_size; /* MTU Size. Note : Negotiated MTU */ 81 uint32_t feature_flags; /* Feature_Flags. */ 82 #define FEATURE_ETH_CHKSUM_OFFLOAD_MASK 0x01 83 #define FEATURE_ETH_LSO_MASK 0x02 84 #define FEATURE_ETH_BOOTMODE_MASK 0x1C 85 #define FEATURE_ETH_BOOTMODE_SHIFT 2 86 #define FEATURE_ETH_BOOTMODE_NONE (0x0 << 2) 87 #define FEATURE_ETH_BOOTMODE_PXE (0x1 << 2) 88 #define FEATURE_ETH_BOOTMODE_ISCSI (0x2 << 2) 89 #define FEATURE_ETH_BOOTMODE_FCOE (0x3 << 2) 90 #define FEATURE_ETH_TOE_MASK 0x20 91 uint32_t lso_max_size; /* LSO MaxOffloadSize. */ 92 uint32_t lso_min_seg_cnt; /* LSO MinSegmentCount. */ 93 /* Num Offloaded Connections TCP_IPv4. */ 94 uint32_t ipv4_ofld_cnt; 95 /* Num Offloaded Connections TCP_IPv6. */ 96 uint32_t ipv6_ofld_cnt; 97 uint32_t promiscuous_mode; /* Promiscuous Mode. non-zero true */ 98 uint32_t txq_size; /* TX Descriptors Queue Size */ 99 uint32_t rxq_size; /* RX Descriptors Queue Size */ 100 /* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */ 101 uint32_t txq_avg_depth; 102 /* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */ 103 uint32_t rxq_avg_depth; 104 /* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/ 105 uint32_t iov_offload; 106 /* Number of NetQueue/VMQ Config'd. */ 107 uint32_t netq_cnt; 108 uint32_t vf_cnt; /* Num VF assigned to this PF. */ 109 }; 110 111 /* Per PCI Function FCOE Statistics required from the driver */ 112 struct fcoe_stats_info { 113 uint8_t version[12]; /* Function's Driver Version. */ 114 uint8_t mac_local[8]; /* Locally Admin Addr. */ 115 uint8_t mac_add1[8]; /* Additional Programmed MAC Addr 1. */ 116 uint8_t mac_add2[8]; /* Additional Programmed MAC Addr 2. */ 117 /* QoS Priority (per 802.1p). 0-7255 */ 118 uint32_t qos_priority; 119 uint32_t txq_size; /* FCoE TX Descriptors Queue Size. */ 120 uint32_t rxq_size; /* FCoE RX Descriptors Queue Size. */ 121 /* FCoE TX Descriptor Queue Avg Depth. */ 122 uint32_t txq_avg_depth; 123 /* FCoE RX Descriptors Queue Avg Depth. */ 124 uint32_t rxq_avg_depth; 125 uint32_t rx_frames_lo; /* FCoE RX Frames received. */ 126 uint32_t rx_frames_hi; /* FCoE RX Frames received. */ 127 uint32_t rx_bytes_lo; /* FCoE RX Bytes received. */ 128 uint32_t rx_bytes_hi; /* FCoE RX Bytes received. */ 129 uint32_t tx_frames_lo; /* FCoE TX Frames sent. */ 130 uint32_t tx_frames_hi; /* FCoE TX Frames sent. */ 131 uint32_t tx_bytes_lo; /* FCoE TX Bytes sent. */ 132 uint32_t tx_bytes_hi; /* FCoE TX Bytes sent. */ 133 uint32_t rx_fcs_errors; /* number of receive packets with FCS errors */ 134 uint32_t rx_fc_crc_errors; /* number of FC frames with CRC errors*/ 135 uint32_t fip_login_failures; /* number of FCoE/FIP Login failures */ 136 }; 137 138 /* Per PCI Function iSCSI Statistics required from the driver*/ 139 struct iscsi_stats_info { 140 uint8_t version[12]; /* Function's Driver Version. */ 141 uint8_t mac_local[8]; /* Locally Admin iSCSI MAC Addr. */ 142 uint8_t mac_add1[8]; /* Additional Programmed MAC Addr 1. */ 143 /* QoS Priority (per 802.1p). 0-7255 */ 144 uint32_t qos_priority; 145 #define ISCSI_QOS_PRIORITY_OFFSET 0 146 #define ISCSI_QOS_PRIORITY_MASK (0xffff) 147 148 #define ISCSI_IP_ADDRESS_TYPE_OFFSET 30 149 #define ISCSI_IP_ADDRESS_TYPE_MASK (3 << 30) 150 /* Driver does not have the IP address and type populated */ 151 #define ISCSI_IP_ADDRESS_TYPE_NOT_SET (0 << 30) 152 #define ISCSI_IP_ADDRESS_TYPE_IPV4 (1 << 30) /* IPV4 IP address set */ 153 #define ISCSI_IP_ADDRESS_TYPE_IPV6 (2 << 30) /* IPV6 IP address set */ 154 155 uint8_t initiator_name[64]; /* iSCSI Boot Initiator Node name. */ 156 157 uint8_t ww_port_name[64]; /* iSCSI World wide port name */ 158 159 uint8_t boot_target_name[64];/* iSCSI Boot Target Name. */ 160 161 uint8_t boot_target_ip[16]; /* iSCSI Boot Target IP. */ 162 uint32_t boot_target_portal; /* iSCSI Boot Target Portal. */ 163 uint8_t boot_init_ip[16]; /* iSCSI Boot Initiator IP Address. */ 164 uint32_t max_frame_size; /* Max Frame Size. bytes */ 165 uint32_t txq_size; /* PDU TX Descriptors Queue Size. */ 166 uint32_t rxq_size; /* PDU RX Descriptors Queue Size. */ 167 168 uint32_t txq_avg_depth; /*PDU TX Descriptor Queue Avg Depth. */ 169 uint32_t rxq_avg_depth; /*PDU RX Descriptors Queue Avg Depth. */ 170 uint32_t rx_pdus_lo; /* iSCSI PDUs received. */ 171 uint32_t rx_pdus_hi; /* iSCSI PDUs received. */ 172 173 uint32_t rx_bytes_lo; /* iSCSI RX Bytes received. */ 174 uint32_t rx_bytes_hi; /* iSCSI RX Bytes received. */ 175 uint32_t tx_pdus_lo; /* iSCSI PDUs sent. */ 176 uint32_t tx_pdus_hi; /* iSCSI PDUs sent. */ 177 178 uint32_t tx_bytes_lo; /* iSCSI PDU TX Bytes sent. */ 179 uint32_t tx_bytes_hi; /* iSCSI PDU TX Bytes sent. */ 180 uint32_t pcp_prior_map_tbl; /*C-PCP to S-PCP Priority MapTable. 181 9 nibbles, the position of each nibble 182 represents the C-PCP value, the value 183 of the nibble = S-PCP value.*/ 184 }; 185 186 union drv_info_to_mcp { 187 struct eth_stats_info ether_stat; 188 struct fcoe_stats_info fcoe_stat; 189 struct iscsi_stats_info iscsi_stat; 190 }; 191 192 #endif /* ECORE_MFW_REQ_H */ 193