1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2015-2018 Atomic Rules LLC 3 */ 4 5 #ifndef _ARK_UDM_H_ 6 #define _ARK_UDM_H_ 7 8 #include <stdint.h> 9 10 #include <rte_memory.h> 11 12 /* The UDM or Upstream Data Mover is an internal Arkville hardware 13 * module for moving packet from the RX packet streams to host memory. 14 * This module is *not* intended for end-user manipulation, hence 15 * there is minimal documentation. 16 */ 17 18 /* Meta data structure passed from FPGA, must match layout in FPGA 19 * -- 32 bytes 20 */ 21 struct __rte_packed_begin ark_rx_meta { 22 uint32_t user_meta[5]; /* user defined based on fpga code */ 23 uint32_t pkt_len32; 24 uint8_t reserved[6]; 25 uint16_t pkt_len; 26 } __rte_packed_end; 27 28 /* 29 * UDM hardware structures 30 * These are overlay structures to a memory mapped FPGA device. These 31 * structs will never be instantiated in ram memory 32 */ 33 34 #define ARK_RX_WRITE_TIME_NS 2500 35 #define ARK_UDM_SETUP 0 36 #define ARK_UDM_MODID 0x4d445500 37 #define ARK_UDM_MODVER 0x37333332 38 39 struct ark_udm_setup_t { 40 union { 41 char id[4]; 42 uint32_t idnum; 43 }; 44 union { 45 char ver[4]; 46 uint32_t vernum; 47 }; 48 uint32_t r0; 49 uint32_t const0; 50 }; 51 52 #define ARK_UDM_CFG 0x010 53 struct ark_udm_cfg_t { 54 uint32_t write_interval; /* 4ns cycles */ 55 volatile uint32_t command; 56 uint32_t dataroom; 57 uint32_t headroom; 58 }; 59 60 typedef enum { 61 ARK_UDM_START = 0x1, 62 ARK_UDM_STOP = 0x2, 63 ARK_UDM_RESET = 0x3 64 } ark_udm_commands; 65 66 #define ARK_UDM_STATS 0x020 67 struct ark_udm_stats_t { 68 volatile uint64_t rx_byte_count; 69 volatile uint64_t rx_packet_count; 70 volatile uint64_t rx_mbuf_count; 71 volatile uint64_t rx_sent_packets; 72 }; 73 74 #define ARK_UDM_PQ 0x040 75 struct ark_udm_queue_stats_t { 76 volatile uint64_t q_byte_count; 77 volatile uint64_t q_packet_count; /* includes drops */ 78 volatile uint64_t q_mbuf_count; 79 volatile uint64_t q_ff_packet_count; 80 volatile uint64_t q_pkt_drop; 81 uint32_t q_enable; 82 }; 83 84 #define ARK_UDM_RT_CFG 0x00e0 85 struct ark_udm_rt_cfg_t { 86 rte_iova_t hw_prod_addr; 87 uint32_t reserved; 88 volatile uint32_t prod_idx; /* Updated by HW */ 89 }; 90 91 /* Consolidated structure */ 92 #define ARK_UDM_EXPECT_SIZE (0x00fc + 4) 93 #define ARK_UDM_QOFFSET ARK_UDM_EXPECT_SIZE 94 struct ark_udm_t { 95 struct ark_udm_setup_t setup; 96 struct ark_udm_cfg_t cfg; 97 struct ark_udm_stats_t stats; 98 struct ark_udm_queue_stats_t qstats; 99 uint8_t reserved1[(ARK_UDM_RT_CFG - ARK_UDM_PQ) - 100 sizeof(struct ark_udm_queue_stats_t)]; 101 struct ark_udm_rt_cfg_t rt_cfg; 102 int8_t reserved3[(ARK_UDM_EXPECT_SIZE - ARK_UDM_RT_CFG) - 103 sizeof(struct ark_udm_rt_cfg_t)]; 104 }; 105 106 107 int ark_udm_verify(struct ark_udm_t *udm); 108 void ark_udm_configure(struct ark_udm_t *udm, 109 uint32_t headroom, 110 uint32_t dataroom); 111 void ark_udm_write_addr(struct ark_udm_t *udm, rte_iova_t addr); 112 void ark_udm_dump_stats(struct ark_udm_t *udm, const char *msg); 113 void ark_udm_dump_queue_stats(struct ark_udm_t *udm, const char *msg, 114 uint16_t qid); 115 void ark_udm_dump_setup(struct ark_udm_t *udm, uint16_t q_id); 116 117 /* Per queue data */ 118 uint64_t ark_udm_dropped(struct ark_udm_t *udm); 119 uint64_t ark_udm_bytes(struct ark_udm_t *udm); 120 uint64_t ark_udm_packets(struct ark_udm_t *udm); 121 122 void ark_udm_queue_stats_reset(struct ark_udm_t *udm); 123 void ark_udm_queue_enable(struct ark_udm_t *udm, int enable); 124 125 #endif 126