1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2015-2018 Atomic Rules LLC 3 */ 4 5 #ifndef _ARK_DDM_H_ 6 #define _ARK_DDM_H_ 7 8 #include <stdint.h> 9 10 #include <rte_memory.h> 11 12 13 /* The DDM or Downstream Data Mover is an internal Arkville hardware 14 * module for moving packet from host memory to the TX packet streams. 15 * This module is *not* intended for end-user manipulation, hence 16 * there is minimal documentation. 17 */ 18 19 /* struct defining Tx meta data -- fixed in FPGA -- 8 bytes */ 20 union __rte_packed_begin ark_tx_meta { 21 uint64_t physaddr; 22 struct { 23 uint32_t usermeta0; 24 uint32_t usermeta1; 25 }; 26 struct { 27 uint16_t data_len; /* of this MBUF */ 28 #define ARK_DDM_EOP 0x01 29 #define ARK_DDM_SOP 0x02 30 uint8_t flags; 31 uint8_t meta_cnt; 32 uint32_t user1; 33 }; 34 } __rte_packed_end; 35 36 /* 37 * DDM core hardware structures 38 * These are overlay structures to a memory mapped FPGA device. These 39 * structs will never be instantiated in ram memory 40 */ 41 #define ARK_DDM_CFG 0x0000 42 /* Set unique HW ID for hardware version */ 43 #define ARK_DDM_MODID 0x204d4444 44 #define ARK_DDM_MODVER 0x37313232 45 46 struct ark_ddm_cfg_t { 47 union { 48 char id[4]; 49 uint32_t idnum; 50 }; 51 union { 52 char ver[4]; 53 uint32_t vernum; 54 volatile uint32_t tlp_stats_clear; 55 }; 56 uint32_t r0; 57 volatile uint32_t tag_max; 58 volatile uint32_t command; 59 uint32_t write_index_interval; /* 4ns each */ 60 volatile uint64_t qflow; 61 }; 62 63 #define ARK_DDM_STATS 0x0020 64 struct ark_ddm_stats_t { 65 volatile uint64_t tx_byte_count; 66 volatile uint64_t tx_pkt_count; 67 volatile uint64_t tx_mbuf_count; 68 }; 69 70 #define ARK_DDM_QUEUE_STATS 0x00a8 71 struct ark_ddm_qstats_t { 72 volatile uint64_t byte_count; 73 volatile uint64_t pkt_count; 74 volatile uint64_t mbuf_count; 75 }; 76 77 #define ARK_DDM_SETUP 0x00e0 78 struct ark_ddm_setup_t { 79 rte_iova_t cons_write_index_addr; 80 volatile uint32_t qcommand; 81 volatile uint32_t cons_index; 82 }; 83 84 #define ARK_DDM_EXPECTED_SIZE 256 85 #define ARK_DDM_QOFFSET ARK_DDM_EXPECTED_SIZE 86 /* Consolidated structure */ 87 struct ark_ddm_t { 88 struct ark_ddm_cfg_t cfg; 89 uint8_t reserved0[(ARK_DDM_STATS - ARK_DDM_CFG) - 90 sizeof(struct ark_ddm_cfg_t)]; 91 92 struct ark_ddm_stats_t stats; 93 uint8_t reserved1[(ARK_DDM_QUEUE_STATS - ARK_DDM_STATS) - 94 sizeof(struct ark_ddm_stats_t)]; 95 96 struct ark_ddm_qstats_t queue_stats; 97 uint8_t reserved5[(ARK_DDM_SETUP - ARK_DDM_QUEUE_STATS) - 98 sizeof(struct ark_ddm_qstats_t)]; 99 100 struct ark_ddm_setup_t setup; 101 uint8_t reserved_p[(ARK_DDM_EXPECTED_SIZE - ARK_DDM_SETUP) - 102 sizeof(struct ark_ddm_setup_t)]; 103 }; 104 105 /* DDM function prototype */ 106 int ark_ddm_verify(struct ark_ddm_t *ddm); 107 void ark_ddm_stats_reset(struct ark_ddm_t *ddm); 108 void ark_ddm_queue_setup(struct ark_ddm_t *ddm, rte_iova_t cons_addr); 109 void ark_ddm_dump_stats(struct ark_ddm_t *ddm, const char *msg); 110 uint64_t ark_ddm_queue_byte_count(struct ark_ddm_t *ddm); 111 uint64_t ark_ddm_queue_pkt_count(struct ark_ddm_t *ddm); 112 void ark_ddm_queue_reset_stats(struct ark_ddm_t *ddm); 113 void ark_ddm_queue_enable(struct ark_ddm_t *ddm, int enable); 114 115 #endif 116