xref: /dpdk/drivers/event/sw/sw_evdev.h (revision 88ca872150d0b61b4e6ffcb96f5cecc9e781adb5)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2016-2017 Intel Corporation
3  */
4 
5 #ifndef _SW_EVDEV_H_
6 #define _SW_EVDEV_H_
7 
8 #include "sw_evdev_log.h"
9 #include <rte_eventdev.h>
10 #include <eventdev_pmd_vdev.h>
11 #include <rte_atomic.h>
12 
13 #define SW_DEFAULT_CREDIT_QUANTA 32
14 #define SW_DEFAULT_SCHED_QUANTA 128
15 #define SW_QID_NUM_FIDS 16384
16 #define SW_IQS_MAX 4
17 #define SW_Q_PRIORITY_MAX 255
18 #define SW_PORTS_MAX 64
19 #define MAX_SW_CONS_Q_DEPTH 128
20 #define SW_INFLIGHT_EVENTS_TOTAL 4096
21 /* allow for lots of over-provisioning */
22 #define MAX_SW_PROD_Q_DEPTH 4096
23 #define SW_FRAGMENTS_MAX 16
24 
25 /* Should be power-of-two minus one, to leave room for the next pointer */
26 #define SW_EVS_PER_Q_CHUNK 255
27 #define SW_Q_CHUNK_SIZE ((SW_EVS_PER_Q_CHUNK + 1) * sizeof(struct rte_event))
28 
29 /* report dequeue burst sizes in buckets */
30 #define SW_DEQ_STAT_BUCKET_SHIFT 2
31 /* how many packets pulled from port by sched */
32 #define SCHED_DEQUEUE_DEFAULT_BURST_SIZE 32
33 /* max buffer size */
34 #define SCHED_DEQUEUE_MAX_BURST_SIZE 256
35 
36 /* Flush the pipeline after this many no enq to cq */
37 #define SCHED_NO_ENQ_CYCLE_FLUSH 256
38 
39 
40 #define SW_PORT_HIST_LIST (MAX_SW_PROD_Q_DEPTH) /* size of our history list */
41 #define NUM_SAMPLES 64 /* how many data points use for average stats */
42 
43 #define EVENTDEV_NAME_SW_PMD event_sw
44 #define SW_PMD_NAME RTE_STR(event_sw)
45 #define SW_PMD_NAME_MAX 64
46 
47 #define SW_SCHED_TYPE_DIRECT (RTE_SCHED_TYPE_PARALLEL + 1)
48 
49 #define SW_NUM_POLL_BUCKETS (MAX_SW_CONS_Q_DEPTH >> SW_DEQ_STAT_BUCKET_SHIFT)
50 
51 enum {
52 	QE_FLAG_VALID_SHIFT = 0,
53 	QE_FLAG_COMPLETE_SHIFT,
54 	QE_FLAG_NOT_EOP_SHIFT,
55 	_QE_FLAG_COUNT
56 };
57 
58 #define QE_FLAG_VALID    (1 << QE_FLAG_VALID_SHIFT)    /* for NEW FWD, FRAG */
59 #define QE_FLAG_COMPLETE (1 << QE_FLAG_COMPLETE_SHIFT) /* set for FWD, DROP  */
60 #define QE_FLAG_NOT_EOP  (1 << QE_FLAG_NOT_EOP_SHIFT)  /* set for FRAG only  */
61 
62 static const uint8_t sw_qe_flag_map[] = {
63 		QE_FLAG_VALID /* NEW Event */,
64 		QE_FLAG_VALID | QE_FLAG_COMPLETE /* FWD Event */,
65 		QE_FLAG_COMPLETE /* RELEASE Event */,
66 
67 		/* Values which can be used for future support for partial
68 		 * events, i.e. where one event comes back to the scheduler
69 		 * as multiple which need to be tracked together
70 		 */
71 		QE_FLAG_VALID | QE_FLAG_COMPLETE | QE_FLAG_NOT_EOP,
72 };
73 
74 /* Records basic event stats at a given point. Used in port and qid structs */
75 struct sw_point_stats {
76 	uint64_t rx_pkts;
77 	uint64_t rx_dropped;
78 	uint64_t tx_pkts;
79 };
80 
81 /* structure used to track what port a flow (FID) is pinned to */
82 struct sw_fid_t {
83 	/* which CQ this FID is currently pinned to */
84 	int32_t cq;
85 	/* number of packets gone to the CQ with this FID */
86 	uint32_t pcount;
87 };
88 
89 struct reorder_buffer_entry {
90 	uint16_t num_fragments;		/**< Number of packet fragments */
91 	uint16_t fragment_index;	/**< Points to the oldest valid frag */
92 	uint8_t ready;			/**< Entry is ready to be reordered */
93 	struct rte_event fragments[SW_FRAGMENTS_MAX];
94 };
95 
96 struct sw_iq {
97 	struct sw_queue_chunk *head;
98 	struct sw_queue_chunk *tail;
99 	uint16_t head_idx;
100 	uint16_t tail_idx;
101 	uint16_t count;
102 };
103 
104 struct sw_qid {
105 	/* set when the QID has been initialized */
106 	uint8_t initialized;
107 	/* The type of this QID */
108 	int8_t type;
109 	/* Integer ID representing the queue. This is used in history lists,
110 	 * to identify the stage of processing.
111 	 */
112 	uint32_t id;
113 	struct sw_point_stats stats;
114 
115 	/* Internal priority rings for packets */
116 	struct sw_iq iq[SW_IQS_MAX];
117 	uint32_t iq_pkt_mask; /* A mask to indicate packets in an IQ */
118 	uint64_t iq_pkt_count[SW_IQS_MAX];
119 
120 	/* Information on what CQs are polling this IQ */
121 	uint32_t cq_num_mapped_cqs;
122 	uint32_t cq_next_tx; /* cq to write next (non-atomic) packet */
123 	uint32_t cq_map[SW_PORTS_MAX];
124 	uint64_t to_port[SW_PORTS_MAX];
125 
126 	/* Track flow ids for atomic load balancing */
127 	struct sw_fid_t fids[SW_QID_NUM_FIDS];
128 
129 	/* Track packet order for reordering when needed */
130 	struct reorder_buffer_entry *reorder_buffer; /*< pkts await reorder */
131 	struct rob_ring *reorder_buffer_freelist; /* available reorder slots */
132 	uint32_t reorder_buffer_index; /* oldest valid reorder buffer entry */
133 	uint32_t window_size;          /* Used to wrap reorder_buffer_index */
134 
135 	uint8_t priority;
136 };
137 
138 struct sw_hist_list_entry {
139 	int32_t qid;
140 	int32_t fid;
141 	struct reorder_buffer_entry *rob_entry;
142 };
143 
144 struct sw_evdev;
145 
146 struct sw_port {
147 	/* new enqueue / dequeue API doesn't have an instance pointer, only the
148 	 * pointer to the port being enqueue/dequeued from
149 	 */
150 	struct sw_evdev *sw;
151 
152 	/* set when the port is initialized */
153 	uint8_t initialized;
154 	/* A numeric ID for the port */
155 	uint8_t id;
156 
157 	/* An atomic counter for when the port has been unlinked, and the
158 	 * scheduler has not yet acked this unlink - hence there may still be
159 	 * events in the buffers going to the port. When the unlinks in
160 	 * progress is read by the scheduler, no more events will be pushed to
161 	 * the port - hence the scheduler core can just assign zero.
162 	 */
163 	uint8_t unlinks_in_progress;
164 
165 	int16_t is_directed; /** Takes from a single directed QID */
166 	/**
167 	 * For loadbalanced we can optimise pulling packets from
168 	 * producers if there is no reordering involved
169 	 */
170 	int16_t num_ordered_qids;
171 
172 	/** Ring and buffer for pulling events from workers for scheduling */
173 	alignas(RTE_CACHE_LINE_SIZE) struct rte_event_ring *rx_worker_ring;
174 	/** Ring and buffer for pushing packets to workers after scheduling */
175 	struct rte_event_ring *cq_worker_ring;
176 
177 	/* hole */
178 
179 	/* num releases yet to be completed on this port */
180 	alignas(RTE_CACHE_LINE_SIZE) uint16_t outstanding_releases;
181 	uint16_t inflight_max; /* app requested max inflights for this port */
182 	uint16_t inflight_credits; /* num credits this port has right now */
183 	uint8_t implicit_release; /* release events before dequeuing */
184 
185 	uint16_t last_dequeue_burst_sz; /* how big the burst was */
186 	uint64_t last_dequeue_ticks; /* used to track burst processing time */
187 	uint64_t avg_pkt_ticks;      /* tracks average over NUM_SAMPLES burst */
188 	uint64_t total_polls;        /* how many polls were counted in stats */
189 	uint64_t zero_polls;         /* tracks polls returning nothing */
190 	uint32_t poll_buckets[SW_NUM_POLL_BUCKETS];
191 		/* bucket values in 4s for shorter reporting */
192 
193 	/* History list structs, containing info on pkts egressed to worker */
194 	alignas(RTE_CACHE_LINE_SIZE) uint16_t hist_head;
195 	uint16_t hist_tail;
196 	uint16_t inflights;
197 	struct sw_hist_list_entry hist_list[SW_PORT_HIST_LIST];
198 
199 	/* track packets in and out of this port */
200 	struct sw_point_stats stats;
201 
202 
203 	uint32_t pp_buf_start;
204 	uint32_t pp_buf_count;
205 	uint16_t cq_buf_count;
206 	struct rte_event pp_buf[SCHED_DEQUEUE_MAX_BURST_SIZE];
207 	struct rte_event cq_buf[MAX_SW_CONS_Q_DEPTH];
208 
209 	uint8_t num_qids_mapped;
210 };
211 
212 struct sw_evdev {
213 	struct rte_eventdev_data *data;
214 
215 	uint32_t port_count;
216 	uint32_t qid_count;
217 	uint32_t xstats_count;
218 	struct sw_xstats_entry *xstats;
219 	uint32_t xstats_count_mode_dev;
220 	uint32_t xstats_count_mode_port;
221 	uint32_t xstats_count_mode_queue;
222 
223 	/* Minimum burst size*/
224 	alignas(RTE_CACHE_LINE_SIZE) uint32_t sched_min_burst_size;
225 	/* Port dequeue burst size*/
226 	uint32_t sched_deq_burst_size;
227 	/* Refill pp buffers only once per scheduler call*/
228 	uint32_t refill_once_per_iter;
229 	/* Current values */
230 	uint32_t sched_flush_count;
231 	uint32_t sched_min_burst;
232 
233 	/* Contains all ports - load balanced and directed */
234 	alignas(RTE_CACHE_LINE_SIZE) struct sw_port ports[SW_PORTS_MAX];
235 
236 	alignas(RTE_CACHE_LINE_SIZE) rte_atomic32_t inflights;
237 
238 	/*
239 	 * max events in this instance. Cached here for performance.
240 	 * (also available in data->conf.nb_events_limit)
241 	 */
242 	uint32_t nb_events_limit;
243 
244 	/* Internal queues - one per logical queue */
245 	alignas(RTE_CACHE_LINE_SIZE) struct sw_qid qids[RTE_EVENT_MAX_QUEUES_PER_DEV];
246 	struct sw_queue_chunk *chunk_list_head;
247 	struct sw_queue_chunk *chunks;
248 
249 	/* Cache how many packets are in each cq */
250 	alignas(RTE_CACHE_LINE_SIZE) uint16_t cq_ring_space[SW_PORTS_MAX];
251 
252 	/* Array of pointers to load-balanced QIDs sorted by priority level */
253 	struct sw_qid *qids_prioritized[RTE_EVENT_MAX_QUEUES_PER_DEV];
254 
255 	/* Stats */
256 	alignas(RTE_CACHE_LINE_SIZE) struct sw_point_stats stats;
257 	uint64_t sched_called;
258 	int32_t sched_quanta;
259 	uint64_t sched_no_iq_enqueues;
260 	uint64_t sched_no_cq_enqueues;
261 	uint64_t sched_cq_qid_called;
262 	uint64_t sched_last_iter_bitmask;
263 	uint8_t sched_progress_last_iter;
264 
265 	uint8_t started;
266 	uint32_t credit_update_quanta;
267 
268 	/* store num stats and offset of the stats for each port */
269 	uint16_t xstats_count_per_port[SW_PORTS_MAX];
270 	uint16_t xstats_offset_for_port[SW_PORTS_MAX];
271 	/* store num stats and offset of the stats for each queue */
272 	uint16_t xstats_count_per_qid[RTE_EVENT_MAX_QUEUES_PER_DEV];
273 	uint16_t xstats_offset_for_qid[RTE_EVENT_MAX_QUEUES_PER_DEV];
274 
275 	uint32_t service_id;
276 	char service_name[SW_PMD_NAME_MAX];
277 };
278 
279 static inline struct sw_evdev *
280 sw_pmd_priv(const struct rte_eventdev *eventdev)
281 {
282 	return eventdev->data->dev_private;
283 }
284 
285 static inline const struct sw_evdev *
286 sw_pmd_priv_const(const struct rte_eventdev *eventdev)
287 {
288 	return eventdev->data->dev_private;
289 }
290 
291 uint16_t sw_event_enqueue_burst(void *port, const struct rte_event ev[],
292 		uint16_t num);
293 
294 uint16_t sw_event_dequeue_burst(void *port, struct rte_event *ev, uint16_t num,
295 			uint64_t wait);
296 int32_t sw_event_schedule(struct rte_eventdev *dev);
297 int sw_xstats_init(struct sw_evdev *dev);
298 int sw_xstats_uninit(struct sw_evdev *dev);
299 int sw_xstats_get_names(const struct rte_eventdev *dev,
300 	enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id,
301 	struct rte_event_dev_xstats_name *xstats_names,
302 	uint64_t *ids, unsigned int size);
303 int sw_xstats_get(const struct rte_eventdev *dev,
304 		enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id,
305 		const uint64_t ids[], uint64_t values[], unsigned int n);
306 uint64_t sw_xstats_get_by_name(const struct rte_eventdev *dev,
307 		const char *name, uint64_t *id);
308 int sw_xstats_reset(struct rte_eventdev *dev,
309 		enum rte_event_dev_xstats_mode mode,
310 		int16_t queue_port_id,
311 		const uint64_t ids[],
312 		uint32_t nb_ids);
313 
314 int test_sw_eventdev(void);
315 
316 #endif /* _SW_EVDEV_H_ */
317