1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2022 Intel Corporation
3 */
4
5 #ifndef _QAT_ASYM_H_
6 #define _QAT_ASYM_H_
7
8 #include <cryptodev_pmd.h>
9 #include <rte_crypto_asym.h>
10 #include "icp_qat_fw_pke.h"
11 #include "qat_device.h"
12 #include "qat_crypto.h"
13 #include "icp_qat_fw.h"
14
15 /** Intel(R) QAT Asymmetric Crypto PMD driver name */
16 #define CRYPTODEV_NAME_QAT_ASYM_PMD crypto_qat_asym
17
18 typedef uint64_t large_int_ptr;
19 #define MAX_PKE_PARAMS 8
20 #define QAT_PKE_MAX_LN_SIZE 512
21
22 #define QAT_ASYM_MAX_PARAMS 8
23 #define QAT_ASYM_MODINV_NUM_IN_PARAMS 2
24 #define QAT_ASYM_MODINV_NUM_OUT_PARAMS 1
25 #define QAT_ASYM_MODEXP_NUM_IN_PARAMS 3
26 #define QAT_ASYM_MODEXP_NUM_OUT_PARAMS 1
27 #define QAT_ASYM_RSA_NUM_IN_PARAMS 3
28 #define QAT_ASYM_RSA_NUM_OUT_PARAMS 1
29 #define QAT_ASYM_RSA_QT_NUM_IN_PARAMS 6
30 #define QAT_ASYM_ECDSA_RS_SIGN_IN_PARAMS 1
31 #define QAT_ASYM_ECDSA_RS_SIGN_OUT_PARAMS 2
32 #define QAT_ASYM_ECDSA_RS_VERIFY_IN_PARAMS 1
33 #define QAT_ASYM_ECDSA_RS_VERIFY_OUT_PARAMS 0
34 #define QAT_ASYM_ECPM_IN_PARAMS 7
35 #define QAT_ASYM_ECPM_OUT_PARAMS 2
36
37 /**
38 * helper function to add an asym capability
39 * <name> <op type> <modlen (min, max, increment)>
40 **/
41 #define QAT_ASYM_CAP(n, o, l, r, i) \
42 { \
43 .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, \
44 {.asym = { \
45 .xform_capa = { \
46 .xform_type = RTE_CRYPTO_ASYM_XFORM_##n,\
47 .op_types = o, \
48 { \
49 .modlen = { \
50 .min = l, \
51 .max = r, \
52 .increment = i \
53 }, } \
54 } \
55 }, \
56 } \
57 }
58
59 struct __rte_aligned(8) qat_asym_op_cookie {
60 uint64_t error;
61 uint32_t alg_bytesize; /*< Bytesize of algorithm */
62 uint32_t qat_func_alignsize; /*< Aligned bytesize of qat function */
63 rte_iova_t input_addr;
64 rte_iova_t output_addr;
65 alignas(8) large_int_ptr input_params_ptrs[MAX_PKE_PARAMS];
66 alignas(8) large_int_ptr output_params_ptrs[MAX_PKE_PARAMS];
67 union __rte_aligned(8) {
68 uint8_t input_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE];
69 uint8_t input_buffer[MAX_PKE_PARAMS * QAT_PKE_MAX_LN_SIZE];
70 };
71 alignas(8) uint8_t output_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE];
72 };
73
74 struct qat_asym_session {
75 struct icp_qat_fw_pke_request req_tmpl;
76 struct rte_crypto_asym_xform xform;
77 };
78
79 static inline void
qat_fill_req_tmpl(struct icp_qat_fw_pke_request * qat_req)80 qat_fill_req_tmpl(struct icp_qat_fw_pke_request *qat_req)
81 {
82 memset(qat_req, 0, sizeof(*qat_req));
83 qat_req->pke_hdr.service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_PKE;
84
85 qat_req->pke_hdr.hdr_flags =
86 ICP_QAT_FW_COMN_HDR_FLAGS_BUILD
87 (ICP_QAT_FW_COMN_REQ_FLAG_SET);
88 }
89
90 static inline void
qat_asym_build_req_tmpl(void * sess_private_data)91 qat_asym_build_req_tmpl(void *sess_private_data)
92 {
93 struct icp_qat_fw_pke_request *qat_req;
94 struct qat_asym_session *session = sess_private_data;
95
96 qat_req = &session->req_tmpl;
97 qat_fill_req_tmpl(qat_req);
98 }
99
100 int
101 qat_asym_session_configure(struct rte_cryptodev *dev __rte_unused,
102 struct rte_crypto_asym_xform *xform,
103 struct rte_cryptodev_asym_session *sess);
104
105 unsigned int
106 qat_asym_session_get_private_size(struct rte_cryptodev *dev);
107
108 void
109 qat_asym_session_clear(struct rte_cryptodev *dev,
110 struct rte_cryptodev_asym_session *sess);
111
112 void
113 qat_asym_init_op_cookie(void *cookie);
114
115 #endif /* _QAT_ASYM_H_ */
116