1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Cavium, Inc 3 */ 4 5 #include <rte_alarm.h> 6 #include <rte_bus_pci.h> 7 #include <rte_cryptodev.h> 8 #include <cryptodev_pmd.h> 9 #include <rte_eventdev.h> 10 #include <rte_event_crypto_adapter.h> 11 #include <rte_errno.h> 12 #include <rte_malloc.h> 13 #include <rte_mempool.h> 14 15 #include "otx_cryptodev.h" 16 #include "otx_cryptodev_capabilities.h" 17 #include "otx_cryptodev_hw_access.h" 18 #include "otx_cryptodev_mbox.h" 19 #include "otx_cryptodev_ops.h" 20 21 #include "cpt_pmd_logs.h" 22 #include "cpt_pmd_ops_helper.h" 23 #include "cpt_ucode.h" 24 #include "cpt_ucode_asym.h" 25 26 #include "ssovf_worker.h" 27 28 static uint64_t otx_fpm_iova[CPT_EC_ID_PMAX]; 29 30 /* Forward declarations */ 31 32 static int 33 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id); 34 35 /* Alarm routines */ 36 37 static void 38 otx_cpt_alarm_cb(void *arg) 39 { 40 struct cpt_vf *cptvf = arg; 41 otx_cpt_poll_misc(cptvf); 42 rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 43 otx_cpt_alarm_cb, cptvf); 44 } 45 46 static int 47 otx_cpt_periodic_alarm_start(void *arg) 48 { 49 return rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 50 otx_cpt_alarm_cb, arg); 51 } 52 53 static int 54 otx_cpt_periodic_alarm_stop(void *arg) 55 { 56 return rte_eal_alarm_cancel(otx_cpt_alarm_cb, arg); 57 } 58 59 /* PMD ops */ 60 61 static int 62 otx_cpt_dev_config(struct rte_cryptodev *dev, 63 struct rte_cryptodev_config *config __rte_unused) 64 { 65 int ret = 0; 66 67 CPT_PMD_INIT_FUNC_TRACE(); 68 69 if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 70 /* Initialize shared FPM table */ 71 ret = cpt_fpm_init(otx_fpm_iova); 72 73 return ret; 74 } 75 76 static int 77 otx_cpt_dev_start(struct rte_cryptodev *c_dev) 78 { 79 void *cptvf = c_dev->data->dev_private; 80 81 CPT_PMD_INIT_FUNC_TRACE(); 82 83 return otx_cpt_start_device(cptvf); 84 } 85 86 static void 87 otx_cpt_dev_stop(struct rte_cryptodev *c_dev) 88 { 89 void *cptvf = c_dev->data->dev_private; 90 91 CPT_PMD_INIT_FUNC_TRACE(); 92 93 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 94 cpt_fpm_clear(); 95 96 otx_cpt_stop_device(cptvf); 97 } 98 99 static int 100 otx_cpt_dev_close(struct rte_cryptodev *c_dev) 101 { 102 void *cptvf = c_dev->data->dev_private; 103 int i, ret; 104 105 CPT_PMD_INIT_FUNC_TRACE(); 106 107 for (i = 0; i < c_dev->data->nb_queue_pairs; i++) { 108 ret = otx_cpt_que_pair_release(c_dev, i); 109 if (ret) 110 return ret; 111 } 112 113 otx_cpt_periodic_alarm_stop(cptvf); 114 otx_cpt_deinit_device(cptvf); 115 116 return 0; 117 } 118 119 static void 120 otx_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info) 121 { 122 CPT_PMD_INIT_FUNC_TRACE(); 123 if (info != NULL) { 124 info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF; 125 info->feature_flags = dev->feature_flags; 126 info->capabilities = otx_get_capabilities(info->feature_flags); 127 info->sym.max_nb_sessions = 0; 128 info->driver_id = otx_cryptodev_driver_id; 129 info->min_mbuf_headroom_req = OTX_CPT_MIN_HEADROOM_REQ; 130 info->min_mbuf_tailroom_req = OTX_CPT_MIN_TAILROOM_REQ; 131 } 132 } 133 134 static int 135 otx_cpt_que_pair_setup(struct rte_cryptodev *dev, 136 uint16_t que_pair_id, 137 const struct rte_cryptodev_qp_conf *qp_conf, 138 int socket_id __rte_unused) 139 { 140 struct cpt_instance *instance = NULL; 141 struct rte_pci_device *pci_dev; 142 int ret = -1; 143 144 CPT_PMD_INIT_FUNC_TRACE(); 145 146 if (dev->data->queue_pairs[que_pair_id] != NULL) { 147 ret = otx_cpt_que_pair_release(dev, que_pair_id); 148 if (ret) 149 return ret; 150 } 151 152 if (qp_conf->nb_descriptors > DEFAULT_CMD_QLEN) { 153 CPT_LOG_INFO("Number of descriptors too big %d, using default " 154 "queue length of %d", qp_conf->nb_descriptors, 155 DEFAULT_CMD_QLEN); 156 } 157 158 pci_dev = RTE_DEV_TO_PCI(dev->device); 159 160 if (pci_dev->mem_resource[0].addr == NULL) { 161 CPT_LOG_ERR("PCI mem address null"); 162 return -EIO; 163 } 164 165 ret = otx_cpt_get_resource(dev, 0, &instance, que_pair_id); 166 if (ret != 0 || instance == NULL) { 167 CPT_LOG_ERR("Error getting instance handle from device %s : " 168 "ret = %d", dev->data->name, ret); 169 return ret; 170 } 171 172 instance->queue_id = que_pair_id; 173 instance->sess_mp = qp_conf->mp_session; 174 instance->sess_mp_priv = qp_conf->mp_session_private; 175 dev->data->queue_pairs[que_pair_id] = instance; 176 177 return 0; 178 } 179 180 static int 181 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id) 182 { 183 struct cpt_instance *instance = dev->data->queue_pairs[que_pair_id]; 184 int ret; 185 186 CPT_PMD_INIT_FUNC_TRACE(); 187 188 ret = otx_cpt_put_resource(instance); 189 if (ret != 0) { 190 CPT_LOG_ERR("Error putting instance handle of device %s : " 191 "ret = %d", dev->data->name, ret); 192 return ret; 193 } 194 195 dev->data->queue_pairs[que_pair_id] = NULL; 196 197 return 0; 198 } 199 200 static unsigned int 201 otx_cpt_get_session_size(struct rte_cryptodev *dev __rte_unused) 202 { 203 return cpt_get_session_size(); 204 } 205 206 static int 207 sym_xform_verify(struct rte_crypto_sym_xform *xform) 208 { 209 if (xform->next) { 210 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 211 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 212 xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT && 213 (xform->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC || 214 xform->next->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC)) 215 return -ENOTSUP; 216 217 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 218 xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT && 219 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH && 220 (xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC || 221 xform->next->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC)) 222 return -ENOTSUP; 223 224 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 225 xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC && 226 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH && 227 xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1) 228 return -ENOTSUP; 229 230 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 231 xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 && 232 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 233 xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC) 234 return -ENOTSUP; 235 236 } else { 237 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 238 xform->auth.algo == RTE_CRYPTO_AUTH_NULL && 239 xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) 240 return -ENOTSUP; 241 } 242 return 0; 243 } 244 245 static int 246 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform, 247 struct rte_cryptodev_sym_session *sess, 248 struct rte_mempool *pool) 249 { 250 struct rte_crypto_sym_xform *temp_xform = xform; 251 struct cpt_sess_misc *misc; 252 vq_cmd_word3_t vq_cmd_w3; 253 void *priv; 254 int ret; 255 256 ret = sym_xform_verify(xform); 257 if (unlikely(ret)) 258 return ret; 259 260 if (unlikely(rte_mempool_get(pool, &priv))) { 261 CPT_LOG_ERR("Could not allocate session private data"); 262 return -ENOMEM; 263 } 264 265 memset(priv, 0, sizeof(struct cpt_sess_misc) + 266 offsetof(struct cpt_ctx, mc_ctx)); 267 268 misc = priv; 269 270 for ( ; xform != NULL; xform = xform->next) { 271 switch (xform->type) { 272 case RTE_CRYPTO_SYM_XFORM_AEAD: 273 ret = fill_sess_aead(xform, misc); 274 break; 275 case RTE_CRYPTO_SYM_XFORM_CIPHER: 276 ret = fill_sess_cipher(xform, misc); 277 break; 278 case RTE_CRYPTO_SYM_XFORM_AUTH: 279 if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) 280 ret = fill_sess_gmac(xform, misc); 281 else 282 ret = fill_sess_auth(xform, misc); 283 break; 284 default: 285 ret = -1; 286 } 287 288 if (ret) 289 goto priv_put; 290 } 291 292 if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) && 293 cpt_mac_len_verify(&temp_xform->auth)) { 294 CPT_LOG_ERR("MAC length is not supported"); 295 struct cpt_ctx *ctx = SESS_PRIV(misc); 296 if (ctx->auth_key != NULL) { 297 rte_free(ctx->auth_key); 298 ctx->auth_key = NULL; 299 } 300 ret = -ENOTSUP; 301 goto priv_put; 302 } 303 304 set_sym_session_private_data(sess, driver_id, priv); 305 306 misc->ctx_dma_addr = rte_mempool_virt2iova(misc) + 307 sizeof(struct cpt_sess_misc); 308 309 vq_cmd_w3.u64 = 0; 310 vq_cmd_w3.s.grp = 0; 311 vq_cmd_w3.s.cptr = misc->ctx_dma_addr + offsetof(struct cpt_ctx, 312 mc_ctx); 313 314 misc->cpt_inst_w7 = vq_cmd_w3.u64; 315 316 return 0; 317 318 priv_put: 319 if (priv) 320 rte_mempool_put(pool, priv); 321 return -ENOTSUP; 322 } 323 324 static void 325 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess) 326 { 327 void *priv = get_sym_session_private_data(sess, driver_id); 328 struct cpt_sess_misc *misc; 329 struct rte_mempool *pool; 330 struct cpt_ctx *ctx; 331 332 if (priv == NULL) 333 return; 334 335 misc = priv; 336 ctx = SESS_PRIV(misc); 337 338 rte_free(ctx->auth_key); 339 340 memset(priv, 0, cpt_get_session_size()); 341 342 pool = rte_mempool_from_obj(priv); 343 344 set_sym_session_private_data(sess, driver_id, NULL); 345 346 rte_mempool_put(pool, priv); 347 } 348 349 static int 350 otx_cpt_session_cfg(struct rte_cryptodev *dev, 351 struct rte_crypto_sym_xform *xform, 352 struct rte_cryptodev_sym_session *sess, 353 struct rte_mempool *pool) 354 { 355 CPT_PMD_INIT_FUNC_TRACE(); 356 357 return sym_session_configure(dev->driver_id, xform, sess, pool); 358 } 359 360 361 static void 362 otx_cpt_session_clear(struct rte_cryptodev *dev, 363 struct rte_cryptodev_sym_session *sess) 364 { 365 CPT_PMD_INIT_FUNC_TRACE(); 366 367 return sym_session_clear(dev->driver_id, sess); 368 } 369 370 static unsigned int 371 otx_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused) 372 { 373 return sizeof(struct cpt_asym_sess_misc); 374 } 375 376 static int 377 otx_cpt_asym_session_cfg(struct rte_cryptodev *dev, 378 struct rte_crypto_asym_xform *xform __rte_unused, 379 struct rte_cryptodev_asym_session *sess, 380 struct rte_mempool *pool) 381 { 382 struct cpt_asym_sess_misc *priv; 383 int ret; 384 385 CPT_PMD_INIT_FUNC_TRACE(); 386 387 if (rte_mempool_get(pool, (void **)&priv)) { 388 CPT_LOG_ERR("Could not allocate session private data"); 389 return -ENOMEM; 390 } 391 392 memset(priv, 0, sizeof(struct cpt_asym_sess_misc)); 393 394 ret = cpt_fill_asym_session_parameters(priv, xform); 395 if (ret) { 396 CPT_LOG_ERR("Could not configure session parameters"); 397 398 /* Return session to mempool */ 399 rte_mempool_put(pool, priv); 400 return ret; 401 } 402 403 priv->cpt_inst_w7 = 0; 404 405 set_asym_session_private_data(sess, dev->driver_id, priv); 406 return 0; 407 } 408 409 static void 410 otx_cpt_asym_session_clear(struct rte_cryptodev *dev, 411 struct rte_cryptodev_asym_session *sess) 412 { 413 struct cpt_asym_sess_misc *priv; 414 struct rte_mempool *sess_mp; 415 416 CPT_PMD_INIT_FUNC_TRACE(); 417 418 priv = get_asym_session_private_data(sess, dev->driver_id); 419 420 if (priv == NULL) 421 return; 422 423 /* Free resources allocated during session configure */ 424 cpt_free_asym_session_parameters(priv); 425 memset(priv, 0, otx_cpt_asym_session_size_get(dev)); 426 sess_mp = rte_mempool_from_obj(priv); 427 set_asym_session_private_data(sess, dev->driver_id, NULL); 428 rte_mempool_put(sess_mp, priv); 429 } 430 431 static __rte_always_inline void * __rte_hot 432 otx_cpt_request_enqueue(struct cpt_instance *instance, 433 void *req, uint64_t cpt_inst_w7) 434 { 435 struct cpt_request_info *user_req = (struct cpt_request_info *)req; 436 437 fill_cpt_inst(instance, req, cpt_inst_w7); 438 439 CPT_LOG_DP_DEBUG("req: %p op: %p ", req, user_req->op); 440 441 /* Fill time_out cycles */ 442 user_req->time_out = rte_get_timer_cycles() + 443 DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz(); 444 user_req->extra_time = 0; 445 446 /* Default mode of software queue */ 447 mark_cpt_inst(instance); 448 449 CPT_LOG_DP_DEBUG("Submitted NB cmd with request: %p " 450 "op: %p", user_req, user_req->op); 451 return req; 452 } 453 454 static __rte_always_inline void * __rte_hot 455 otx_cpt_enq_single_asym(struct cpt_instance *instance, 456 struct rte_crypto_op *op) 457 { 458 struct cpt_qp_meta_info *minfo = &instance->meta_info; 459 struct rte_crypto_asym_op *asym_op = op->asym; 460 struct asym_op_params params = {0}; 461 struct cpt_asym_sess_misc *sess; 462 uintptr_t *cop; 463 void *mdata; 464 void *req; 465 int ret; 466 467 if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) { 468 CPT_LOG_DP_ERR("Could not allocate meta buffer for request"); 469 rte_errno = ENOMEM; 470 return NULL; 471 } 472 473 sess = get_asym_session_private_data(asym_op->session, 474 otx_cryptodev_driver_id); 475 476 /* Store phys_addr of the mdata to meta_buf */ 477 params.meta_buf = rte_mempool_virt2iova(mdata); 478 479 cop = mdata; 480 cop[0] = (uintptr_t)mdata; 481 cop[1] = (uintptr_t)op; 482 cop[2] = cop[3] = 0ULL; 483 484 params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t)); 485 params.req->op = cop; 486 487 /* Adjust meta_buf by crypto_op data and request_info struct */ 488 params.meta_buf += (4 * sizeof(uintptr_t)) + 489 sizeof(struct cpt_request_info); 490 491 switch (sess->xfrm_type) { 492 case RTE_CRYPTO_ASYM_XFORM_MODEX: 493 ret = cpt_modex_prep(¶ms, &sess->mod_ctx); 494 if (unlikely(ret)) 495 goto req_fail; 496 break; 497 case RTE_CRYPTO_ASYM_XFORM_RSA: 498 ret = cpt_enqueue_rsa_op(op, ¶ms, sess); 499 if (unlikely(ret)) 500 goto req_fail; 501 break; 502 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 503 ret = cpt_enqueue_ecdsa_op(op, ¶ms, sess, otx_fpm_iova); 504 if (unlikely(ret)) 505 goto req_fail; 506 break; 507 case RTE_CRYPTO_ASYM_XFORM_ECPM: 508 ret = cpt_ecpm_prep(&asym_op->ecpm, ¶ms, 509 sess->ec_ctx.curveid); 510 if (unlikely(ret)) 511 goto req_fail; 512 break; 513 514 default: 515 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 516 rte_errno = EINVAL; 517 goto req_fail; 518 } 519 520 req = otx_cpt_request_enqueue(instance, params.req, sess->cpt_inst_w7); 521 if (unlikely(req == NULL)) { 522 CPT_LOG_DP_ERR("Could not enqueue crypto req"); 523 goto req_fail; 524 } 525 526 return req; 527 528 req_fail: 529 free_op_meta(mdata, minfo->pool); 530 531 return NULL; 532 } 533 534 static __rte_always_inline void * __rte_hot 535 otx_cpt_enq_single_sym(struct cpt_instance *instance, 536 struct rte_crypto_op *op) 537 { 538 struct cpt_sess_misc *sess; 539 struct rte_crypto_sym_op *sym_op = op->sym; 540 struct cpt_request_info *prep_req; 541 void *mdata = NULL; 542 int ret = 0; 543 void *req; 544 uint64_t cpt_op; 545 546 sess = (struct cpt_sess_misc *) 547 get_sym_session_private_data(sym_op->session, 548 otx_cryptodev_driver_id); 549 550 cpt_op = sess->cpt_op; 551 552 if (likely(cpt_op & CPT_OP_CIPHER_MASK)) 553 ret = fill_fc_params(op, sess, &instance->meta_info, &mdata, 554 (void **)&prep_req); 555 else 556 ret = fill_digest_params(op, sess, &instance->meta_info, 557 &mdata, (void **)&prep_req); 558 559 if (unlikely(ret)) { 560 CPT_LOG_DP_ERR("prep crypto req : op %p, cpt_op 0x%x " 561 "ret 0x%x", op, (unsigned int)cpt_op, ret); 562 return NULL; 563 } 564 565 /* Enqueue prepared instruction to h/w */ 566 req = otx_cpt_request_enqueue(instance, prep_req, sess->cpt_inst_w7); 567 if (unlikely(req == NULL)) 568 /* Buffer allocated for request preparation need to be freed */ 569 free_op_meta(mdata, instance->meta_info.pool); 570 571 return req; 572 } 573 574 static __rte_always_inline void * __rte_hot 575 otx_cpt_enq_single_sym_sessless(struct cpt_instance *instance, 576 struct rte_crypto_op *op) 577 { 578 const int driver_id = otx_cryptodev_driver_id; 579 struct rte_crypto_sym_op *sym_op = op->sym; 580 struct rte_cryptodev_sym_session *sess; 581 void *req; 582 int ret; 583 584 /* Create temporary session */ 585 sess = rte_cryptodev_sym_session_create(instance->sess_mp); 586 if (sess == NULL) { 587 rte_errno = ENOMEM; 588 return NULL; 589 } 590 591 ret = sym_session_configure(driver_id, sym_op->xform, sess, 592 instance->sess_mp_priv); 593 if (ret) 594 goto sess_put; 595 596 sym_op->session = sess; 597 598 /* Enqueue op with the tmp session set */ 599 req = otx_cpt_enq_single_sym(instance, op); 600 if (unlikely(req == NULL)) 601 goto priv_put; 602 603 return req; 604 605 priv_put: 606 sym_session_clear(driver_id, sess); 607 sess_put: 608 rte_mempool_put(instance->sess_mp, sess); 609 return NULL; 610 } 611 612 #define OP_TYPE_SYM 0 613 #define OP_TYPE_ASYM 1 614 615 static __rte_always_inline void *__rte_hot 616 otx_cpt_enq_single(struct cpt_instance *inst, 617 struct rte_crypto_op *op, 618 const uint8_t op_type) 619 { 620 /* Check for the type */ 621 622 if (op_type == OP_TYPE_SYM) { 623 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 624 return otx_cpt_enq_single_sym(inst, op); 625 else 626 return otx_cpt_enq_single_sym_sessless(inst, op); 627 } 628 629 if (op_type == OP_TYPE_ASYM) { 630 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 631 return otx_cpt_enq_single_asym(inst, op); 632 } 633 634 /* Should not reach here */ 635 rte_errno = ENOTSUP; 636 return NULL; 637 } 638 639 static __rte_always_inline uint16_t __rte_hot 640 otx_cpt_pkt_enqueue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 641 const uint8_t op_type) 642 { 643 struct cpt_instance *instance = (struct cpt_instance *)qptr; 644 uint16_t count, free_slots; 645 void *req; 646 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 647 struct pending_queue *pqueue = &cptvf->pqueue; 648 649 free_slots = pending_queue_free_slots(pqueue, DEFAULT_CMD_QLEN, 650 DEFAULT_CMD_QRSVD_SLOTS); 651 if (nb_ops > free_slots) 652 nb_ops = free_slots; 653 654 count = 0; 655 while (likely(count < nb_ops)) { 656 657 /* Enqueue single op */ 658 req = otx_cpt_enq_single(instance, ops[count], op_type); 659 660 if (unlikely(req == NULL)) 661 break; 662 663 pending_queue_push(pqueue, req, count, DEFAULT_CMD_QLEN); 664 count++; 665 } 666 667 if (likely(count)) { 668 pending_queue_commit(pqueue, count, DEFAULT_CMD_QLEN); 669 otx_cpt_ring_dbell(instance, count); 670 } 671 return count; 672 } 673 674 static uint16_t 675 otx_cpt_enqueue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 676 { 677 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_ASYM); 678 } 679 680 static uint16_t 681 otx_cpt_enqueue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 682 { 683 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_SYM); 684 } 685 686 static __rte_always_inline void 687 submit_request_to_sso(struct ssows *ws, uintptr_t req, 688 struct rte_event *rsp_info) 689 { 690 uint64_t add_work; 691 692 add_work = rsp_info->flow_id | (RTE_EVENT_TYPE_CRYPTODEV << 28) | 693 ((uint64_t)(rsp_info->sched_type) << 32); 694 695 if (!rsp_info->sched_type) 696 ssows_head_wait(ws); 697 698 rte_atomic_thread_fence(__ATOMIC_RELEASE); 699 ssovf_store_pair(add_work, req, ws->grps[rsp_info->queue_id]); 700 } 701 702 static inline union rte_event_crypto_metadata * 703 get_event_crypto_mdata(struct rte_crypto_op *op) 704 { 705 union rte_event_crypto_metadata *ec_mdata; 706 707 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 708 ec_mdata = rte_cryptodev_sym_session_get_user_data( 709 op->sym->session); 710 else if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS && 711 op->private_data_offset) 712 ec_mdata = (union rte_event_crypto_metadata *) 713 ((uint8_t *)op + op->private_data_offset); 714 else 715 return NULL; 716 717 return ec_mdata; 718 } 719 720 uint16_t __rte_hot 721 otx_crypto_adapter_enqueue(void *port, struct rte_crypto_op *op) 722 { 723 union rte_event_crypto_metadata *ec_mdata; 724 struct cpt_instance *instance; 725 struct cpt_request_info *req; 726 struct rte_event *rsp_info; 727 uint8_t op_type, cdev_id; 728 uint16_t qp_id; 729 730 ec_mdata = get_event_crypto_mdata(op); 731 if (unlikely(ec_mdata == NULL)) { 732 rte_errno = EINVAL; 733 return 0; 734 } 735 736 cdev_id = ec_mdata->request_info.cdev_id; 737 qp_id = ec_mdata->request_info.queue_pair_id; 738 rsp_info = &ec_mdata->response_info; 739 instance = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id]; 740 741 if (unlikely(!instance->ca_enabled)) { 742 rte_errno = EINVAL; 743 return 0; 744 } 745 746 op_type = op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC ? OP_TYPE_SYM : 747 OP_TYPE_ASYM; 748 req = otx_cpt_enq_single(instance, op, op_type); 749 if (unlikely(req == NULL)) 750 return 0; 751 752 otx_cpt_ring_dbell(instance, 1); 753 req->qp = instance; 754 submit_request_to_sso(port, (uintptr_t)req, rsp_info); 755 756 return 1; 757 } 758 759 static inline void 760 otx_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req, 761 struct rte_crypto_rsa_xform *rsa_ctx) 762 763 { 764 struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa; 765 766 switch (rsa->op_type) { 767 case RTE_CRYPTO_ASYM_OP_ENCRYPT: 768 rsa->cipher.length = rsa_ctx->n.length; 769 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length); 770 break; 771 case RTE_CRYPTO_ASYM_OP_DECRYPT: 772 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 773 rsa->message.length = rsa_ctx->n.length; 774 else { 775 /* Get length of decrypted output */ 776 rsa->message.length = rte_cpu_to_be_16 777 (*((uint16_t *)req->rptr)); 778 779 /* Offset data pointer by length fields */ 780 req->rptr += 2; 781 } 782 memcpy(rsa->message.data, req->rptr, rsa->message.length); 783 break; 784 case RTE_CRYPTO_ASYM_OP_SIGN: 785 rsa->sign.length = rsa_ctx->n.length; 786 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 787 break; 788 case RTE_CRYPTO_ASYM_OP_VERIFY: 789 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 790 rsa->sign.length = rsa_ctx->n.length; 791 else { 792 /* Get length of decrypted output */ 793 rsa->sign.length = rte_cpu_to_be_16 794 (*((uint16_t *)req->rptr)); 795 796 /* Offset data pointer by length fields */ 797 req->rptr += 2; 798 } 799 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 800 801 if (memcmp(rsa->sign.data, rsa->message.data, 802 rsa->message.length)) { 803 CPT_LOG_DP_ERR("RSA verification failed"); 804 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 805 } 806 break; 807 default: 808 CPT_LOG_DP_DEBUG("Invalid RSA operation type"); 809 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 810 break; 811 } 812 } 813 814 static __rte_always_inline void 815 otx_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa, 816 struct cpt_request_info *req, 817 struct cpt_asym_ec_ctx *ec) 818 819 { 820 int prime_len = ec_grp[ec->curveid].prime.length; 821 822 if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY) 823 return; 824 825 /* Separate out sign r and s components */ 826 memcpy(ecdsa->r.data, req->rptr, prime_len); 827 memcpy(ecdsa->s.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8), 828 prime_len); 829 ecdsa->r.length = prime_len; 830 ecdsa->s.length = prime_len; 831 } 832 833 static __rte_always_inline void 834 otx_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm, 835 struct cpt_request_info *req, 836 struct cpt_asym_ec_ctx *ec) 837 { 838 int prime_len = ec_grp[ec->curveid].prime.length; 839 840 memcpy(ecpm->r.x.data, req->rptr, prime_len); 841 memcpy(ecpm->r.y.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8), 842 prime_len); 843 ecpm->r.x.length = prime_len; 844 ecpm->r.y.length = prime_len; 845 } 846 847 static __rte_always_inline void __rte_hot 848 otx_cpt_asym_post_process(struct rte_crypto_op *cop, 849 struct cpt_request_info *req) 850 { 851 struct rte_crypto_asym_op *op = cop->asym; 852 struct cpt_asym_sess_misc *sess; 853 854 sess = get_asym_session_private_data(op->session, 855 otx_cryptodev_driver_id); 856 857 switch (sess->xfrm_type) { 858 case RTE_CRYPTO_ASYM_XFORM_RSA: 859 otx_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx); 860 break; 861 case RTE_CRYPTO_ASYM_XFORM_MODEX: 862 op->modex.result.length = sess->mod_ctx.modulus.length; 863 memcpy(op->modex.result.data, req->rptr, 864 op->modex.result.length); 865 break; 866 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 867 otx_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx); 868 break; 869 case RTE_CRYPTO_ASYM_XFORM_ECPM: 870 otx_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx); 871 break; 872 default: 873 CPT_LOG_DP_DEBUG("Invalid crypto xform type"); 874 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 875 break; 876 } 877 } 878 879 static __rte_always_inline void __rte_hot 880 otx_cpt_dequeue_post_process(struct rte_crypto_op *cop, uintptr_t *rsp, 881 const uint8_t op_type) 882 { 883 /* H/w has returned success */ 884 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS; 885 886 /* Perform further post processing */ 887 888 if ((op_type == OP_TYPE_SYM) && 889 (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC)) { 890 /* Check if auth verify need to be completed */ 891 if (unlikely(rsp[2])) 892 compl_auth_verify(cop, (uint8_t *)rsp[2], rsp[3]); 893 return; 894 } 895 896 if ((op_type == OP_TYPE_ASYM) && 897 (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC)) { 898 rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t)); 899 otx_cpt_asym_post_process(cop, (struct cpt_request_info *)rsp); 900 } 901 902 return; 903 } 904 905 static inline void 906 free_sym_session_data(const struct cpt_instance *instance, 907 struct rte_crypto_op *cop) 908 { 909 void *sess_private_data_t = get_sym_session_private_data( 910 cop->sym->session, otx_cryptodev_driver_id); 911 memset(sess_private_data_t, 0, cpt_get_session_size()); 912 memset(cop->sym->session, 0, 913 rte_cryptodev_sym_get_existing_header_session_size( 914 cop->sym->session)); 915 rte_mempool_put(instance->sess_mp_priv, sess_private_data_t); 916 rte_mempool_put(instance->sess_mp, cop->sym->session); 917 cop->sym->session = NULL; 918 } 919 920 static __rte_always_inline struct rte_crypto_op * 921 otx_cpt_process_response(const struct cpt_instance *instance, uintptr_t *rsp, 922 uint8_t cc, const uint8_t op_type) 923 { 924 struct rte_crypto_op *cop; 925 void *metabuf; 926 927 metabuf = (void *)rsp[0]; 928 cop = (void *)rsp[1]; 929 930 /* Check completion code */ 931 if (likely(cc == 0)) { 932 /* H/w success pkt. Post process */ 933 otx_cpt_dequeue_post_process(cop, rsp, op_type); 934 } else if (cc == ERR_GC_ICV_MISCOMPARE) { 935 /* auth data mismatch */ 936 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED; 937 } else { 938 /* Error */ 939 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 940 } 941 942 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) 943 free_sym_session_data(instance, cop); 944 free_op_meta(metabuf, instance->meta_info.pool); 945 946 return cop; 947 } 948 949 static __rte_always_inline uint16_t __rte_hot 950 otx_cpt_pkt_dequeue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 951 const uint8_t op_type) 952 { 953 struct cpt_instance *instance = (struct cpt_instance *)qptr; 954 struct cpt_request_info *user_req; 955 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 956 uint8_t cc[nb_ops]; 957 int i, count, pcount; 958 uint8_t ret; 959 int nb_completed; 960 struct pending_queue *pqueue = &cptvf->pqueue; 961 962 pcount = pending_queue_level(pqueue, DEFAULT_CMD_QLEN); 963 964 /* Ensure pcount isn't read before data lands */ 965 rte_atomic_thread_fence(__ATOMIC_ACQUIRE); 966 967 count = (nb_ops > pcount) ? pcount : nb_ops; 968 969 for (i = 0; i < count; i++) { 970 pending_queue_peek(pqueue, (void **) &user_req, 971 DEFAULT_CMD_QLEN, i + 1 < count); 972 973 ret = check_nb_command_id(user_req, instance); 974 975 if (unlikely(ret == ERR_REQ_PENDING)) { 976 /* Stop checking for completions */ 977 break; 978 } 979 980 /* Return completion code and op handle */ 981 cc[i] = ret; 982 ops[i] = user_req->op; 983 984 CPT_LOG_DP_DEBUG("Request %p Op %p completed with code %d", 985 user_req, user_req->op, ret); 986 987 pending_queue_pop(pqueue, DEFAULT_CMD_QLEN); 988 } 989 990 nb_completed = i; 991 992 for (i = 0; i < nb_completed; i++) { 993 if (likely((i + 1) < nb_completed)) 994 rte_prefetch0(ops[i+1]); 995 996 ops[i] = otx_cpt_process_response(instance, (void *)ops[i], 997 cc[i], op_type); 998 } 999 1000 return nb_completed; 1001 } 1002 1003 static uint16_t 1004 otx_cpt_dequeue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 1005 { 1006 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_ASYM); 1007 } 1008 1009 static uint16_t 1010 otx_cpt_dequeue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 1011 { 1012 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_SYM); 1013 } 1014 1015 uintptr_t __rte_hot 1016 otx_crypto_adapter_dequeue(uintptr_t get_work1) 1017 { 1018 const struct cpt_instance *instance; 1019 struct cpt_request_info *req; 1020 struct rte_crypto_op *cop; 1021 uint8_t cc, op_type; 1022 uintptr_t *rsp; 1023 1024 req = (struct cpt_request_info *)get_work1; 1025 instance = req->qp; 1026 rsp = req->op; 1027 cop = (void *)rsp[1]; 1028 op_type = cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC ? OP_TYPE_SYM : 1029 OP_TYPE_ASYM; 1030 1031 do { 1032 cc = check_nb_command_id( 1033 req, (struct cpt_instance *)(uintptr_t)instance); 1034 } while (cc == ERR_REQ_PENDING); 1035 1036 cop = otx_cpt_process_response(instance, (void *)req->op, cc, op_type); 1037 1038 return (uintptr_t)(cop); 1039 } 1040 1041 static struct rte_cryptodev_ops cptvf_ops = { 1042 /* Device related operations */ 1043 .dev_configure = otx_cpt_dev_config, 1044 .dev_start = otx_cpt_dev_start, 1045 .dev_stop = otx_cpt_dev_stop, 1046 .dev_close = otx_cpt_dev_close, 1047 .dev_infos_get = otx_cpt_dev_info_get, 1048 1049 .stats_get = NULL, 1050 .stats_reset = NULL, 1051 .queue_pair_setup = otx_cpt_que_pair_setup, 1052 .queue_pair_release = otx_cpt_que_pair_release, 1053 1054 /* Crypto related operations */ 1055 .sym_session_get_size = otx_cpt_get_session_size, 1056 .sym_session_configure = otx_cpt_session_cfg, 1057 .sym_session_clear = otx_cpt_session_clear, 1058 1059 .asym_session_get_size = otx_cpt_asym_session_size_get, 1060 .asym_session_configure = otx_cpt_asym_session_cfg, 1061 .asym_session_clear = otx_cpt_asym_session_clear, 1062 }; 1063 1064 int 1065 otx_cpt_dev_create(struct rte_cryptodev *c_dev) 1066 { 1067 struct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device); 1068 struct cpt_vf *cptvf = NULL; 1069 void *reg_base; 1070 char dev_name[32]; 1071 int ret; 1072 1073 if (pdev->mem_resource[0].phys_addr == 0ULL) 1074 return -EIO; 1075 1076 /* for secondary processes, we don't initialise any further as primary 1077 * has already done this work. 1078 */ 1079 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1080 return 0; 1081 1082 cptvf = rte_zmalloc_socket("otx_cryptodev_private_mem", 1083 sizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE, 1084 rte_socket_id()); 1085 1086 if (cptvf == NULL) { 1087 CPT_LOG_ERR("Cannot allocate memory for device private data"); 1088 return -ENOMEM; 1089 } 1090 1091 snprintf(dev_name, 32, "%02x:%02x.%x", 1092 pdev->addr.bus, pdev->addr.devid, pdev->addr.function); 1093 1094 reg_base = pdev->mem_resource[0].addr; 1095 if (!reg_base) { 1096 CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name); 1097 ret = -ENODEV; 1098 goto fail; 1099 } 1100 1101 ret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name); 1102 if (ret) { 1103 CPT_LOG_ERR("Failed to init cptvf %s", dev_name); 1104 ret = -EIO; 1105 goto fail; 1106 } 1107 1108 switch (cptvf->vftype) { 1109 case OTX_CPT_VF_TYPE_AE: 1110 /* Set asymmetric cpt feature flags */ 1111 c_dev->feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | 1112 RTE_CRYPTODEV_FF_HW_ACCELERATED | 1113 RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT; 1114 break; 1115 case OTX_CPT_VF_TYPE_SE: 1116 /* Set symmetric cpt feature flags */ 1117 c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | 1118 RTE_CRYPTODEV_FF_HW_ACCELERATED | 1119 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | 1120 RTE_CRYPTODEV_FF_IN_PLACE_SGL | 1121 RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | 1122 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | 1123 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | 1124 RTE_CRYPTODEV_FF_SYM_SESSIONLESS | 1125 RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED; 1126 break; 1127 default: 1128 /* Feature not supported. Abort */ 1129 CPT_LOG_ERR("VF type not supported by %s", dev_name); 1130 ret = -EIO; 1131 goto deinit_dev; 1132 } 1133 1134 /* Start off timer for mailbox interrupts */ 1135 otx_cpt_periodic_alarm_start(cptvf); 1136 1137 c_dev->dev_ops = &cptvf_ops; 1138 1139 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) { 1140 c_dev->enqueue_burst = otx_cpt_enqueue_sym; 1141 c_dev->dequeue_burst = otx_cpt_dequeue_sym; 1142 } else { 1143 c_dev->enqueue_burst = otx_cpt_enqueue_asym; 1144 c_dev->dequeue_burst = otx_cpt_dequeue_asym; 1145 } 1146 1147 /* Save dev private data */ 1148 c_dev->data->dev_private = cptvf; 1149 1150 return 0; 1151 1152 deinit_dev: 1153 otx_cpt_deinit_device(cptvf); 1154 1155 fail: 1156 if (cptvf) { 1157 /* Free private data allocated */ 1158 rte_free(cptvf); 1159 } 1160 1161 return ret; 1162 } 1163