1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Cavium, Inc 3 */ 4 5 #include <rte_alarm.h> 6 #include <rte_bus_pci.h> 7 #include <rte_cryptodev.h> 8 #include <cryptodev_pmd.h> 9 #include <rte_eventdev.h> 10 #include <rte_event_crypto_adapter.h> 11 #include <rte_errno.h> 12 #include <rte_malloc.h> 13 #include <rte_mempool.h> 14 15 #include "otx_cryptodev.h" 16 #include "otx_cryptodev_capabilities.h" 17 #include "otx_cryptodev_hw_access.h" 18 #include "otx_cryptodev_mbox.h" 19 #include "otx_cryptodev_ops.h" 20 21 #include "cpt_pmd_logs.h" 22 #include "cpt_pmd_ops_helper.h" 23 #include "cpt_ucode.h" 24 #include "cpt_ucode_asym.h" 25 26 #include "ssovf_worker.h" 27 28 static uint64_t otx_fpm_iova[CPT_EC_ID_PMAX]; 29 30 /* Forward declarations */ 31 32 static int 33 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id); 34 35 /* Alarm routines */ 36 37 static void 38 otx_cpt_alarm_cb(void *arg) 39 { 40 struct cpt_vf *cptvf = arg; 41 otx_cpt_poll_misc(cptvf); 42 rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 43 otx_cpt_alarm_cb, cptvf); 44 } 45 46 static int 47 otx_cpt_periodic_alarm_start(void *arg) 48 { 49 return rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 50 otx_cpt_alarm_cb, arg); 51 } 52 53 static int 54 otx_cpt_periodic_alarm_stop(void *arg) 55 { 56 return rte_eal_alarm_cancel(otx_cpt_alarm_cb, arg); 57 } 58 59 /* PMD ops */ 60 61 static int 62 otx_cpt_dev_config(struct rte_cryptodev *dev, 63 struct rte_cryptodev_config *config __rte_unused) 64 { 65 int ret = 0; 66 67 CPT_PMD_INIT_FUNC_TRACE(); 68 69 if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 70 /* Initialize shared FPM table */ 71 ret = cpt_fpm_init(otx_fpm_iova); 72 73 return ret; 74 } 75 76 static int 77 otx_cpt_dev_start(struct rte_cryptodev *c_dev) 78 { 79 void *cptvf = c_dev->data->dev_private; 80 81 CPT_PMD_INIT_FUNC_TRACE(); 82 83 return otx_cpt_start_device(cptvf); 84 } 85 86 static void 87 otx_cpt_dev_stop(struct rte_cryptodev *c_dev) 88 { 89 void *cptvf = c_dev->data->dev_private; 90 91 CPT_PMD_INIT_FUNC_TRACE(); 92 93 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 94 cpt_fpm_clear(); 95 96 otx_cpt_stop_device(cptvf); 97 } 98 99 static int 100 otx_cpt_dev_close(struct rte_cryptodev *c_dev) 101 { 102 void *cptvf = c_dev->data->dev_private; 103 int i, ret; 104 105 CPT_PMD_INIT_FUNC_TRACE(); 106 107 for (i = 0; i < c_dev->data->nb_queue_pairs; i++) { 108 ret = otx_cpt_que_pair_release(c_dev, i); 109 if (ret) 110 return ret; 111 } 112 113 otx_cpt_periodic_alarm_stop(cptvf); 114 otx_cpt_deinit_device(cptvf); 115 116 return 0; 117 } 118 119 static void 120 otx_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info) 121 { 122 CPT_PMD_INIT_FUNC_TRACE(); 123 if (info != NULL) { 124 info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF; 125 info->feature_flags = dev->feature_flags; 126 info->capabilities = otx_get_capabilities(info->feature_flags); 127 info->sym.max_nb_sessions = 0; 128 info->driver_id = otx_cryptodev_driver_id; 129 info->min_mbuf_headroom_req = OTX_CPT_MIN_HEADROOM_REQ; 130 info->min_mbuf_tailroom_req = OTX_CPT_MIN_TAILROOM_REQ; 131 } 132 } 133 134 static int 135 otx_cpt_que_pair_setup(struct rte_cryptodev *dev, 136 uint16_t que_pair_id, 137 const struct rte_cryptodev_qp_conf *qp_conf, 138 int socket_id __rte_unused) 139 { 140 struct cpt_instance *instance = NULL; 141 struct rte_pci_device *pci_dev; 142 int ret = -1; 143 144 CPT_PMD_INIT_FUNC_TRACE(); 145 146 if (dev->data->queue_pairs[que_pair_id] != NULL) { 147 ret = otx_cpt_que_pair_release(dev, que_pair_id); 148 if (ret) 149 return ret; 150 } 151 152 if (qp_conf->nb_descriptors > DEFAULT_CMD_QLEN) { 153 CPT_LOG_INFO("Number of descriptors too big %d, using default " 154 "queue length of %d", qp_conf->nb_descriptors, 155 DEFAULT_CMD_QLEN); 156 } 157 158 pci_dev = RTE_DEV_TO_PCI(dev->device); 159 160 if (pci_dev->mem_resource[0].addr == NULL) { 161 CPT_LOG_ERR("PCI mem address null"); 162 return -EIO; 163 } 164 165 ret = otx_cpt_get_resource(dev, 0, &instance, que_pair_id); 166 if (ret != 0 || instance == NULL) { 167 CPT_LOG_ERR("Error getting instance handle from device %s : " 168 "ret = %d", dev->data->name, ret); 169 return ret; 170 } 171 172 instance->queue_id = que_pair_id; 173 instance->sess_mp = qp_conf->mp_session; 174 instance->sess_mp_priv = qp_conf->mp_session_private; 175 dev->data->queue_pairs[que_pair_id] = instance; 176 177 return 0; 178 } 179 180 static int 181 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id) 182 { 183 struct cpt_instance *instance = dev->data->queue_pairs[que_pair_id]; 184 int ret; 185 186 CPT_PMD_INIT_FUNC_TRACE(); 187 188 ret = otx_cpt_put_resource(instance); 189 if (ret != 0) { 190 CPT_LOG_ERR("Error putting instance handle of device %s : " 191 "ret = %d", dev->data->name, ret); 192 return ret; 193 } 194 195 dev->data->queue_pairs[que_pair_id] = NULL; 196 197 return 0; 198 } 199 200 static unsigned int 201 otx_cpt_get_session_size(struct rte_cryptodev *dev __rte_unused) 202 { 203 return cpt_get_session_size(); 204 } 205 206 static int 207 sym_xform_verify(struct rte_crypto_sym_xform *xform) 208 { 209 if (xform->next) { 210 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 211 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 212 xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT && 213 (xform->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC || 214 xform->next->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC)) 215 return -ENOTSUP; 216 217 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 218 xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT && 219 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH && 220 (xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC || 221 xform->next->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC)) 222 return -ENOTSUP; 223 224 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 225 xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC && 226 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH && 227 xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1) 228 return -ENOTSUP; 229 230 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 231 xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 && 232 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 233 xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC) 234 return -ENOTSUP; 235 236 } else { 237 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 238 xform->auth.algo == RTE_CRYPTO_AUTH_NULL && 239 xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) 240 return -ENOTSUP; 241 } 242 return 0; 243 } 244 245 static int 246 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform, 247 struct rte_cryptodev_sym_session *sess, 248 struct rte_mempool *pool) 249 { 250 struct rte_crypto_sym_xform *temp_xform = xform; 251 struct cpt_sess_misc *misc; 252 vq_cmd_word3_t vq_cmd_w3; 253 void *priv; 254 int ret; 255 256 ret = sym_xform_verify(xform); 257 if (unlikely(ret)) 258 return ret; 259 260 if (unlikely(rte_mempool_get(pool, &priv))) { 261 CPT_LOG_ERR("Could not allocate session private data"); 262 return -ENOMEM; 263 } 264 265 memset(priv, 0, sizeof(struct cpt_sess_misc) + 266 offsetof(struct cpt_ctx, mc_ctx)); 267 268 misc = priv; 269 270 for ( ; xform != NULL; xform = xform->next) { 271 switch (xform->type) { 272 case RTE_CRYPTO_SYM_XFORM_AEAD: 273 ret = fill_sess_aead(xform, misc); 274 break; 275 case RTE_CRYPTO_SYM_XFORM_CIPHER: 276 ret = fill_sess_cipher(xform, misc); 277 break; 278 case RTE_CRYPTO_SYM_XFORM_AUTH: 279 if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) 280 ret = fill_sess_gmac(xform, misc); 281 else 282 ret = fill_sess_auth(xform, misc); 283 break; 284 default: 285 ret = -1; 286 } 287 288 if (ret) 289 goto priv_put; 290 } 291 292 if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) && 293 cpt_mac_len_verify(&temp_xform->auth)) { 294 CPT_LOG_ERR("MAC length is not supported"); 295 struct cpt_ctx *ctx = SESS_PRIV(misc); 296 if (ctx->auth_key != NULL) { 297 rte_free(ctx->auth_key); 298 ctx->auth_key = NULL; 299 } 300 ret = -ENOTSUP; 301 goto priv_put; 302 } 303 304 set_sym_session_private_data(sess, driver_id, priv); 305 306 misc->ctx_dma_addr = rte_mempool_virt2iova(misc) + 307 sizeof(struct cpt_sess_misc); 308 309 vq_cmd_w3.u64 = 0; 310 vq_cmd_w3.s.grp = 0; 311 vq_cmd_w3.s.cptr = misc->ctx_dma_addr + offsetof(struct cpt_ctx, 312 mc_ctx); 313 314 misc->cpt_inst_w7 = vq_cmd_w3.u64; 315 316 return 0; 317 318 priv_put: 319 if (priv) 320 rte_mempool_put(pool, priv); 321 return -ENOTSUP; 322 } 323 324 static void 325 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess) 326 { 327 void *priv = get_sym_session_private_data(sess, driver_id); 328 struct cpt_sess_misc *misc; 329 struct rte_mempool *pool; 330 struct cpt_ctx *ctx; 331 332 if (priv == NULL) 333 return; 334 335 misc = priv; 336 ctx = SESS_PRIV(misc); 337 338 if (ctx->auth_key != NULL) 339 rte_free(ctx->auth_key); 340 341 memset(priv, 0, cpt_get_session_size()); 342 343 pool = rte_mempool_from_obj(priv); 344 345 set_sym_session_private_data(sess, driver_id, NULL); 346 347 rte_mempool_put(pool, priv); 348 } 349 350 static int 351 otx_cpt_session_cfg(struct rte_cryptodev *dev, 352 struct rte_crypto_sym_xform *xform, 353 struct rte_cryptodev_sym_session *sess, 354 struct rte_mempool *pool) 355 { 356 CPT_PMD_INIT_FUNC_TRACE(); 357 358 return sym_session_configure(dev->driver_id, xform, sess, pool); 359 } 360 361 362 static void 363 otx_cpt_session_clear(struct rte_cryptodev *dev, 364 struct rte_cryptodev_sym_session *sess) 365 { 366 CPT_PMD_INIT_FUNC_TRACE(); 367 368 return sym_session_clear(dev->driver_id, sess); 369 } 370 371 static unsigned int 372 otx_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused) 373 { 374 return sizeof(struct cpt_asym_sess_misc); 375 } 376 377 static int 378 otx_cpt_asym_session_cfg(struct rte_cryptodev *dev, 379 struct rte_crypto_asym_xform *xform __rte_unused, 380 struct rte_cryptodev_asym_session *sess, 381 struct rte_mempool *pool) 382 { 383 struct cpt_asym_sess_misc *priv; 384 int ret; 385 386 CPT_PMD_INIT_FUNC_TRACE(); 387 388 if (rte_mempool_get(pool, (void **)&priv)) { 389 CPT_LOG_ERR("Could not allocate session private data"); 390 return -ENOMEM; 391 } 392 393 memset(priv, 0, sizeof(struct cpt_asym_sess_misc)); 394 395 ret = cpt_fill_asym_session_parameters(priv, xform); 396 if (ret) { 397 CPT_LOG_ERR("Could not configure session parameters"); 398 399 /* Return session to mempool */ 400 rte_mempool_put(pool, priv); 401 return ret; 402 } 403 404 priv->cpt_inst_w7 = 0; 405 406 set_asym_session_private_data(sess, dev->driver_id, priv); 407 return 0; 408 } 409 410 static void 411 otx_cpt_asym_session_clear(struct rte_cryptodev *dev, 412 struct rte_cryptodev_asym_session *sess) 413 { 414 struct cpt_asym_sess_misc *priv; 415 struct rte_mempool *sess_mp; 416 417 CPT_PMD_INIT_FUNC_TRACE(); 418 419 priv = get_asym_session_private_data(sess, dev->driver_id); 420 421 if (priv == NULL) 422 return; 423 424 /* Free resources allocated during session configure */ 425 cpt_free_asym_session_parameters(priv); 426 memset(priv, 0, otx_cpt_asym_session_size_get(dev)); 427 sess_mp = rte_mempool_from_obj(priv); 428 set_asym_session_private_data(sess, dev->driver_id, NULL); 429 rte_mempool_put(sess_mp, priv); 430 } 431 432 static __rte_always_inline void * __rte_hot 433 otx_cpt_request_enqueue(struct cpt_instance *instance, 434 void *req, uint64_t cpt_inst_w7) 435 { 436 struct cpt_request_info *user_req = (struct cpt_request_info *)req; 437 438 fill_cpt_inst(instance, req, cpt_inst_w7); 439 440 CPT_LOG_DP_DEBUG("req: %p op: %p ", req, user_req->op); 441 442 /* Fill time_out cycles */ 443 user_req->time_out = rte_get_timer_cycles() + 444 DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz(); 445 user_req->extra_time = 0; 446 447 /* Default mode of software queue */ 448 mark_cpt_inst(instance); 449 450 CPT_LOG_DP_DEBUG("Submitted NB cmd with request: %p " 451 "op: %p", user_req, user_req->op); 452 return req; 453 } 454 455 static __rte_always_inline void * __rte_hot 456 otx_cpt_enq_single_asym(struct cpt_instance *instance, 457 struct rte_crypto_op *op) 458 { 459 struct cpt_qp_meta_info *minfo = &instance->meta_info; 460 struct rte_crypto_asym_op *asym_op = op->asym; 461 struct asym_op_params params = {0}; 462 struct cpt_asym_sess_misc *sess; 463 uintptr_t *cop; 464 void *mdata; 465 void *req; 466 int ret; 467 468 if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) { 469 CPT_LOG_DP_ERR("Could not allocate meta buffer for request"); 470 rte_errno = ENOMEM; 471 return NULL; 472 } 473 474 sess = get_asym_session_private_data(asym_op->session, 475 otx_cryptodev_driver_id); 476 477 /* Store phys_addr of the mdata to meta_buf */ 478 params.meta_buf = rte_mempool_virt2iova(mdata); 479 480 cop = mdata; 481 cop[0] = (uintptr_t)mdata; 482 cop[1] = (uintptr_t)op; 483 cop[2] = cop[3] = 0ULL; 484 485 params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t)); 486 params.req->op = cop; 487 488 /* Adjust meta_buf by crypto_op data and request_info struct */ 489 params.meta_buf += (4 * sizeof(uintptr_t)) + 490 sizeof(struct cpt_request_info); 491 492 switch (sess->xfrm_type) { 493 case RTE_CRYPTO_ASYM_XFORM_MODEX: 494 ret = cpt_modex_prep(¶ms, &sess->mod_ctx); 495 if (unlikely(ret)) 496 goto req_fail; 497 break; 498 case RTE_CRYPTO_ASYM_XFORM_RSA: 499 ret = cpt_enqueue_rsa_op(op, ¶ms, sess); 500 if (unlikely(ret)) 501 goto req_fail; 502 break; 503 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 504 ret = cpt_enqueue_ecdsa_op(op, ¶ms, sess, otx_fpm_iova); 505 if (unlikely(ret)) 506 goto req_fail; 507 break; 508 case RTE_CRYPTO_ASYM_XFORM_ECPM: 509 ret = cpt_ecpm_prep(&asym_op->ecpm, ¶ms, 510 sess->ec_ctx.curveid); 511 if (unlikely(ret)) 512 goto req_fail; 513 break; 514 515 default: 516 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 517 rte_errno = EINVAL; 518 goto req_fail; 519 } 520 521 req = otx_cpt_request_enqueue(instance, params.req, sess->cpt_inst_w7); 522 if (unlikely(req == NULL)) { 523 CPT_LOG_DP_ERR("Could not enqueue crypto req"); 524 goto req_fail; 525 } 526 527 return req; 528 529 req_fail: 530 free_op_meta(mdata, minfo->pool); 531 532 return NULL; 533 } 534 535 static __rte_always_inline void * __rte_hot 536 otx_cpt_enq_single_sym(struct cpt_instance *instance, 537 struct rte_crypto_op *op) 538 { 539 struct cpt_sess_misc *sess; 540 struct rte_crypto_sym_op *sym_op = op->sym; 541 struct cpt_request_info *prep_req; 542 void *mdata = NULL; 543 int ret = 0; 544 void *req; 545 uint64_t cpt_op; 546 547 sess = (struct cpt_sess_misc *) 548 get_sym_session_private_data(sym_op->session, 549 otx_cryptodev_driver_id); 550 551 cpt_op = sess->cpt_op; 552 553 if (likely(cpt_op & CPT_OP_CIPHER_MASK)) 554 ret = fill_fc_params(op, sess, &instance->meta_info, &mdata, 555 (void **)&prep_req); 556 else 557 ret = fill_digest_params(op, sess, &instance->meta_info, 558 &mdata, (void **)&prep_req); 559 560 if (unlikely(ret)) { 561 CPT_LOG_DP_ERR("prep cryto req : op %p, cpt_op 0x%x " 562 "ret 0x%x", op, (unsigned int)cpt_op, ret); 563 return NULL; 564 } 565 566 /* Enqueue prepared instruction to h/w */ 567 req = otx_cpt_request_enqueue(instance, prep_req, sess->cpt_inst_w7); 568 if (unlikely(req == NULL)) 569 /* Buffer allocated for request preparation need to be freed */ 570 free_op_meta(mdata, instance->meta_info.pool); 571 572 return req; 573 } 574 575 static __rte_always_inline void * __rte_hot 576 otx_cpt_enq_single_sym_sessless(struct cpt_instance *instance, 577 struct rte_crypto_op *op) 578 { 579 const int driver_id = otx_cryptodev_driver_id; 580 struct rte_crypto_sym_op *sym_op = op->sym; 581 struct rte_cryptodev_sym_session *sess; 582 void *req; 583 int ret; 584 585 /* Create temporary session */ 586 sess = rte_cryptodev_sym_session_create(instance->sess_mp); 587 if (sess == NULL) { 588 rte_errno = ENOMEM; 589 return NULL; 590 } 591 592 ret = sym_session_configure(driver_id, sym_op->xform, sess, 593 instance->sess_mp_priv); 594 if (ret) 595 goto sess_put; 596 597 sym_op->session = sess; 598 599 /* Enqueue op with the tmp session set */ 600 req = otx_cpt_enq_single_sym(instance, op); 601 if (unlikely(req == NULL)) 602 goto priv_put; 603 604 return req; 605 606 priv_put: 607 sym_session_clear(driver_id, sess); 608 sess_put: 609 rte_mempool_put(instance->sess_mp, sess); 610 return NULL; 611 } 612 613 #define OP_TYPE_SYM 0 614 #define OP_TYPE_ASYM 1 615 616 static __rte_always_inline void *__rte_hot 617 otx_cpt_enq_single(struct cpt_instance *inst, 618 struct rte_crypto_op *op, 619 const uint8_t op_type) 620 { 621 /* Check for the type */ 622 623 if (op_type == OP_TYPE_SYM) { 624 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 625 return otx_cpt_enq_single_sym(inst, op); 626 else 627 return otx_cpt_enq_single_sym_sessless(inst, op); 628 } 629 630 if (op_type == OP_TYPE_ASYM) { 631 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 632 return otx_cpt_enq_single_asym(inst, op); 633 } 634 635 /* Should not reach here */ 636 rte_errno = ENOTSUP; 637 return NULL; 638 } 639 640 static __rte_always_inline uint16_t __rte_hot 641 otx_cpt_pkt_enqueue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 642 const uint8_t op_type) 643 { 644 struct cpt_instance *instance = (struct cpt_instance *)qptr; 645 uint16_t count, free_slots; 646 void *req; 647 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 648 struct pending_queue *pqueue = &cptvf->pqueue; 649 650 free_slots = pending_queue_free_slots(pqueue, DEFAULT_CMD_QLEN, 651 DEFAULT_CMD_QRSVD_SLOTS); 652 if (nb_ops > free_slots) 653 nb_ops = free_slots; 654 655 count = 0; 656 while (likely(count < nb_ops)) { 657 658 /* Enqueue single op */ 659 req = otx_cpt_enq_single(instance, ops[count], op_type); 660 661 if (unlikely(req == NULL)) 662 break; 663 664 pending_queue_push(pqueue, req, count, DEFAULT_CMD_QLEN); 665 count++; 666 } 667 668 if (likely(count)) { 669 pending_queue_commit(pqueue, count, DEFAULT_CMD_QLEN); 670 otx_cpt_ring_dbell(instance, count); 671 } 672 return count; 673 } 674 675 static uint16_t 676 otx_cpt_enqueue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 677 { 678 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_ASYM); 679 } 680 681 static uint16_t 682 otx_cpt_enqueue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 683 { 684 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_SYM); 685 } 686 687 static __rte_always_inline void 688 submit_request_to_sso(struct ssows *ws, uintptr_t req, 689 struct rte_event *rsp_info) 690 { 691 uint64_t add_work; 692 693 add_work = rsp_info->flow_id | (RTE_EVENT_TYPE_CRYPTODEV << 28) | 694 ((uint64_t)(rsp_info->sched_type) << 32); 695 696 if (!rsp_info->sched_type) 697 ssows_head_wait(ws); 698 699 rte_atomic_thread_fence(__ATOMIC_RELEASE); 700 ssovf_store_pair(add_work, req, ws->grps[rsp_info->queue_id]); 701 } 702 703 static inline union rte_event_crypto_metadata * 704 get_event_crypto_mdata(struct rte_crypto_op *op) 705 { 706 union rte_event_crypto_metadata *ec_mdata; 707 708 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 709 ec_mdata = rte_cryptodev_sym_session_get_user_data( 710 op->sym->session); 711 else if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS && 712 op->private_data_offset) 713 ec_mdata = (union rte_event_crypto_metadata *) 714 ((uint8_t *)op + op->private_data_offset); 715 else 716 return NULL; 717 718 return ec_mdata; 719 } 720 721 uint16_t __rte_hot 722 otx_crypto_adapter_enqueue(void *port, struct rte_crypto_op *op) 723 { 724 union rte_event_crypto_metadata *ec_mdata; 725 struct cpt_instance *instance; 726 struct cpt_request_info *req; 727 struct rte_event *rsp_info; 728 uint8_t op_type, cdev_id; 729 uint16_t qp_id; 730 731 ec_mdata = get_event_crypto_mdata(op); 732 if (unlikely(ec_mdata == NULL)) { 733 rte_errno = EINVAL; 734 return 0; 735 } 736 737 cdev_id = ec_mdata->request_info.cdev_id; 738 qp_id = ec_mdata->request_info.queue_pair_id; 739 rsp_info = &ec_mdata->response_info; 740 instance = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id]; 741 742 if (unlikely(!instance->ca_enabled)) { 743 rte_errno = EINVAL; 744 return 0; 745 } 746 747 op_type = op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC ? OP_TYPE_SYM : 748 OP_TYPE_ASYM; 749 req = otx_cpt_enq_single(instance, op, op_type); 750 if (unlikely(req == NULL)) 751 return 0; 752 753 otx_cpt_ring_dbell(instance, 1); 754 req->qp = instance; 755 submit_request_to_sso(port, (uintptr_t)req, rsp_info); 756 757 return 1; 758 } 759 760 static inline void 761 otx_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req, 762 struct rte_crypto_rsa_xform *rsa_ctx) 763 764 { 765 struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa; 766 767 switch (rsa->op_type) { 768 case RTE_CRYPTO_ASYM_OP_ENCRYPT: 769 rsa->cipher.length = rsa_ctx->n.length; 770 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length); 771 break; 772 case RTE_CRYPTO_ASYM_OP_DECRYPT: 773 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 774 rsa->message.length = rsa_ctx->n.length; 775 else { 776 /* Get length of decrypted output */ 777 rsa->message.length = rte_cpu_to_be_16 778 (*((uint16_t *)req->rptr)); 779 780 /* Offset data pointer by length fields */ 781 req->rptr += 2; 782 } 783 memcpy(rsa->message.data, req->rptr, rsa->message.length); 784 break; 785 case RTE_CRYPTO_ASYM_OP_SIGN: 786 rsa->sign.length = rsa_ctx->n.length; 787 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 788 break; 789 case RTE_CRYPTO_ASYM_OP_VERIFY: 790 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 791 rsa->sign.length = rsa_ctx->n.length; 792 else { 793 /* Get length of decrypted output */ 794 rsa->sign.length = rte_cpu_to_be_16 795 (*((uint16_t *)req->rptr)); 796 797 /* Offset data pointer by length fields */ 798 req->rptr += 2; 799 } 800 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 801 802 if (memcmp(rsa->sign.data, rsa->message.data, 803 rsa->message.length)) { 804 CPT_LOG_DP_ERR("RSA verification failed"); 805 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 806 } 807 break; 808 default: 809 CPT_LOG_DP_DEBUG("Invalid RSA operation type"); 810 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 811 break; 812 } 813 } 814 815 static __rte_always_inline void 816 otx_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa, 817 struct cpt_request_info *req, 818 struct cpt_asym_ec_ctx *ec) 819 820 { 821 int prime_len = ec_grp[ec->curveid].prime.length; 822 823 if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY) 824 return; 825 826 /* Separate out sign r and s components */ 827 memcpy(ecdsa->r.data, req->rptr, prime_len); 828 memcpy(ecdsa->s.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8), 829 prime_len); 830 ecdsa->r.length = prime_len; 831 ecdsa->s.length = prime_len; 832 } 833 834 static __rte_always_inline void 835 otx_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm, 836 struct cpt_request_info *req, 837 struct cpt_asym_ec_ctx *ec) 838 { 839 int prime_len = ec_grp[ec->curveid].prime.length; 840 841 memcpy(ecpm->r.x.data, req->rptr, prime_len); 842 memcpy(ecpm->r.y.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8), 843 prime_len); 844 ecpm->r.x.length = prime_len; 845 ecpm->r.y.length = prime_len; 846 } 847 848 static __rte_always_inline void __rte_hot 849 otx_cpt_asym_post_process(struct rte_crypto_op *cop, 850 struct cpt_request_info *req) 851 { 852 struct rte_crypto_asym_op *op = cop->asym; 853 struct cpt_asym_sess_misc *sess; 854 855 sess = get_asym_session_private_data(op->session, 856 otx_cryptodev_driver_id); 857 858 switch (sess->xfrm_type) { 859 case RTE_CRYPTO_ASYM_XFORM_RSA: 860 otx_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx); 861 break; 862 case RTE_CRYPTO_ASYM_XFORM_MODEX: 863 op->modex.result.length = sess->mod_ctx.modulus.length; 864 memcpy(op->modex.result.data, req->rptr, 865 op->modex.result.length); 866 break; 867 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 868 otx_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx); 869 break; 870 case RTE_CRYPTO_ASYM_XFORM_ECPM: 871 otx_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx); 872 break; 873 default: 874 CPT_LOG_DP_DEBUG("Invalid crypto xform type"); 875 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 876 break; 877 } 878 } 879 880 static __rte_always_inline void __rte_hot 881 otx_cpt_dequeue_post_process(struct rte_crypto_op *cop, uintptr_t *rsp, 882 const uint8_t op_type) 883 { 884 /* H/w has returned success */ 885 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS; 886 887 /* Perform further post processing */ 888 889 if ((op_type == OP_TYPE_SYM) && 890 (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC)) { 891 /* Check if auth verify need to be completed */ 892 if (unlikely(rsp[2])) 893 compl_auth_verify(cop, (uint8_t *)rsp[2], rsp[3]); 894 return; 895 } 896 897 if ((op_type == OP_TYPE_ASYM) && 898 (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC)) { 899 rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t)); 900 otx_cpt_asym_post_process(cop, (struct cpt_request_info *)rsp); 901 } 902 903 return; 904 } 905 906 static inline void 907 free_sym_session_data(const struct cpt_instance *instance, 908 struct rte_crypto_op *cop) 909 { 910 void *sess_private_data_t = get_sym_session_private_data( 911 cop->sym->session, otx_cryptodev_driver_id); 912 memset(sess_private_data_t, 0, cpt_get_session_size()); 913 memset(cop->sym->session, 0, 914 rte_cryptodev_sym_get_existing_header_session_size( 915 cop->sym->session)); 916 rte_mempool_put(instance->sess_mp_priv, sess_private_data_t); 917 rte_mempool_put(instance->sess_mp, cop->sym->session); 918 cop->sym->session = NULL; 919 } 920 921 static __rte_always_inline struct rte_crypto_op * 922 otx_cpt_process_response(const struct cpt_instance *instance, uintptr_t *rsp, 923 uint8_t cc, const uint8_t op_type) 924 { 925 struct rte_crypto_op *cop; 926 void *metabuf; 927 928 metabuf = (void *)rsp[0]; 929 cop = (void *)rsp[1]; 930 931 /* Check completion code */ 932 if (likely(cc == 0)) { 933 /* H/w success pkt. Post process */ 934 otx_cpt_dequeue_post_process(cop, rsp, op_type); 935 } else if (cc == ERR_GC_ICV_MISCOMPARE) { 936 /* auth data mismatch */ 937 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED; 938 } else { 939 /* Error */ 940 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 941 } 942 943 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) 944 free_sym_session_data(instance, cop); 945 free_op_meta(metabuf, instance->meta_info.pool); 946 947 return cop; 948 } 949 950 static __rte_always_inline uint16_t __rte_hot 951 otx_cpt_pkt_dequeue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 952 const uint8_t op_type) 953 { 954 struct cpt_instance *instance = (struct cpt_instance *)qptr; 955 struct cpt_request_info *user_req; 956 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 957 uint8_t cc[nb_ops]; 958 int i, count, pcount; 959 uint8_t ret; 960 int nb_completed; 961 struct pending_queue *pqueue = &cptvf->pqueue; 962 963 pcount = pending_queue_level(pqueue, DEFAULT_CMD_QLEN); 964 965 /* Ensure pcount isn't read before data lands */ 966 rte_atomic_thread_fence(__ATOMIC_ACQUIRE); 967 968 count = (nb_ops > pcount) ? pcount : nb_ops; 969 970 for (i = 0; i < count; i++) { 971 pending_queue_peek(pqueue, (void **) &user_req, 972 DEFAULT_CMD_QLEN, i + 1 < count); 973 974 ret = check_nb_command_id(user_req, instance); 975 976 if (unlikely(ret == ERR_REQ_PENDING)) { 977 /* Stop checking for completions */ 978 break; 979 } 980 981 /* Return completion code and op handle */ 982 cc[i] = ret; 983 ops[i] = user_req->op; 984 985 CPT_LOG_DP_DEBUG("Request %p Op %p completed with code %d", 986 user_req, user_req->op, ret); 987 988 pending_queue_pop(pqueue, DEFAULT_CMD_QLEN); 989 } 990 991 nb_completed = i; 992 993 for (i = 0; i < nb_completed; i++) { 994 if (likely((i + 1) < nb_completed)) 995 rte_prefetch0(ops[i+1]); 996 997 ops[i] = otx_cpt_process_response(instance, (void *)ops[i], 998 cc[i], op_type); 999 } 1000 1001 return nb_completed; 1002 } 1003 1004 static uint16_t 1005 otx_cpt_dequeue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 1006 { 1007 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_ASYM); 1008 } 1009 1010 static uint16_t 1011 otx_cpt_dequeue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 1012 { 1013 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_SYM); 1014 } 1015 1016 uintptr_t __rte_hot 1017 otx_crypto_adapter_dequeue(uintptr_t get_work1) 1018 { 1019 const struct cpt_instance *instance; 1020 struct cpt_request_info *req; 1021 struct rte_crypto_op *cop; 1022 uint8_t cc, op_type; 1023 uintptr_t *rsp; 1024 1025 req = (struct cpt_request_info *)get_work1; 1026 instance = req->qp; 1027 rsp = req->op; 1028 cop = (void *)rsp[1]; 1029 op_type = cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC ? OP_TYPE_SYM : 1030 OP_TYPE_ASYM; 1031 1032 do { 1033 cc = check_nb_command_id( 1034 req, (struct cpt_instance *)(uintptr_t)instance); 1035 } while (cc == ERR_REQ_PENDING); 1036 1037 cop = otx_cpt_process_response(instance, (void *)req->op, cc, op_type); 1038 1039 return (uintptr_t)(cop); 1040 } 1041 1042 static struct rte_cryptodev_ops cptvf_ops = { 1043 /* Device related operations */ 1044 .dev_configure = otx_cpt_dev_config, 1045 .dev_start = otx_cpt_dev_start, 1046 .dev_stop = otx_cpt_dev_stop, 1047 .dev_close = otx_cpt_dev_close, 1048 .dev_infos_get = otx_cpt_dev_info_get, 1049 1050 .stats_get = NULL, 1051 .stats_reset = NULL, 1052 .queue_pair_setup = otx_cpt_que_pair_setup, 1053 .queue_pair_release = otx_cpt_que_pair_release, 1054 1055 /* Crypto related operations */ 1056 .sym_session_get_size = otx_cpt_get_session_size, 1057 .sym_session_configure = otx_cpt_session_cfg, 1058 .sym_session_clear = otx_cpt_session_clear, 1059 1060 .asym_session_get_size = otx_cpt_asym_session_size_get, 1061 .asym_session_configure = otx_cpt_asym_session_cfg, 1062 .asym_session_clear = otx_cpt_asym_session_clear, 1063 }; 1064 1065 int 1066 otx_cpt_dev_create(struct rte_cryptodev *c_dev) 1067 { 1068 struct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device); 1069 struct cpt_vf *cptvf = NULL; 1070 void *reg_base; 1071 char dev_name[32]; 1072 int ret; 1073 1074 if (pdev->mem_resource[0].phys_addr == 0ULL) 1075 return -EIO; 1076 1077 /* for secondary processes, we don't initialise any further as primary 1078 * has already done this work. 1079 */ 1080 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1081 return 0; 1082 1083 cptvf = rte_zmalloc_socket("otx_cryptodev_private_mem", 1084 sizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE, 1085 rte_socket_id()); 1086 1087 if (cptvf == NULL) { 1088 CPT_LOG_ERR("Cannot allocate memory for device private data"); 1089 return -ENOMEM; 1090 } 1091 1092 snprintf(dev_name, 32, "%02x:%02x.%x", 1093 pdev->addr.bus, pdev->addr.devid, pdev->addr.function); 1094 1095 reg_base = pdev->mem_resource[0].addr; 1096 if (!reg_base) { 1097 CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name); 1098 ret = -ENODEV; 1099 goto fail; 1100 } 1101 1102 ret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name); 1103 if (ret) { 1104 CPT_LOG_ERR("Failed to init cptvf %s", dev_name); 1105 ret = -EIO; 1106 goto fail; 1107 } 1108 1109 switch (cptvf->vftype) { 1110 case OTX_CPT_VF_TYPE_AE: 1111 /* Set asymmetric cpt feature flags */ 1112 c_dev->feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | 1113 RTE_CRYPTODEV_FF_HW_ACCELERATED | 1114 RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT; 1115 break; 1116 case OTX_CPT_VF_TYPE_SE: 1117 /* Set symmetric cpt feature flags */ 1118 c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | 1119 RTE_CRYPTODEV_FF_HW_ACCELERATED | 1120 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | 1121 RTE_CRYPTODEV_FF_IN_PLACE_SGL | 1122 RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | 1123 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | 1124 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | 1125 RTE_CRYPTODEV_FF_SYM_SESSIONLESS | 1126 RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED; 1127 break; 1128 default: 1129 /* Feature not supported. Abort */ 1130 CPT_LOG_ERR("VF type not supported by %s", dev_name); 1131 ret = -EIO; 1132 goto deinit_dev; 1133 } 1134 1135 /* Start off timer for mailbox interrupts */ 1136 otx_cpt_periodic_alarm_start(cptvf); 1137 1138 c_dev->dev_ops = &cptvf_ops; 1139 1140 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) { 1141 c_dev->enqueue_burst = otx_cpt_enqueue_sym; 1142 c_dev->dequeue_burst = otx_cpt_dequeue_sym; 1143 } else { 1144 c_dev->enqueue_burst = otx_cpt_enqueue_asym; 1145 c_dev->dequeue_burst = otx_cpt_dequeue_asym; 1146 } 1147 1148 /* Save dev private data */ 1149 c_dev->data->dev_private = cptvf; 1150 1151 return 0; 1152 1153 deinit_dev: 1154 otx_cpt_deinit_device(cptvf); 1155 1156 fail: 1157 if (cptvf) { 1158 /* Free private data allocated */ 1159 rte_free(cptvf); 1160 } 1161 1162 return ret; 1163 } 1164