1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Cavium, Inc 3 */ 4 5 #include <rte_alarm.h> 6 #include <rte_bus_pci.h> 7 #include <rte_cryptodev.h> 8 #include <rte_cryptodev_pmd.h> 9 #include <rte_errno.h> 10 #include <rte_malloc.h> 11 #include <rte_mempool.h> 12 13 #include "otx_cryptodev.h" 14 #include "otx_cryptodev_capabilities.h" 15 #include "otx_cryptodev_hw_access.h" 16 #include "otx_cryptodev_mbox.h" 17 #include "otx_cryptodev_ops.h" 18 19 #include "cpt_pmd_logs.h" 20 #include "cpt_pmd_ops_helper.h" 21 #include "cpt_ucode.h" 22 #include "cpt_ucode_asym.h" 23 24 static uint64_t otx_fpm_iova[CPT_EC_ID_PMAX]; 25 26 /* Forward declarations */ 27 28 static int 29 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id); 30 31 /* Alarm routines */ 32 33 static void 34 otx_cpt_alarm_cb(void *arg) 35 { 36 struct cpt_vf *cptvf = arg; 37 otx_cpt_poll_misc(cptvf); 38 rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 39 otx_cpt_alarm_cb, cptvf); 40 } 41 42 static int 43 otx_cpt_periodic_alarm_start(void *arg) 44 { 45 return rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 46 otx_cpt_alarm_cb, arg); 47 } 48 49 static int 50 otx_cpt_periodic_alarm_stop(void *arg) 51 { 52 return rte_eal_alarm_cancel(otx_cpt_alarm_cb, arg); 53 } 54 55 /* PMD ops */ 56 57 static int 58 otx_cpt_dev_config(struct rte_cryptodev *dev, 59 struct rte_cryptodev_config *config __rte_unused) 60 { 61 int ret = 0; 62 63 CPT_PMD_INIT_FUNC_TRACE(); 64 65 if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 66 /* Initialize shared FPM table */ 67 ret = cpt_fpm_init(otx_fpm_iova); 68 69 return ret; 70 } 71 72 static int 73 otx_cpt_dev_start(struct rte_cryptodev *c_dev) 74 { 75 void *cptvf = c_dev->data->dev_private; 76 77 CPT_PMD_INIT_FUNC_TRACE(); 78 79 return otx_cpt_start_device(cptvf); 80 } 81 82 static void 83 otx_cpt_dev_stop(struct rte_cryptodev *c_dev) 84 { 85 void *cptvf = c_dev->data->dev_private; 86 87 CPT_PMD_INIT_FUNC_TRACE(); 88 89 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 90 cpt_fpm_clear(); 91 92 otx_cpt_stop_device(cptvf); 93 } 94 95 static int 96 otx_cpt_dev_close(struct rte_cryptodev *c_dev) 97 { 98 void *cptvf = c_dev->data->dev_private; 99 int i, ret; 100 101 CPT_PMD_INIT_FUNC_TRACE(); 102 103 for (i = 0; i < c_dev->data->nb_queue_pairs; i++) { 104 ret = otx_cpt_que_pair_release(c_dev, i); 105 if (ret) 106 return ret; 107 } 108 109 otx_cpt_periodic_alarm_stop(cptvf); 110 otx_cpt_deinit_device(cptvf); 111 112 return 0; 113 } 114 115 static void 116 otx_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info) 117 { 118 CPT_PMD_INIT_FUNC_TRACE(); 119 if (info != NULL) { 120 info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF; 121 info->feature_flags = dev->feature_flags; 122 info->capabilities = otx_get_capabilities(info->feature_flags); 123 info->sym.max_nb_sessions = 0; 124 info->driver_id = otx_cryptodev_driver_id; 125 info->min_mbuf_headroom_req = OTX_CPT_MIN_HEADROOM_REQ; 126 info->min_mbuf_tailroom_req = OTX_CPT_MIN_TAILROOM_REQ; 127 } 128 } 129 130 static int 131 otx_cpt_que_pair_setup(struct rte_cryptodev *dev, 132 uint16_t que_pair_id, 133 const struct rte_cryptodev_qp_conf *qp_conf, 134 int socket_id __rte_unused) 135 { 136 struct cpt_instance *instance = NULL; 137 struct rte_pci_device *pci_dev; 138 int ret = -1; 139 140 CPT_PMD_INIT_FUNC_TRACE(); 141 142 if (dev->data->queue_pairs[que_pair_id] != NULL) { 143 ret = otx_cpt_que_pair_release(dev, que_pair_id); 144 if (ret) 145 return ret; 146 } 147 148 if (qp_conf->nb_descriptors > DEFAULT_CMD_QLEN) { 149 CPT_LOG_INFO("Number of descriptors too big %d, using default " 150 "queue length of %d", qp_conf->nb_descriptors, 151 DEFAULT_CMD_QLEN); 152 } 153 154 pci_dev = RTE_DEV_TO_PCI(dev->device); 155 156 if (pci_dev->mem_resource[0].addr == NULL) { 157 CPT_LOG_ERR("PCI mem address null"); 158 return -EIO; 159 } 160 161 ret = otx_cpt_get_resource(dev, 0, &instance, que_pair_id); 162 if (ret != 0 || instance == NULL) { 163 CPT_LOG_ERR("Error getting instance handle from device %s : " 164 "ret = %d", dev->data->name, ret); 165 return ret; 166 } 167 168 instance->queue_id = que_pair_id; 169 instance->sess_mp = qp_conf->mp_session; 170 instance->sess_mp_priv = qp_conf->mp_session_private; 171 dev->data->queue_pairs[que_pair_id] = instance; 172 173 return 0; 174 } 175 176 static int 177 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id) 178 { 179 struct cpt_instance *instance = dev->data->queue_pairs[que_pair_id]; 180 int ret; 181 182 CPT_PMD_INIT_FUNC_TRACE(); 183 184 ret = otx_cpt_put_resource(instance); 185 if (ret != 0) { 186 CPT_LOG_ERR("Error putting instance handle of device %s : " 187 "ret = %d", dev->data->name, ret); 188 return ret; 189 } 190 191 dev->data->queue_pairs[que_pair_id] = NULL; 192 193 return 0; 194 } 195 196 static unsigned int 197 otx_cpt_get_session_size(struct rte_cryptodev *dev __rte_unused) 198 { 199 return cpt_get_session_size(); 200 } 201 202 static int 203 sym_xform_verify(struct rte_crypto_sym_xform *xform) 204 { 205 if (xform->next) { 206 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 207 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 208 xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) 209 return -ENOTSUP; 210 211 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 212 xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT && 213 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) 214 return -ENOTSUP; 215 216 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 217 xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC && 218 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH && 219 xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1) 220 return -ENOTSUP; 221 222 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 223 xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 && 224 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 225 xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC) 226 return -ENOTSUP; 227 228 } else { 229 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 230 xform->auth.algo == RTE_CRYPTO_AUTH_NULL && 231 xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) 232 return -ENOTSUP; 233 } 234 return 0; 235 } 236 237 static int 238 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform, 239 struct rte_cryptodev_sym_session *sess, 240 struct rte_mempool *pool) 241 { 242 struct rte_crypto_sym_xform *temp_xform = xform; 243 struct cpt_sess_misc *misc; 244 void *priv; 245 int ret; 246 247 ret = sym_xform_verify(xform); 248 if (unlikely(ret)) 249 return ret; 250 251 if (unlikely(rte_mempool_get(pool, &priv))) { 252 CPT_LOG_ERR("Could not allocate session private data"); 253 return -ENOMEM; 254 } 255 256 memset(priv, 0, sizeof(struct cpt_sess_misc) + 257 offsetof(struct cpt_ctx, fctx)); 258 259 misc = priv; 260 261 for ( ; xform != NULL; xform = xform->next) { 262 switch (xform->type) { 263 case RTE_CRYPTO_SYM_XFORM_AEAD: 264 ret = fill_sess_aead(xform, misc); 265 break; 266 case RTE_CRYPTO_SYM_XFORM_CIPHER: 267 ret = fill_sess_cipher(xform, misc); 268 break; 269 case RTE_CRYPTO_SYM_XFORM_AUTH: 270 if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) 271 ret = fill_sess_gmac(xform, misc); 272 else 273 ret = fill_sess_auth(xform, misc); 274 break; 275 default: 276 ret = -1; 277 } 278 279 if (ret) 280 goto priv_put; 281 } 282 283 if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) && 284 cpt_mac_len_verify(&temp_xform->auth)) { 285 CPT_LOG_ERR("MAC length is not supported"); 286 ret = -ENOTSUP; 287 goto priv_put; 288 } 289 290 set_sym_session_private_data(sess, driver_id, priv); 291 292 misc->ctx_dma_addr = rte_mempool_virt2iova(misc) + 293 sizeof(struct cpt_sess_misc); 294 295 return 0; 296 297 priv_put: 298 if (priv) 299 rte_mempool_put(pool, priv); 300 return -ENOTSUP; 301 } 302 303 static void 304 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess) 305 { 306 void *priv = get_sym_session_private_data(sess, driver_id); 307 struct rte_mempool *pool; 308 309 if (priv == NULL) 310 return; 311 312 memset(priv, 0, cpt_get_session_size()); 313 314 pool = rte_mempool_from_obj(priv); 315 316 set_sym_session_private_data(sess, driver_id, NULL); 317 318 rte_mempool_put(pool, priv); 319 } 320 321 static int 322 otx_cpt_session_cfg(struct rte_cryptodev *dev, 323 struct rte_crypto_sym_xform *xform, 324 struct rte_cryptodev_sym_session *sess, 325 struct rte_mempool *pool) 326 { 327 CPT_PMD_INIT_FUNC_TRACE(); 328 329 return sym_session_configure(dev->driver_id, xform, sess, pool); 330 } 331 332 333 static void 334 otx_cpt_session_clear(struct rte_cryptodev *dev, 335 struct rte_cryptodev_sym_session *sess) 336 { 337 CPT_PMD_INIT_FUNC_TRACE(); 338 339 return sym_session_clear(dev->driver_id, sess); 340 } 341 342 static unsigned int 343 otx_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused) 344 { 345 return sizeof(struct cpt_asym_sess_misc); 346 } 347 348 static int 349 otx_cpt_asym_session_cfg(struct rte_cryptodev *dev, 350 struct rte_crypto_asym_xform *xform __rte_unused, 351 struct rte_cryptodev_asym_session *sess, 352 struct rte_mempool *pool) 353 { 354 struct cpt_asym_sess_misc *priv; 355 int ret; 356 357 CPT_PMD_INIT_FUNC_TRACE(); 358 359 if (rte_mempool_get(pool, (void **)&priv)) { 360 CPT_LOG_ERR("Could not allocate session private data"); 361 return -ENOMEM; 362 } 363 364 memset(priv, 0, sizeof(struct cpt_asym_sess_misc)); 365 366 ret = cpt_fill_asym_session_parameters(priv, xform); 367 if (ret) { 368 CPT_LOG_ERR("Could not configure session parameters"); 369 370 /* Return session to mempool */ 371 rte_mempool_put(pool, priv); 372 return ret; 373 } 374 375 set_asym_session_private_data(sess, dev->driver_id, priv); 376 return 0; 377 } 378 379 static void 380 otx_cpt_asym_session_clear(struct rte_cryptodev *dev, 381 struct rte_cryptodev_asym_session *sess) 382 { 383 struct cpt_asym_sess_misc *priv; 384 struct rte_mempool *sess_mp; 385 386 CPT_PMD_INIT_FUNC_TRACE(); 387 388 priv = get_asym_session_private_data(sess, dev->driver_id); 389 390 if (priv == NULL) 391 return; 392 393 /* Free resources allocated during session configure */ 394 cpt_free_asym_session_parameters(priv); 395 memset(priv, 0, otx_cpt_asym_session_size_get(dev)); 396 sess_mp = rte_mempool_from_obj(priv); 397 set_asym_session_private_data(sess, dev->driver_id, NULL); 398 rte_mempool_put(sess_mp, priv); 399 } 400 401 static __rte_always_inline int32_t __rte_hot 402 otx_cpt_request_enqueue(struct cpt_instance *instance, 403 struct pending_queue *pqueue, 404 void *req) 405 { 406 struct cpt_request_info *user_req = (struct cpt_request_info *)req; 407 408 if (unlikely(pqueue->pending_count >= DEFAULT_CMD_QLEN)) 409 return -EAGAIN; 410 411 fill_cpt_inst(instance, req); 412 413 CPT_LOG_DP_DEBUG("req: %p op: %p ", req, user_req->op); 414 415 /* Fill time_out cycles */ 416 user_req->time_out = rte_get_timer_cycles() + 417 DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz(); 418 user_req->extra_time = 0; 419 420 /* Default mode of software queue */ 421 mark_cpt_inst(instance); 422 423 pqueue->rid_queue[pqueue->enq_tail].rid = (uintptr_t)user_req; 424 425 /* We will use soft queue length here to limit requests */ 426 MOD_INC(pqueue->enq_tail, DEFAULT_CMD_QLEN); 427 pqueue->pending_count += 1; 428 429 CPT_LOG_DP_DEBUG("Submitted NB cmd with request: %p " 430 "op: %p", user_req, user_req->op); 431 return 0; 432 } 433 434 static __rte_always_inline int __rte_hot 435 otx_cpt_enq_single_asym(struct cpt_instance *instance, 436 struct rte_crypto_op *op, 437 struct pending_queue *pqueue) 438 { 439 struct cpt_qp_meta_info *minfo = &instance->meta_info; 440 struct rte_crypto_asym_op *asym_op = op->asym; 441 struct asym_op_params params = {0}; 442 struct cpt_asym_sess_misc *sess; 443 uintptr_t *cop; 444 void *mdata; 445 int ret; 446 447 if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) { 448 CPT_LOG_DP_ERR("Could not allocate meta buffer for request"); 449 return -ENOMEM; 450 } 451 452 sess = get_asym_session_private_data(asym_op->session, 453 otx_cryptodev_driver_id); 454 455 /* Store phys_addr of the mdata to meta_buf */ 456 params.meta_buf = rte_mempool_virt2iova(mdata); 457 458 cop = mdata; 459 cop[0] = (uintptr_t)mdata; 460 cop[1] = (uintptr_t)op; 461 cop[2] = cop[3] = 0ULL; 462 463 params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t)); 464 params.req->op = cop; 465 466 /* Adjust meta_buf by crypto_op data and request_info struct */ 467 params.meta_buf += (4 * sizeof(uintptr_t)) + 468 sizeof(struct cpt_request_info); 469 470 switch (sess->xfrm_type) { 471 case RTE_CRYPTO_ASYM_XFORM_MODEX: 472 ret = cpt_modex_prep(¶ms, &sess->mod_ctx); 473 if (unlikely(ret)) 474 goto req_fail; 475 break; 476 case RTE_CRYPTO_ASYM_XFORM_RSA: 477 ret = cpt_enqueue_rsa_op(op, ¶ms, sess); 478 if (unlikely(ret)) 479 goto req_fail; 480 break; 481 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 482 ret = cpt_enqueue_ecdsa_op(op, ¶ms, sess, otx_fpm_iova); 483 if (unlikely(ret)) 484 goto req_fail; 485 break; 486 case RTE_CRYPTO_ASYM_XFORM_ECPM: 487 ret = cpt_ecpm_prep(&asym_op->ecpm, ¶ms, 488 sess->ec_ctx.curveid); 489 if (unlikely(ret)) 490 goto req_fail; 491 break; 492 493 default: 494 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 495 ret = -EINVAL; 496 goto req_fail; 497 } 498 499 ret = otx_cpt_request_enqueue(instance, pqueue, params.req); 500 501 if (unlikely(ret)) { 502 CPT_LOG_DP_ERR("Could not enqueue crypto req"); 503 goto req_fail; 504 } 505 506 return 0; 507 508 req_fail: 509 free_op_meta(mdata, minfo->pool); 510 511 return ret; 512 } 513 514 static __rte_always_inline int __rte_hot 515 otx_cpt_enq_single_sym(struct cpt_instance *instance, 516 struct rte_crypto_op *op, 517 struct pending_queue *pqueue) 518 { 519 struct cpt_sess_misc *sess; 520 struct rte_crypto_sym_op *sym_op = op->sym; 521 void *prep_req, *mdata = NULL; 522 int ret = 0; 523 uint64_t cpt_op; 524 525 sess = (struct cpt_sess_misc *) 526 get_sym_session_private_data(sym_op->session, 527 otx_cryptodev_driver_id); 528 529 cpt_op = sess->cpt_op; 530 531 if (likely(cpt_op & CPT_OP_CIPHER_MASK)) 532 ret = fill_fc_params(op, sess, &instance->meta_info, &mdata, 533 &prep_req); 534 else 535 ret = fill_digest_params(op, sess, &instance->meta_info, 536 &mdata, &prep_req); 537 538 if (unlikely(ret)) { 539 CPT_LOG_DP_ERR("prep cryto req : op %p, cpt_op 0x%x " 540 "ret 0x%x", op, (unsigned int)cpt_op, ret); 541 return ret; 542 } 543 544 /* Enqueue prepared instruction to h/w */ 545 ret = otx_cpt_request_enqueue(instance, pqueue, prep_req); 546 547 if (unlikely(ret)) { 548 /* Buffer allocated for request preparation need to be freed */ 549 free_op_meta(mdata, instance->meta_info.pool); 550 return ret; 551 } 552 553 return 0; 554 } 555 556 static __rte_always_inline int __rte_hot 557 otx_cpt_enq_single_sym_sessless(struct cpt_instance *instance, 558 struct rte_crypto_op *op, 559 struct pending_queue *pend_q) 560 { 561 const int driver_id = otx_cryptodev_driver_id; 562 struct rte_crypto_sym_op *sym_op = op->sym; 563 struct rte_cryptodev_sym_session *sess; 564 int ret; 565 566 /* Create temporary session */ 567 568 if (rte_mempool_get(instance->sess_mp, (void **)&sess)) 569 return -ENOMEM; 570 571 ret = sym_session_configure(driver_id, sym_op->xform, sess, 572 instance->sess_mp_priv); 573 if (ret) 574 goto sess_put; 575 576 sym_op->session = sess; 577 578 ret = otx_cpt_enq_single_sym(instance, op, pend_q); 579 580 if (unlikely(ret)) 581 goto priv_put; 582 583 return 0; 584 585 priv_put: 586 sym_session_clear(driver_id, sess); 587 sess_put: 588 rte_mempool_put(instance->sess_mp, sess); 589 return ret; 590 } 591 592 #define OP_TYPE_SYM 0 593 #define OP_TYPE_ASYM 1 594 595 static __rte_always_inline int __rte_hot 596 otx_cpt_enq_single(struct cpt_instance *inst, 597 struct rte_crypto_op *op, 598 struct pending_queue *pqueue, 599 const uint8_t op_type) 600 { 601 /* Check for the type */ 602 603 if (op_type == OP_TYPE_SYM) { 604 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 605 return otx_cpt_enq_single_sym(inst, op, pqueue); 606 else 607 return otx_cpt_enq_single_sym_sessless(inst, op, 608 pqueue); 609 } 610 611 if (op_type == OP_TYPE_ASYM) { 612 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 613 return otx_cpt_enq_single_asym(inst, op, pqueue); 614 } 615 616 /* Should not reach here */ 617 return -ENOTSUP; 618 } 619 620 static __rte_always_inline uint16_t __rte_hot 621 otx_cpt_pkt_enqueue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 622 const uint8_t op_type) 623 { 624 struct cpt_instance *instance = (struct cpt_instance *)qptr; 625 uint16_t count; 626 int ret; 627 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 628 struct pending_queue *pqueue = &cptvf->pqueue; 629 630 count = DEFAULT_CMD_QLEN - pqueue->pending_count; 631 if (nb_ops > count) 632 nb_ops = count; 633 634 count = 0; 635 while (likely(count < nb_ops)) { 636 637 /* Enqueue single op */ 638 ret = otx_cpt_enq_single(instance, ops[count], pqueue, op_type); 639 640 if (unlikely(ret)) 641 break; 642 count++; 643 } 644 otx_cpt_ring_dbell(instance, count); 645 return count; 646 } 647 648 static uint16_t 649 otx_cpt_enqueue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 650 { 651 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_ASYM); 652 } 653 654 static uint16_t 655 otx_cpt_enqueue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 656 { 657 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_SYM); 658 } 659 660 static inline void 661 otx_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req, 662 struct rte_crypto_rsa_xform *rsa_ctx) 663 664 { 665 struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa; 666 667 switch (rsa->op_type) { 668 case RTE_CRYPTO_ASYM_OP_ENCRYPT: 669 rsa->cipher.length = rsa_ctx->n.length; 670 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length); 671 break; 672 case RTE_CRYPTO_ASYM_OP_DECRYPT: 673 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 674 rsa->message.length = rsa_ctx->n.length; 675 else { 676 /* Get length of decrypted output */ 677 rsa->message.length = rte_cpu_to_be_16 678 (*((uint16_t *)req->rptr)); 679 680 /* Offset data pointer by length fields */ 681 req->rptr += 2; 682 } 683 memcpy(rsa->message.data, req->rptr, rsa->message.length); 684 break; 685 case RTE_CRYPTO_ASYM_OP_SIGN: 686 rsa->sign.length = rsa_ctx->n.length; 687 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 688 break; 689 case RTE_CRYPTO_ASYM_OP_VERIFY: 690 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 691 rsa->sign.length = rsa_ctx->n.length; 692 else { 693 /* Get length of decrypted output */ 694 rsa->sign.length = rte_cpu_to_be_16 695 (*((uint16_t *)req->rptr)); 696 697 /* Offset data pointer by length fields */ 698 req->rptr += 2; 699 } 700 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 701 702 if (memcmp(rsa->sign.data, rsa->message.data, 703 rsa->message.length)) { 704 CPT_LOG_DP_ERR("RSA verification failed"); 705 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 706 } 707 break; 708 default: 709 CPT_LOG_DP_DEBUG("Invalid RSA operation type"); 710 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 711 break; 712 } 713 } 714 715 static __rte_always_inline void 716 otx_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa, 717 struct cpt_request_info *req, 718 struct cpt_asym_ec_ctx *ec) 719 720 { 721 int prime_len = ec_grp[ec->curveid].prime.length; 722 723 if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY) 724 return; 725 726 /* Separate out sign r and s components */ 727 memcpy(ecdsa->r.data, req->rptr, prime_len); 728 memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len); 729 ecdsa->r.length = prime_len; 730 ecdsa->s.length = prime_len; 731 } 732 733 static __rte_always_inline void 734 otx_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm, 735 struct cpt_request_info *req, 736 struct cpt_asym_ec_ctx *ec) 737 { 738 int prime_len = ec_grp[ec->curveid].prime.length; 739 740 memcpy(ecpm->r.x.data, req->rptr, prime_len); 741 memcpy(ecpm->r.y.data, req->rptr + ROUNDUP8(prime_len), prime_len); 742 ecpm->r.x.length = prime_len; 743 ecpm->r.y.length = prime_len; 744 } 745 746 static __rte_always_inline void __rte_hot 747 otx_cpt_asym_post_process(struct rte_crypto_op *cop, 748 struct cpt_request_info *req) 749 { 750 struct rte_crypto_asym_op *op = cop->asym; 751 struct cpt_asym_sess_misc *sess; 752 753 sess = get_asym_session_private_data(op->session, 754 otx_cryptodev_driver_id); 755 756 switch (sess->xfrm_type) { 757 case RTE_CRYPTO_ASYM_XFORM_RSA: 758 otx_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx); 759 break; 760 case RTE_CRYPTO_ASYM_XFORM_MODEX: 761 op->modex.result.length = sess->mod_ctx.modulus.length; 762 memcpy(op->modex.result.data, req->rptr, 763 op->modex.result.length); 764 break; 765 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 766 otx_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx); 767 break; 768 case RTE_CRYPTO_ASYM_XFORM_ECPM: 769 otx_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx); 770 break; 771 default: 772 CPT_LOG_DP_DEBUG("Invalid crypto xform type"); 773 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 774 break; 775 } 776 } 777 778 static __rte_always_inline void __rte_hot 779 otx_cpt_dequeue_post_process(struct rte_crypto_op *cop, uintptr_t *rsp, 780 const uint8_t op_type) 781 { 782 /* H/w has returned success */ 783 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS; 784 785 /* Perform further post processing */ 786 787 if ((op_type == OP_TYPE_SYM) && 788 (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC)) { 789 /* Check if auth verify need to be completed */ 790 if (unlikely(rsp[2])) 791 compl_auth_verify(cop, (uint8_t *)rsp[2], rsp[3]); 792 return; 793 } 794 795 if ((op_type == OP_TYPE_ASYM) && 796 (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC)) { 797 rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t)); 798 otx_cpt_asym_post_process(cop, (struct cpt_request_info *)rsp); 799 } 800 801 return; 802 } 803 804 static __rte_always_inline uint16_t __rte_hot 805 otx_cpt_pkt_dequeue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 806 const uint8_t op_type) 807 { 808 struct cpt_instance *instance = (struct cpt_instance *)qptr; 809 struct cpt_request_info *user_req; 810 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 811 struct rid *rid_e; 812 uint8_t cc[nb_ops]; 813 int i, count, pcount; 814 uint8_t ret; 815 int nb_completed; 816 struct pending_queue *pqueue = &cptvf->pqueue; 817 struct rte_crypto_op *cop; 818 void *metabuf; 819 uintptr_t *rsp; 820 821 pcount = pqueue->pending_count; 822 count = (nb_ops > pcount) ? pcount : nb_ops; 823 824 for (i = 0; i < count; i++) { 825 rid_e = &pqueue->rid_queue[pqueue->deq_head]; 826 user_req = (struct cpt_request_info *)(rid_e->rid); 827 828 if (likely((i+1) < count)) 829 rte_prefetch_non_temporal((void *)rid_e[1].rid); 830 831 ret = check_nb_command_id(user_req, instance); 832 833 if (unlikely(ret == ERR_REQ_PENDING)) { 834 /* Stop checking for completions */ 835 break; 836 } 837 838 /* Return completion code and op handle */ 839 cc[i] = ret; 840 ops[i] = user_req->op; 841 842 CPT_LOG_DP_DEBUG("Request %p Op %p completed with code %d", 843 user_req, user_req->op, ret); 844 845 MOD_INC(pqueue->deq_head, DEFAULT_CMD_QLEN); 846 pqueue->pending_count -= 1; 847 } 848 849 nb_completed = i; 850 851 for (i = 0; i < nb_completed; i++) { 852 853 rsp = (void *)ops[i]; 854 855 if (likely((i + 1) < nb_completed)) 856 rte_prefetch0(ops[i+1]); 857 858 metabuf = (void *)rsp[0]; 859 cop = (void *)rsp[1]; 860 861 ops[i] = cop; 862 863 /* Check completion code */ 864 865 if (likely(cc[i] == 0)) { 866 /* H/w success pkt. Post process */ 867 otx_cpt_dequeue_post_process(cop, rsp, op_type); 868 } else if (cc[i] == ERR_GC_ICV_MISCOMPARE) { 869 /* auth data mismatch */ 870 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED; 871 } else { 872 /* Error */ 873 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 874 } 875 876 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) { 877 void *sess_private_data_t = 878 get_sym_session_private_data(cop->sym->session, 879 otx_cryptodev_driver_id); 880 memset(sess_private_data_t, 0, 881 cpt_get_session_size()); 882 memset(cop->sym->session, 0, 883 rte_cryptodev_sym_get_existing_header_session_size( 884 cop->sym->session)); 885 rte_mempool_put(instance->sess_mp_priv, 886 sess_private_data_t); 887 rte_mempool_put(instance->sess_mp, cop->sym->session); 888 cop->sym->session = NULL; 889 } 890 free_op_meta(metabuf, instance->meta_info.pool); 891 } 892 893 return nb_completed; 894 } 895 896 static uint16_t 897 otx_cpt_dequeue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 898 { 899 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_ASYM); 900 } 901 902 static uint16_t 903 otx_cpt_dequeue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 904 { 905 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_SYM); 906 } 907 908 static struct rte_cryptodev_ops cptvf_ops = { 909 /* Device related operations */ 910 .dev_configure = otx_cpt_dev_config, 911 .dev_start = otx_cpt_dev_start, 912 .dev_stop = otx_cpt_dev_stop, 913 .dev_close = otx_cpt_dev_close, 914 .dev_infos_get = otx_cpt_dev_info_get, 915 916 .stats_get = NULL, 917 .stats_reset = NULL, 918 .queue_pair_setup = otx_cpt_que_pair_setup, 919 .queue_pair_release = otx_cpt_que_pair_release, 920 921 /* Crypto related operations */ 922 .sym_session_get_size = otx_cpt_get_session_size, 923 .sym_session_configure = otx_cpt_session_cfg, 924 .sym_session_clear = otx_cpt_session_clear, 925 926 .asym_session_get_size = otx_cpt_asym_session_size_get, 927 .asym_session_configure = otx_cpt_asym_session_cfg, 928 .asym_session_clear = otx_cpt_asym_session_clear, 929 }; 930 931 int 932 otx_cpt_dev_create(struct rte_cryptodev *c_dev) 933 { 934 struct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device); 935 struct cpt_vf *cptvf = NULL; 936 void *reg_base; 937 char dev_name[32]; 938 int ret; 939 940 if (pdev->mem_resource[0].phys_addr == 0ULL) 941 return -EIO; 942 943 /* for secondary processes, we don't initialise any further as primary 944 * has already done this work. 945 */ 946 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 947 return 0; 948 949 cptvf = rte_zmalloc_socket("otx_cryptodev_private_mem", 950 sizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE, 951 rte_socket_id()); 952 953 if (cptvf == NULL) { 954 CPT_LOG_ERR("Cannot allocate memory for device private data"); 955 return -ENOMEM; 956 } 957 958 snprintf(dev_name, 32, "%02x:%02x.%x", 959 pdev->addr.bus, pdev->addr.devid, pdev->addr.function); 960 961 reg_base = pdev->mem_resource[0].addr; 962 if (!reg_base) { 963 CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name); 964 ret = -ENODEV; 965 goto fail; 966 } 967 968 ret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name); 969 if (ret) { 970 CPT_LOG_ERR("Failed to init cptvf %s", dev_name); 971 ret = -EIO; 972 goto fail; 973 } 974 975 switch (cptvf->vftype) { 976 case OTX_CPT_VF_TYPE_AE: 977 /* Set asymmetric cpt feature flags */ 978 c_dev->feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | 979 RTE_CRYPTODEV_FF_HW_ACCELERATED | 980 RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT; 981 break; 982 case OTX_CPT_VF_TYPE_SE: 983 /* Set symmetric cpt feature flags */ 984 c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | 985 RTE_CRYPTODEV_FF_HW_ACCELERATED | 986 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | 987 RTE_CRYPTODEV_FF_IN_PLACE_SGL | 988 RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | 989 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | 990 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | 991 RTE_CRYPTODEV_FF_SYM_SESSIONLESS; 992 break; 993 default: 994 /* Feature not supported. Abort */ 995 CPT_LOG_ERR("VF type not supported by %s", dev_name); 996 ret = -EIO; 997 goto deinit_dev; 998 } 999 1000 /* Start off timer for mailbox interrupts */ 1001 otx_cpt_periodic_alarm_start(cptvf); 1002 1003 c_dev->dev_ops = &cptvf_ops; 1004 1005 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) { 1006 c_dev->enqueue_burst = otx_cpt_enqueue_sym; 1007 c_dev->dequeue_burst = otx_cpt_dequeue_sym; 1008 } else { 1009 c_dev->enqueue_burst = otx_cpt_enqueue_asym; 1010 c_dev->dequeue_burst = otx_cpt_dequeue_asym; 1011 } 1012 1013 /* Save dev private data */ 1014 c_dev->data->dev_private = cptvf; 1015 1016 return 0; 1017 1018 deinit_dev: 1019 otx_cpt_deinit_device(cptvf); 1020 1021 fail: 1022 if (cptvf) { 1023 /* Free private data allocated */ 1024 rte_free(cptvf); 1025 } 1026 1027 return ret; 1028 } 1029