1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Cavium, Inc 3 */ 4 5 #include <rte_alarm.h> 6 #include <rte_bus_pci.h> 7 #include <rte_cryptodev.h> 8 #include <rte_cryptodev_pmd.h> 9 #include <rte_errno.h> 10 #include <rte_malloc.h> 11 #include <rte_mempool.h> 12 13 #include "otx_cryptodev.h" 14 #include "otx_cryptodev_capabilities.h" 15 #include "otx_cryptodev_hw_access.h" 16 #include "otx_cryptodev_mbox.h" 17 #include "otx_cryptodev_ops.h" 18 19 #include "cpt_pmd_logs.h" 20 #include "cpt_pmd_ops_helper.h" 21 #include "cpt_ucode.h" 22 #include "cpt_ucode_asym.h" 23 24 static uint64_t otx_fpm_iova[CPT_EC_ID_PMAX]; 25 26 /* Forward declarations */ 27 28 static int 29 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id); 30 31 /* Alarm routines */ 32 33 static void 34 otx_cpt_alarm_cb(void *arg) 35 { 36 struct cpt_vf *cptvf = arg; 37 otx_cpt_poll_misc(cptvf); 38 rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 39 otx_cpt_alarm_cb, cptvf); 40 } 41 42 static int 43 otx_cpt_periodic_alarm_start(void *arg) 44 { 45 return rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 46 otx_cpt_alarm_cb, arg); 47 } 48 49 static int 50 otx_cpt_periodic_alarm_stop(void *arg) 51 { 52 return rte_eal_alarm_cancel(otx_cpt_alarm_cb, arg); 53 } 54 55 /* PMD ops */ 56 57 static int 58 otx_cpt_dev_config(struct rte_cryptodev *dev, 59 struct rte_cryptodev_config *config __rte_unused) 60 { 61 int ret = 0; 62 63 CPT_PMD_INIT_FUNC_TRACE(); 64 65 if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 66 /* Initialize shared FPM table */ 67 ret = cpt_fpm_init(otx_fpm_iova); 68 69 return ret; 70 } 71 72 static int 73 otx_cpt_dev_start(struct rte_cryptodev *c_dev) 74 { 75 void *cptvf = c_dev->data->dev_private; 76 77 CPT_PMD_INIT_FUNC_TRACE(); 78 79 return otx_cpt_start_device(cptvf); 80 } 81 82 static void 83 otx_cpt_dev_stop(struct rte_cryptodev *c_dev) 84 { 85 void *cptvf = c_dev->data->dev_private; 86 87 CPT_PMD_INIT_FUNC_TRACE(); 88 89 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) 90 cpt_fpm_clear(); 91 92 otx_cpt_stop_device(cptvf); 93 } 94 95 static int 96 otx_cpt_dev_close(struct rte_cryptodev *c_dev) 97 { 98 void *cptvf = c_dev->data->dev_private; 99 int i, ret; 100 101 CPT_PMD_INIT_FUNC_TRACE(); 102 103 for (i = 0; i < c_dev->data->nb_queue_pairs; i++) { 104 ret = otx_cpt_que_pair_release(c_dev, i); 105 if (ret) 106 return ret; 107 } 108 109 otx_cpt_periodic_alarm_stop(cptvf); 110 otx_cpt_deinit_device(cptvf); 111 112 return 0; 113 } 114 115 static void 116 otx_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info) 117 { 118 CPT_PMD_INIT_FUNC_TRACE(); 119 if (info != NULL) { 120 info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF; 121 info->feature_flags = dev->feature_flags; 122 info->capabilities = otx_get_capabilities(info->feature_flags); 123 info->sym.max_nb_sessions = 0; 124 info->driver_id = otx_cryptodev_driver_id; 125 info->min_mbuf_headroom_req = OTX_CPT_MIN_HEADROOM_REQ; 126 info->min_mbuf_tailroom_req = OTX_CPT_MIN_TAILROOM_REQ; 127 } 128 } 129 130 static int 131 otx_cpt_que_pair_setup(struct rte_cryptodev *dev, 132 uint16_t que_pair_id, 133 const struct rte_cryptodev_qp_conf *qp_conf, 134 int socket_id __rte_unused) 135 { 136 struct cpt_instance *instance = NULL; 137 struct rte_pci_device *pci_dev; 138 int ret = -1; 139 140 CPT_PMD_INIT_FUNC_TRACE(); 141 142 if (dev->data->queue_pairs[que_pair_id] != NULL) { 143 ret = otx_cpt_que_pair_release(dev, que_pair_id); 144 if (ret) 145 return ret; 146 } 147 148 if (qp_conf->nb_descriptors > DEFAULT_CMD_QLEN) { 149 CPT_LOG_INFO("Number of descriptors too big %d, using default " 150 "queue length of %d", qp_conf->nb_descriptors, 151 DEFAULT_CMD_QLEN); 152 } 153 154 pci_dev = RTE_DEV_TO_PCI(dev->device); 155 156 if (pci_dev->mem_resource[0].addr == NULL) { 157 CPT_LOG_ERR("PCI mem address null"); 158 return -EIO; 159 } 160 161 ret = otx_cpt_get_resource(dev, 0, &instance, que_pair_id); 162 if (ret != 0 || instance == NULL) { 163 CPT_LOG_ERR("Error getting instance handle from device %s : " 164 "ret = %d", dev->data->name, ret); 165 return ret; 166 } 167 168 instance->queue_id = que_pair_id; 169 instance->sess_mp = qp_conf->mp_session; 170 instance->sess_mp_priv = qp_conf->mp_session_private; 171 dev->data->queue_pairs[que_pair_id] = instance; 172 173 return 0; 174 } 175 176 static int 177 otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id) 178 { 179 struct cpt_instance *instance = dev->data->queue_pairs[que_pair_id]; 180 int ret; 181 182 CPT_PMD_INIT_FUNC_TRACE(); 183 184 ret = otx_cpt_put_resource(instance); 185 if (ret != 0) { 186 CPT_LOG_ERR("Error putting instance handle of device %s : " 187 "ret = %d", dev->data->name, ret); 188 return ret; 189 } 190 191 dev->data->queue_pairs[que_pair_id] = NULL; 192 193 return 0; 194 } 195 196 static unsigned int 197 otx_cpt_get_session_size(struct rte_cryptodev *dev __rte_unused) 198 { 199 return cpt_get_session_size(); 200 } 201 202 static int 203 sym_xform_verify(struct rte_crypto_sym_xform *xform) 204 { 205 if (xform->next) { 206 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 207 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 208 xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) 209 return -ENOTSUP; 210 211 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 212 xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT && 213 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) 214 return -ENOTSUP; 215 216 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 217 xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC && 218 xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH && 219 xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1) 220 return -ENOTSUP; 221 222 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 223 xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 && 224 xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER && 225 xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC) 226 return -ENOTSUP; 227 228 } else { 229 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && 230 xform->auth.algo == RTE_CRYPTO_AUTH_NULL && 231 xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) 232 return -ENOTSUP; 233 } 234 return 0; 235 } 236 237 static int 238 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform, 239 struct rte_cryptodev_sym_session *sess, 240 struct rte_mempool *pool) 241 { 242 struct rte_crypto_sym_xform *temp_xform = xform; 243 struct cpt_sess_misc *misc; 244 vq_cmd_word3_t vq_cmd_w3; 245 void *priv; 246 int ret; 247 248 ret = sym_xform_verify(xform); 249 if (unlikely(ret)) 250 return ret; 251 252 if (unlikely(rte_mempool_get(pool, &priv))) { 253 CPT_LOG_ERR("Could not allocate session private data"); 254 return -ENOMEM; 255 } 256 257 memset(priv, 0, sizeof(struct cpt_sess_misc) + 258 offsetof(struct cpt_ctx, mc_ctx)); 259 260 misc = priv; 261 262 for ( ; xform != NULL; xform = xform->next) { 263 switch (xform->type) { 264 case RTE_CRYPTO_SYM_XFORM_AEAD: 265 ret = fill_sess_aead(xform, misc); 266 break; 267 case RTE_CRYPTO_SYM_XFORM_CIPHER: 268 ret = fill_sess_cipher(xform, misc); 269 break; 270 case RTE_CRYPTO_SYM_XFORM_AUTH: 271 if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) 272 ret = fill_sess_gmac(xform, misc); 273 else 274 ret = fill_sess_auth(xform, misc); 275 break; 276 default: 277 ret = -1; 278 } 279 280 if (ret) 281 goto priv_put; 282 } 283 284 if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) && 285 cpt_mac_len_verify(&temp_xform->auth)) { 286 CPT_LOG_ERR("MAC length is not supported"); 287 ret = -ENOTSUP; 288 goto priv_put; 289 } 290 291 set_sym_session_private_data(sess, driver_id, priv); 292 293 misc->ctx_dma_addr = rte_mempool_virt2iova(misc) + 294 sizeof(struct cpt_sess_misc); 295 296 vq_cmd_w3.u64 = 0; 297 vq_cmd_w3.s.grp = 0; 298 vq_cmd_w3.s.cptr = misc->ctx_dma_addr + offsetof(struct cpt_ctx, 299 mc_ctx); 300 301 misc->cpt_inst_w7 = vq_cmd_w3.u64; 302 303 return 0; 304 305 priv_put: 306 if (priv) 307 rte_mempool_put(pool, priv); 308 return -ENOTSUP; 309 } 310 311 static void 312 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess) 313 { 314 void *priv = get_sym_session_private_data(sess, driver_id); 315 struct rte_mempool *pool; 316 317 if (priv == NULL) 318 return; 319 320 memset(priv, 0, cpt_get_session_size()); 321 322 pool = rte_mempool_from_obj(priv); 323 324 set_sym_session_private_data(sess, driver_id, NULL); 325 326 rte_mempool_put(pool, priv); 327 } 328 329 static int 330 otx_cpt_session_cfg(struct rte_cryptodev *dev, 331 struct rte_crypto_sym_xform *xform, 332 struct rte_cryptodev_sym_session *sess, 333 struct rte_mempool *pool) 334 { 335 CPT_PMD_INIT_FUNC_TRACE(); 336 337 return sym_session_configure(dev->driver_id, xform, sess, pool); 338 } 339 340 341 static void 342 otx_cpt_session_clear(struct rte_cryptodev *dev, 343 struct rte_cryptodev_sym_session *sess) 344 { 345 CPT_PMD_INIT_FUNC_TRACE(); 346 347 return sym_session_clear(dev->driver_id, sess); 348 } 349 350 static unsigned int 351 otx_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused) 352 { 353 return sizeof(struct cpt_asym_sess_misc); 354 } 355 356 static int 357 otx_cpt_asym_session_cfg(struct rte_cryptodev *dev, 358 struct rte_crypto_asym_xform *xform __rte_unused, 359 struct rte_cryptodev_asym_session *sess, 360 struct rte_mempool *pool) 361 { 362 struct cpt_asym_sess_misc *priv; 363 int ret; 364 365 CPT_PMD_INIT_FUNC_TRACE(); 366 367 if (rte_mempool_get(pool, (void **)&priv)) { 368 CPT_LOG_ERR("Could not allocate session private data"); 369 return -ENOMEM; 370 } 371 372 memset(priv, 0, sizeof(struct cpt_asym_sess_misc)); 373 374 ret = cpt_fill_asym_session_parameters(priv, xform); 375 if (ret) { 376 CPT_LOG_ERR("Could not configure session parameters"); 377 378 /* Return session to mempool */ 379 rte_mempool_put(pool, priv); 380 return ret; 381 } 382 383 priv->cpt_inst_w7 = 0; 384 385 set_asym_session_private_data(sess, dev->driver_id, priv); 386 return 0; 387 } 388 389 static void 390 otx_cpt_asym_session_clear(struct rte_cryptodev *dev, 391 struct rte_cryptodev_asym_session *sess) 392 { 393 struct cpt_asym_sess_misc *priv; 394 struct rte_mempool *sess_mp; 395 396 CPT_PMD_INIT_FUNC_TRACE(); 397 398 priv = get_asym_session_private_data(sess, dev->driver_id); 399 400 if (priv == NULL) 401 return; 402 403 /* Free resources allocated during session configure */ 404 cpt_free_asym_session_parameters(priv); 405 memset(priv, 0, otx_cpt_asym_session_size_get(dev)); 406 sess_mp = rte_mempool_from_obj(priv); 407 set_asym_session_private_data(sess, dev->driver_id, NULL); 408 rte_mempool_put(sess_mp, priv); 409 } 410 411 static __rte_always_inline int32_t __rte_hot 412 otx_cpt_request_enqueue(struct cpt_instance *instance, 413 struct pending_queue *pqueue, 414 void *req, uint64_t cpt_inst_w7) 415 { 416 struct cpt_request_info *user_req = (struct cpt_request_info *)req; 417 418 if (unlikely(pqueue->pending_count >= DEFAULT_CMD_QLEN)) 419 return -EAGAIN; 420 421 fill_cpt_inst(instance, req, cpt_inst_w7); 422 423 CPT_LOG_DP_DEBUG("req: %p op: %p ", req, user_req->op); 424 425 /* Fill time_out cycles */ 426 user_req->time_out = rte_get_timer_cycles() + 427 DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz(); 428 user_req->extra_time = 0; 429 430 /* Default mode of software queue */ 431 mark_cpt_inst(instance); 432 433 pqueue->req_queue[pqueue->enq_tail] = (uintptr_t)user_req; 434 435 /* We will use soft queue length here to limit requests */ 436 MOD_INC(pqueue->enq_tail, DEFAULT_CMD_QLEN); 437 pqueue->pending_count += 1; 438 439 CPT_LOG_DP_DEBUG("Submitted NB cmd with request: %p " 440 "op: %p", user_req, user_req->op); 441 return 0; 442 } 443 444 static __rte_always_inline int __rte_hot 445 otx_cpt_enq_single_asym(struct cpt_instance *instance, 446 struct rte_crypto_op *op, 447 struct pending_queue *pqueue) 448 { 449 struct cpt_qp_meta_info *minfo = &instance->meta_info; 450 struct rte_crypto_asym_op *asym_op = op->asym; 451 struct asym_op_params params = {0}; 452 struct cpt_asym_sess_misc *sess; 453 uintptr_t *cop; 454 void *mdata; 455 int ret; 456 457 if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) { 458 CPT_LOG_DP_ERR("Could not allocate meta buffer for request"); 459 return -ENOMEM; 460 } 461 462 sess = get_asym_session_private_data(asym_op->session, 463 otx_cryptodev_driver_id); 464 465 /* Store phys_addr of the mdata to meta_buf */ 466 params.meta_buf = rte_mempool_virt2iova(mdata); 467 468 cop = mdata; 469 cop[0] = (uintptr_t)mdata; 470 cop[1] = (uintptr_t)op; 471 cop[2] = cop[3] = 0ULL; 472 473 params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t)); 474 params.req->op = cop; 475 476 /* Adjust meta_buf by crypto_op data and request_info struct */ 477 params.meta_buf += (4 * sizeof(uintptr_t)) + 478 sizeof(struct cpt_request_info); 479 480 switch (sess->xfrm_type) { 481 case RTE_CRYPTO_ASYM_XFORM_MODEX: 482 ret = cpt_modex_prep(¶ms, &sess->mod_ctx); 483 if (unlikely(ret)) 484 goto req_fail; 485 break; 486 case RTE_CRYPTO_ASYM_XFORM_RSA: 487 ret = cpt_enqueue_rsa_op(op, ¶ms, sess); 488 if (unlikely(ret)) 489 goto req_fail; 490 break; 491 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 492 ret = cpt_enqueue_ecdsa_op(op, ¶ms, sess, otx_fpm_iova); 493 if (unlikely(ret)) 494 goto req_fail; 495 break; 496 case RTE_CRYPTO_ASYM_XFORM_ECPM: 497 ret = cpt_ecpm_prep(&asym_op->ecpm, ¶ms, 498 sess->ec_ctx.curveid); 499 if (unlikely(ret)) 500 goto req_fail; 501 break; 502 503 default: 504 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 505 ret = -EINVAL; 506 goto req_fail; 507 } 508 509 ret = otx_cpt_request_enqueue(instance, pqueue, params.req, 510 sess->cpt_inst_w7); 511 512 if (unlikely(ret)) { 513 CPT_LOG_DP_ERR("Could not enqueue crypto req"); 514 goto req_fail; 515 } 516 517 return 0; 518 519 req_fail: 520 free_op_meta(mdata, minfo->pool); 521 522 return ret; 523 } 524 525 static __rte_always_inline int __rte_hot 526 otx_cpt_enq_single_sym(struct cpt_instance *instance, 527 struct rte_crypto_op *op, 528 struct pending_queue *pqueue) 529 { 530 struct cpt_sess_misc *sess; 531 struct rte_crypto_sym_op *sym_op = op->sym; 532 struct cpt_request_info *prep_req; 533 void *mdata = NULL; 534 int ret = 0; 535 uint64_t cpt_op; 536 537 sess = (struct cpt_sess_misc *) 538 get_sym_session_private_data(sym_op->session, 539 otx_cryptodev_driver_id); 540 541 cpt_op = sess->cpt_op; 542 543 if (likely(cpt_op & CPT_OP_CIPHER_MASK)) 544 ret = fill_fc_params(op, sess, &instance->meta_info, &mdata, 545 (void **)&prep_req); 546 else 547 ret = fill_digest_params(op, sess, &instance->meta_info, 548 &mdata, (void **)&prep_req); 549 550 if (unlikely(ret)) { 551 CPT_LOG_DP_ERR("prep cryto req : op %p, cpt_op 0x%x " 552 "ret 0x%x", op, (unsigned int)cpt_op, ret); 553 return ret; 554 } 555 556 /* Enqueue prepared instruction to h/w */ 557 ret = otx_cpt_request_enqueue(instance, pqueue, prep_req, 558 sess->cpt_inst_w7); 559 560 if (unlikely(ret)) { 561 /* Buffer allocated for request preparation need to be freed */ 562 free_op_meta(mdata, instance->meta_info.pool); 563 return ret; 564 } 565 566 return 0; 567 } 568 569 static __rte_always_inline int __rte_hot 570 otx_cpt_enq_single_sym_sessless(struct cpt_instance *instance, 571 struct rte_crypto_op *op, 572 struct pending_queue *pend_q) 573 { 574 const int driver_id = otx_cryptodev_driver_id; 575 struct rte_crypto_sym_op *sym_op = op->sym; 576 struct rte_cryptodev_sym_session *sess; 577 int ret; 578 579 /* Create temporary session */ 580 581 if (rte_mempool_get(instance->sess_mp, (void **)&sess)) 582 return -ENOMEM; 583 584 ret = sym_session_configure(driver_id, sym_op->xform, sess, 585 instance->sess_mp_priv); 586 if (ret) 587 goto sess_put; 588 589 sym_op->session = sess; 590 591 ret = otx_cpt_enq_single_sym(instance, op, pend_q); 592 593 if (unlikely(ret)) 594 goto priv_put; 595 596 return 0; 597 598 priv_put: 599 sym_session_clear(driver_id, sess); 600 sess_put: 601 rte_mempool_put(instance->sess_mp, sess); 602 return ret; 603 } 604 605 #define OP_TYPE_SYM 0 606 #define OP_TYPE_ASYM 1 607 608 static __rte_always_inline int __rte_hot 609 otx_cpt_enq_single(struct cpt_instance *inst, 610 struct rte_crypto_op *op, 611 struct pending_queue *pqueue, 612 const uint8_t op_type) 613 { 614 /* Check for the type */ 615 616 if (op_type == OP_TYPE_SYM) { 617 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 618 return otx_cpt_enq_single_sym(inst, op, pqueue); 619 else 620 return otx_cpt_enq_single_sym_sessless(inst, op, 621 pqueue); 622 } 623 624 if (op_type == OP_TYPE_ASYM) { 625 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) 626 return otx_cpt_enq_single_asym(inst, op, pqueue); 627 } 628 629 /* Should not reach here */ 630 return -ENOTSUP; 631 } 632 633 static __rte_always_inline uint16_t __rte_hot 634 otx_cpt_pkt_enqueue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 635 const uint8_t op_type) 636 { 637 struct cpt_instance *instance = (struct cpt_instance *)qptr; 638 uint16_t count; 639 int ret; 640 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 641 struct pending_queue *pqueue = &cptvf->pqueue; 642 643 count = DEFAULT_CMD_QLEN - pqueue->pending_count; 644 if (nb_ops > count) 645 nb_ops = count; 646 647 count = 0; 648 while (likely(count < nb_ops)) { 649 650 /* Enqueue single op */ 651 ret = otx_cpt_enq_single(instance, ops[count], pqueue, op_type); 652 653 if (unlikely(ret)) 654 break; 655 count++; 656 } 657 otx_cpt_ring_dbell(instance, count); 658 return count; 659 } 660 661 static uint16_t 662 otx_cpt_enqueue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 663 { 664 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_ASYM); 665 } 666 667 static uint16_t 668 otx_cpt_enqueue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 669 { 670 return otx_cpt_pkt_enqueue(qptr, ops, nb_ops, OP_TYPE_SYM); 671 } 672 673 static inline void 674 otx_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req, 675 struct rte_crypto_rsa_xform *rsa_ctx) 676 677 { 678 struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa; 679 680 switch (rsa->op_type) { 681 case RTE_CRYPTO_ASYM_OP_ENCRYPT: 682 rsa->cipher.length = rsa_ctx->n.length; 683 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length); 684 break; 685 case RTE_CRYPTO_ASYM_OP_DECRYPT: 686 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 687 rsa->message.length = rsa_ctx->n.length; 688 else { 689 /* Get length of decrypted output */ 690 rsa->message.length = rte_cpu_to_be_16 691 (*((uint16_t *)req->rptr)); 692 693 /* Offset data pointer by length fields */ 694 req->rptr += 2; 695 } 696 memcpy(rsa->message.data, req->rptr, rsa->message.length); 697 break; 698 case RTE_CRYPTO_ASYM_OP_SIGN: 699 rsa->sign.length = rsa_ctx->n.length; 700 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 701 break; 702 case RTE_CRYPTO_ASYM_OP_VERIFY: 703 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) 704 rsa->sign.length = rsa_ctx->n.length; 705 else { 706 /* Get length of decrypted output */ 707 rsa->sign.length = rte_cpu_to_be_16 708 (*((uint16_t *)req->rptr)); 709 710 /* Offset data pointer by length fields */ 711 req->rptr += 2; 712 } 713 memcpy(rsa->sign.data, req->rptr, rsa->sign.length); 714 715 if (memcmp(rsa->sign.data, rsa->message.data, 716 rsa->message.length)) { 717 CPT_LOG_DP_ERR("RSA verification failed"); 718 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 719 } 720 break; 721 default: 722 CPT_LOG_DP_DEBUG("Invalid RSA operation type"); 723 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 724 break; 725 } 726 } 727 728 static __rte_always_inline void 729 otx_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa, 730 struct cpt_request_info *req, 731 struct cpt_asym_ec_ctx *ec) 732 733 { 734 int prime_len = ec_grp[ec->curveid].prime.length; 735 736 if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY) 737 return; 738 739 /* Separate out sign r and s components */ 740 memcpy(ecdsa->r.data, req->rptr, prime_len); 741 memcpy(ecdsa->s.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8), 742 prime_len); 743 ecdsa->r.length = prime_len; 744 ecdsa->s.length = prime_len; 745 } 746 747 static __rte_always_inline void 748 otx_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm, 749 struct cpt_request_info *req, 750 struct cpt_asym_ec_ctx *ec) 751 { 752 int prime_len = ec_grp[ec->curveid].prime.length; 753 754 memcpy(ecpm->r.x.data, req->rptr, prime_len); 755 memcpy(ecpm->r.y.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8), 756 prime_len); 757 ecpm->r.x.length = prime_len; 758 ecpm->r.y.length = prime_len; 759 } 760 761 static __rte_always_inline void __rte_hot 762 otx_cpt_asym_post_process(struct rte_crypto_op *cop, 763 struct cpt_request_info *req) 764 { 765 struct rte_crypto_asym_op *op = cop->asym; 766 struct cpt_asym_sess_misc *sess; 767 768 sess = get_asym_session_private_data(op->session, 769 otx_cryptodev_driver_id); 770 771 switch (sess->xfrm_type) { 772 case RTE_CRYPTO_ASYM_XFORM_RSA: 773 otx_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx); 774 break; 775 case RTE_CRYPTO_ASYM_XFORM_MODEX: 776 op->modex.result.length = sess->mod_ctx.modulus.length; 777 memcpy(op->modex.result.data, req->rptr, 778 op->modex.result.length); 779 break; 780 case RTE_CRYPTO_ASYM_XFORM_ECDSA: 781 otx_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx); 782 break; 783 case RTE_CRYPTO_ASYM_XFORM_ECPM: 784 otx_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx); 785 break; 786 default: 787 CPT_LOG_DP_DEBUG("Invalid crypto xform type"); 788 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; 789 break; 790 } 791 } 792 793 static __rte_always_inline void __rte_hot 794 otx_cpt_dequeue_post_process(struct rte_crypto_op *cop, uintptr_t *rsp, 795 const uint8_t op_type) 796 { 797 /* H/w has returned success */ 798 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS; 799 800 /* Perform further post processing */ 801 802 if ((op_type == OP_TYPE_SYM) && 803 (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC)) { 804 /* Check if auth verify need to be completed */ 805 if (unlikely(rsp[2])) 806 compl_auth_verify(cop, (uint8_t *)rsp[2], rsp[3]); 807 return; 808 } 809 810 if ((op_type == OP_TYPE_ASYM) && 811 (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC)) { 812 rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t)); 813 otx_cpt_asym_post_process(cop, (struct cpt_request_info *)rsp); 814 } 815 816 return; 817 } 818 819 static __rte_always_inline uint16_t __rte_hot 820 otx_cpt_pkt_dequeue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops, 821 const uint8_t op_type) 822 { 823 struct cpt_instance *instance = (struct cpt_instance *)qptr; 824 struct cpt_request_info *user_req; 825 struct cpt_vf *cptvf = (struct cpt_vf *)instance; 826 uint8_t cc[nb_ops]; 827 int i, count, pcount; 828 uint8_t ret; 829 int nb_completed; 830 struct pending_queue *pqueue = &cptvf->pqueue; 831 struct rte_crypto_op *cop; 832 void *metabuf; 833 uintptr_t *rsp; 834 835 pcount = pqueue->pending_count; 836 count = (nb_ops > pcount) ? pcount : nb_ops; 837 838 for (i = 0; i < count; i++) { 839 user_req = (struct cpt_request_info *) 840 pqueue->req_queue[pqueue->deq_head]; 841 842 if (likely((i+1) < count)) { 843 rte_prefetch_non_temporal( 844 (void *)pqueue->req_queue[i+1]); 845 } 846 847 ret = check_nb_command_id(user_req, instance); 848 849 if (unlikely(ret == ERR_REQ_PENDING)) { 850 /* Stop checking for completions */ 851 break; 852 } 853 854 /* Return completion code and op handle */ 855 cc[i] = ret; 856 ops[i] = user_req->op; 857 858 CPT_LOG_DP_DEBUG("Request %p Op %p completed with code %d", 859 user_req, user_req->op, ret); 860 861 MOD_INC(pqueue->deq_head, DEFAULT_CMD_QLEN); 862 pqueue->pending_count -= 1; 863 } 864 865 nb_completed = i; 866 867 for (i = 0; i < nb_completed; i++) { 868 869 rsp = (void *)ops[i]; 870 871 if (likely((i + 1) < nb_completed)) 872 rte_prefetch0(ops[i+1]); 873 874 metabuf = (void *)rsp[0]; 875 cop = (void *)rsp[1]; 876 877 ops[i] = cop; 878 879 /* Check completion code */ 880 881 if (likely(cc[i] == 0)) { 882 /* H/w success pkt. Post process */ 883 otx_cpt_dequeue_post_process(cop, rsp, op_type); 884 } else if (cc[i] == ERR_GC_ICV_MISCOMPARE) { 885 /* auth data mismatch */ 886 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED; 887 } else { 888 /* Error */ 889 cop->status = RTE_CRYPTO_OP_STATUS_ERROR; 890 } 891 892 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) { 893 void *sess_private_data_t = 894 get_sym_session_private_data(cop->sym->session, 895 otx_cryptodev_driver_id); 896 memset(sess_private_data_t, 0, 897 cpt_get_session_size()); 898 memset(cop->sym->session, 0, 899 rte_cryptodev_sym_get_existing_header_session_size( 900 cop->sym->session)); 901 rte_mempool_put(instance->sess_mp_priv, 902 sess_private_data_t); 903 rte_mempool_put(instance->sess_mp, cop->sym->session); 904 cop->sym->session = NULL; 905 } 906 free_op_meta(metabuf, instance->meta_info.pool); 907 } 908 909 return nb_completed; 910 } 911 912 static uint16_t 913 otx_cpt_dequeue_asym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 914 { 915 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_ASYM); 916 } 917 918 static uint16_t 919 otx_cpt_dequeue_sym(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops) 920 { 921 return otx_cpt_pkt_dequeue(qptr, ops, nb_ops, OP_TYPE_SYM); 922 } 923 924 static struct rte_cryptodev_ops cptvf_ops = { 925 /* Device related operations */ 926 .dev_configure = otx_cpt_dev_config, 927 .dev_start = otx_cpt_dev_start, 928 .dev_stop = otx_cpt_dev_stop, 929 .dev_close = otx_cpt_dev_close, 930 .dev_infos_get = otx_cpt_dev_info_get, 931 932 .stats_get = NULL, 933 .stats_reset = NULL, 934 .queue_pair_setup = otx_cpt_que_pair_setup, 935 .queue_pair_release = otx_cpt_que_pair_release, 936 937 /* Crypto related operations */ 938 .sym_session_get_size = otx_cpt_get_session_size, 939 .sym_session_configure = otx_cpt_session_cfg, 940 .sym_session_clear = otx_cpt_session_clear, 941 942 .asym_session_get_size = otx_cpt_asym_session_size_get, 943 .asym_session_configure = otx_cpt_asym_session_cfg, 944 .asym_session_clear = otx_cpt_asym_session_clear, 945 }; 946 947 int 948 otx_cpt_dev_create(struct rte_cryptodev *c_dev) 949 { 950 struct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device); 951 struct cpt_vf *cptvf = NULL; 952 void *reg_base; 953 char dev_name[32]; 954 int ret; 955 956 if (pdev->mem_resource[0].phys_addr == 0ULL) 957 return -EIO; 958 959 /* for secondary processes, we don't initialise any further as primary 960 * has already done this work. 961 */ 962 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 963 return 0; 964 965 cptvf = rte_zmalloc_socket("otx_cryptodev_private_mem", 966 sizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE, 967 rte_socket_id()); 968 969 if (cptvf == NULL) { 970 CPT_LOG_ERR("Cannot allocate memory for device private data"); 971 return -ENOMEM; 972 } 973 974 snprintf(dev_name, 32, "%02x:%02x.%x", 975 pdev->addr.bus, pdev->addr.devid, pdev->addr.function); 976 977 reg_base = pdev->mem_resource[0].addr; 978 if (!reg_base) { 979 CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name); 980 ret = -ENODEV; 981 goto fail; 982 } 983 984 ret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name); 985 if (ret) { 986 CPT_LOG_ERR("Failed to init cptvf %s", dev_name); 987 ret = -EIO; 988 goto fail; 989 } 990 991 switch (cptvf->vftype) { 992 case OTX_CPT_VF_TYPE_AE: 993 /* Set asymmetric cpt feature flags */ 994 c_dev->feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | 995 RTE_CRYPTODEV_FF_HW_ACCELERATED | 996 RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT; 997 break; 998 case OTX_CPT_VF_TYPE_SE: 999 /* Set symmetric cpt feature flags */ 1000 c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | 1001 RTE_CRYPTODEV_FF_HW_ACCELERATED | 1002 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | 1003 RTE_CRYPTODEV_FF_IN_PLACE_SGL | 1004 RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | 1005 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | 1006 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | 1007 RTE_CRYPTODEV_FF_SYM_SESSIONLESS; 1008 break; 1009 default: 1010 /* Feature not supported. Abort */ 1011 CPT_LOG_ERR("VF type not supported by %s", dev_name); 1012 ret = -EIO; 1013 goto deinit_dev; 1014 } 1015 1016 /* Start off timer for mailbox interrupts */ 1017 otx_cpt_periodic_alarm_start(cptvf); 1018 1019 c_dev->dev_ops = &cptvf_ops; 1020 1021 if (c_dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) { 1022 c_dev->enqueue_burst = otx_cpt_enqueue_sym; 1023 c_dev->dequeue_burst = otx_cpt_dequeue_sym; 1024 } else { 1025 c_dev->enqueue_burst = otx_cpt_enqueue_asym; 1026 c_dev->dequeue_burst = otx_cpt_dequeue_asym; 1027 } 1028 1029 /* Save dev private data */ 1030 c_dev->data->dev_private = cptvf; 1031 1032 return 0; 1033 1034 deinit_dev: 1035 otx_cpt_deinit_device(cptvf); 1036 1037 fail: 1038 if (cptvf) { 1039 /* Free private data allocated */ 1040 rte_free(cptvf); 1041 } 1042 1043 return ret; 1044 } 1045