1bfe2ae49SAnoob Joseph /* SPDX-License-Identifier: BSD-3-Clause 2bfe2ae49SAnoob Joseph * Copyright(c) 2018 Cavium, Inc 3bfe2ae49SAnoob Joseph */ 4bfe2ae49SAnoob Joseph 50dc1cffaSAnkur Dwivedi #include <rte_alarm.h> 60dc1cffaSAnkur Dwivedi #include <rte_bus_pci.h> 7bfe2ae49SAnoob Joseph #include <rte_cryptodev.h> 80906b99fSMurthy NSSR #include <rte_cryptodev_pmd.h> 90dc1cffaSAnkur Dwivedi #include <rte_malloc.h> 100dc1cffaSAnkur Dwivedi 110dc1cffaSAnkur Dwivedi #include "cpt_pmd_logs.h" 12273487f7SAnoob Joseph #include "cpt_pmd_ops_helper.h" 13bfe2ae49SAnoob Joseph 14bfe2ae49SAnoob Joseph #include "otx_cryptodev.h" 150906b99fSMurthy NSSR #include "otx_cryptodev_capabilities.h" 160dc1cffaSAnkur Dwivedi #include "otx_cryptodev_hw_access.h" 17bfe2ae49SAnoob Joseph #include "otx_cryptodev_ops.h" 18bfe2ae49SAnoob Joseph 19273487f7SAnoob Joseph static int otx_cryptodev_probe_count; 20273487f7SAnoob Joseph static rte_spinlock_t otx_probe_count_lock = RTE_SPINLOCK_INITIALIZER; 21273487f7SAnoob Joseph 22273487f7SAnoob Joseph static struct rte_mempool *otx_cpt_meta_pool; 23273487f7SAnoob Joseph static int otx_cpt_op_mlen; 24273487f7SAnoob Joseph static int otx_cpt_op_sb_mlen; 25273487f7SAnoob Joseph 26*0961348fSMurthy NSSR /* Forward declarations */ 27*0961348fSMurthy NSSR 28*0961348fSMurthy NSSR static int 29*0961348fSMurthy NSSR otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id); 30*0961348fSMurthy NSSR 31273487f7SAnoob Joseph /* 32273487f7SAnoob Joseph * Initializes global variables used by fast-path code 33273487f7SAnoob Joseph * 34273487f7SAnoob Joseph * @return 35273487f7SAnoob Joseph * - 0 on success, errcode on error 36273487f7SAnoob Joseph */ 37273487f7SAnoob Joseph static int 38273487f7SAnoob Joseph init_global_resources(void) 39273487f7SAnoob Joseph { 40273487f7SAnoob Joseph /* Get meta len for scatter gather mode */ 41273487f7SAnoob Joseph otx_cpt_op_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode(); 42273487f7SAnoob Joseph 43273487f7SAnoob Joseph /* Extra 4B saved for future considerations */ 44273487f7SAnoob Joseph otx_cpt_op_mlen += 4 * sizeof(uint64_t); 45273487f7SAnoob Joseph 46273487f7SAnoob Joseph otx_cpt_meta_pool = rte_mempool_create("cpt_metabuf-pool", 4096 * 16, 47273487f7SAnoob Joseph otx_cpt_op_mlen, 512, 0, 48273487f7SAnoob Joseph NULL, NULL, NULL, NULL, 49273487f7SAnoob Joseph SOCKET_ID_ANY, 0); 50273487f7SAnoob Joseph if (!otx_cpt_meta_pool) { 51273487f7SAnoob Joseph CPT_LOG_ERR("cpt metabuf pool not created"); 52273487f7SAnoob Joseph return -ENOMEM; 53273487f7SAnoob Joseph } 54273487f7SAnoob Joseph 55273487f7SAnoob Joseph /* Get meta len for direct mode */ 56273487f7SAnoob Joseph otx_cpt_op_sb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode(); 57273487f7SAnoob Joseph 58273487f7SAnoob Joseph /* Extra 4B saved for future considerations */ 59273487f7SAnoob Joseph otx_cpt_op_sb_mlen += 4 * sizeof(uint64_t); 60273487f7SAnoob Joseph 61273487f7SAnoob Joseph return 0; 62273487f7SAnoob Joseph } 63273487f7SAnoob Joseph 64273487f7SAnoob Joseph void 65273487f7SAnoob Joseph cleanup_global_resources(void) 66273487f7SAnoob Joseph { 67273487f7SAnoob Joseph /* Take lock */ 68273487f7SAnoob Joseph rte_spinlock_lock(&otx_probe_count_lock); 69273487f7SAnoob Joseph 70273487f7SAnoob Joseph /* Decrement the cryptodev count */ 71273487f7SAnoob Joseph otx_cryptodev_probe_count--; 72273487f7SAnoob Joseph 73273487f7SAnoob Joseph /* Free buffers */ 74273487f7SAnoob Joseph if (otx_cpt_meta_pool && otx_cryptodev_probe_count == 0) 75273487f7SAnoob Joseph rte_mempool_free(otx_cpt_meta_pool); 76273487f7SAnoob Joseph 77273487f7SAnoob Joseph /* Free lock */ 78273487f7SAnoob Joseph rte_spinlock_unlock(&otx_probe_count_lock); 79273487f7SAnoob Joseph } 80273487f7SAnoob Joseph 810dc1cffaSAnkur Dwivedi /* Alarm routines */ 820dc1cffaSAnkur Dwivedi 830dc1cffaSAnkur Dwivedi static void 840dc1cffaSAnkur Dwivedi otx_cpt_alarm_cb(void *arg) 850dc1cffaSAnkur Dwivedi { 860dc1cffaSAnkur Dwivedi struct cpt_vf *cptvf = arg; 870dc1cffaSAnkur Dwivedi otx_cpt_poll_misc(cptvf); 880dc1cffaSAnkur Dwivedi rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 890dc1cffaSAnkur Dwivedi otx_cpt_alarm_cb, cptvf); 900dc1cffaSAnkur Dwivedi } 910dc1cffaSAnkur Dwivedi 920dc1cffaSAnkur Dwivedi static int 930dc1cffaSAnkur Dwivedi otx_cpt_periodic_alarm_start(void *arg) 940dc1cffaSAnkur Dwivedi { 950dc1cffaSAnkur Dwivedi return rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000, 960dc1cffaSAnkur Dwivedi otx_cpt_alarm_cb, arg); 970dc1cffaSAnkur Dwivedi } 980dc1cffaSAnkur Dwivedi 99273487f7SAnoob Joseph static int 100273487f7SAnoob Joseph otx_cpt_periodic_alarm_stop(void *arg) 101273487f7SAnoob Joseph { 102273487f7SAnoob Joseph return rte_eal_alarm_cancel(otx_cpt_alarm_cb, arg); 103273487f7SAnoob Joseph } 104273487f7SAnoob Joseph 1050906b99fSMurthy NSSR /* PMD ops */ 1060906b99fSMurthy NSSR 1070906b99fSMurthy NSSR static int 1080906b99fSMurthy NSSR otx_cpt_dev_config(struct rte_cryptodev *dev __rte_unused, 1090906b99fSMurthy NSSR struct rte_cryptodev_config *config __rte_unused) 1100906b99fSMurthy NSSR { 1110906b99fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 1120906b99fSMurthy NSSR return 0; 1130906b99fSMurthy NSSR } 1140906b99fSMurthy NSSR 1150906b99fSMurthy NSSR static int 1160906b99fSMurthy NSSR otx_cpt_dev_start(struct rte_cryptodev *c_dev) 1170906b99fSMurthy NSSR { 1180906b99fSMurthy NSSR void *cptvf = c_dev->data->dev_private; 1190906b99fSMurthy NSSR 1200906b99fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 1210906b99fSMurthy NSSR 1220906b99fSMurthy NSSR return otx_cpt_start_device(cptvf); 1230906b99fSMurthy NSSR } 1240906b99fSMurthy NSSR 1250906b99fSMurthy NSSR static void 1260906b99fSMurthy NSSR otx_cpt_dev_stop(struct rte_cryptodev *c_dev) 1270906b99fSMurthy NSSR { 1280906b99fSMurthy NSSR void *cptvf = c_dev->data->dev_private; 1290906b99fSMurthy NSSR 1300906b99fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 1310906b99fSMurthy NSSR 1320906b99fSMurthy NSSR otx_cpt_stop_device(cptvf); 1330906b99fSMurthy NSSR } 1340906b99fSMurthy NSSR 1350906b99fSMurthy NSSR static int 1360906b99fSMurthy NSSR otx_cpt_dev_close(struct rte_cryptodev *c_dev) 1370906b99fSMurthy NSSR { 1380906b99fSMurthy NSSR void *cptvf = c_dev->data->dev_private; 139*0961348fSMurthy NSSR int i, ret; 1400906b99fSMurthy NSSR 1410906b99fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 1420906b99fSMurthy NSSR 143*0961348fSMurthy NSSR for (i = 0; i < c_dev->data->nb_queue_pairs; i++) { 144*0961348fSMurthy NSSR ret = otx_cpt_que_pair_release(c_dev, i); 145*0961348fSMurthy NSSR if (ret) 146*0961348fSMurthy NSSR return ret; 147*0961348fSMurthy NSSR } 148*0961348fSMurthy NSSR 1490906b99fSMurthy NSSR otx_cpt_periodic_alarm_stop(cptvf); 1500906b99fSMurthy NSSR otx_cpt_deinit_device(cptvf); 1510906b99fSMurthy NSSR 1520906b99fSMurthy NSSR return 0; 1530906b99fSMurthy NSSR } 1540906b99fSMurthy NSSR 1550906b99fSMurthy NSSR static void 1560906b99fSMurthy NSSR otx_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info) 1570906b99fSMurthy NSSR { 1580906b99fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 1590906b99fSMurthy NSSR if (info != NULL) { 1600906b99fSMurthy NSSR info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF; 1610906b99fSMurthy NSSR info->feature_flags = dev->feature_flags; 1620906b99fSMurthy NSSR info->capabilities = otx_get_capabilities(); 1630906b99fSMurthy NSSR info->sym.max_nb_sessions = 0; 1640906b99fSMurthy NSSR info->driver_id = otx_cryptodev_driver_id; 1650906b99fSMurthy NSSR info->min_mbuf_headroom_req = OTX_CPT_MIN_HEADROOM_REQ; 1660906b99fSMurthy NSSR info->min_mbuf_tailroom_req = OTX_CPT_MIN_TAILROOM_REQ; 1670906b99fSMurthy NSSR } 1680906b99fSMurthy NSSR } 1690906b99fSMurthy NSSR 1700906b99fSMurthy NSSR static void 1710906b99fSMurthy NSSR otx_cpt_stats_get(struct rte_cryptodev *dev __rte_unused, 1720906b99fSMurthy NSSR struct rte_cryptodev_stats *stats __rte_unused) 1730906b99fSMurthy NSSR { 1740906b99fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 1750906b99fSMurthy NSSR } 1760906b99fSMurthy NSSR 1770906b99fSMurthy NSSR static void 1780906b99fSMurthy NSSR otx_cpt_stats_reset(struct rte_cryptodev *dev __rte_unused) 1790906b99fSMurthy NSSR { 1800906b99fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 1810906b99fSMurthy NSSR } 1820906b99fSMurthy NSSR 183*0961348fSMurthy NSSR static int 184*0961348fSMurthy NSSR otx_cpt_que_pair_setup(struct rte_cryptodev *dev, 185*0961348fSMurthy NSSR uint16_t que_pair_id, 186*0961348fSMurthy NSSR const struct rte_cryptodev_qp_conf *qp_conf, 187*0961348fSMurthy NSSR int socket_id __rte_unused, 188*0961348fSMurthy NSSR struct rte_mempool *session_pool __rte_unused) 189*0961348fSMurthy NSSR { 190*0961348fSMurthy NSSR void *cptvf = dev->data->dev_private; 191*0961348fSMurthy NSSR struct cpt_instance *instance = NULL; 192*0961348fSMurthy NSSR struct rte_pci_device *pci_dev; 193*0961348fSMurthy NSSR int ret = -1; 194*0961348fSMurthy NSSR 195*0961348fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 196*0961348fSMurthy NSSR 197*0961348fSMurthy NSSR if (dev->data->queue_pairs[que_pair_id] != NULL) { 198*0961348fSMurthy NSSR ret = otx_cpt_que_pair_release(dev, que_pair_id); 199*0961348fSMurthy NSSR if (ret) 200*0961348fSMurthy NSSR return ret; 201*0961348fSMurthy NSSR } 202*0961348fSMurthy NSSR 203*0961348fSMurthy NSSR if (qp_conf->nb_descriptors > DEFAULT_CMD_QLEN) { 204*0961348fSMurthy NSSR CPT_LOG_INFO("Number of descriptors too big %d, using default " 205*0961348fSMurthy NSSR "queue length of %d", qp_conf->nb_descriptors, 206*0961348fSMurthy NSSR DEFAULT_CMD_QLEN); 207*0961348fSMurthy NSSR } 208*0961348fSMurthy NSSR 209*0961348fSMurthy NSSR pci_dev = RTE_DEV_TO_PCI(dev->device); 210*0961348fSMurthy NSSR 211*0961348fSMurthy NSSR if (pci_dev->mem_resource[0].addr == NULL) { 212*0961348fSMurthy NSSR CPT_LOG_ERR("PCI mem address null"); 213*0961348fSMurthy NSSR return -EIO; 214*0961348fSMurthy NSSR } 215*0961348fSMurthy NSSR 216*0961348fSMurthy NSSR ret = otx_cpt_get_resource(cptvf, 0, &instance); 217*0961348fSMurthy NSSR if (ret != 0) { 218*0961348fSMurthy NSSR CPT_LOG_ERR("Error getting instance handle from device %s : " 219*0961348fSMurthy NSSR "ret = %d", dev->data->name, ret); 220*0961348fSMurthy NSSR return ret; 221*0961348fSMurthy NSSR } 222*0961348fSMurthy NSSR 223*0961348fSMurthy NSSR instance->queue_id = que_pair_id; 224*0961348fSMurthy NSSR dev->data->queue_pairs[que_pair_id] = instance; 225*0961348fSMurthy NSSR 226*0961348fSMurthy NSSR return 0; 227*0961348fSMurthy NSSR } 228*0961348fSMurthy NSSR 229*0961348fSMurthy NSSR static int 230*0961348fSMurthy NSSR otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id) 231*0961348fSMurthy NSSR { 232*0961348fSMurthy NSSR struct cpt_instance *instance = dev->data->queue_pairs[que_pair_id]; 233*0961348fSMurthy NSSR int ret; 234*0961348fSMurthy NSSR 235*0961348fSMurthy NSSR CPT_PMD_INIT_FUNC_TRACE(); 236*0961348fSMurthy NSSR 237*0961348fSMurthy NSSR ret = otx_cpt_put_resource(instance); 238*0961348fSMurthy NSSR if (ret != 0) { 239*0961348fSMurthy NSSR CPT_LOG_ERR("Error putting instance handle of device %s : " 240*0961348fSMurthy NSSR "ret = %d", dev->data->name, ret); 241*0961348fSMurthy NSSR return ret; 242*0961348fSMurthy NSSR } 243*0961348fSMurthy NSSR 244*0961348fSMurthy NSSR dev->data->queue_pairs[que_pair_id] = NULL; 245*0961348fSMurthy NSSR 246*0961348fSMurthy NSSR return 0; 247*0961348fSMurthy NSSR } 248*0961348fSMurthy NSSR 2490906b99fSMurthy NSSR static struct rte_cryptodev_ops cptvf_ops = { 2500906b99fSMurthy NSSR /* Device related operations */ 2510906b99fSMurthy NSSR .dev_configure = otx_cpt_dev_config, 2520906b99fSMurthy NSSR .dev_start = otx_cpt_dev_start, 2530906b99fSMurthy NSSR .dev_stop = otx_cpt_dev_stop, 2540906b99fSMurthy NSSR .dev_close = otx_cpt_dev_close, 2550906b99fSMurthy NSSR .dev_infos_get = otx_cpt_dev_info_get, 2560906b99fSMurthy NSSR 2570906b99fSMurthy NSSR .stats_get = otx_cpt_stats_get, 2580906b99fSMurthy NSSR .stats_reset = otx_cpt_stats_reset, 259*0961348fSMurthy NSSR .queue_pair_setup = otx_cpt_que_pair_setup, 260*0961348fSMurthy NSSR .queue_pair_release = otx_cpt_que_pair_release, 2610906b99fSMurthy NSSR .queue_pair_count = NULL, 2620906b99fSMurthy NSSR 2630906b99fSMurthy NSSR /* Crypto related operations */ 2640906b99fSMurthy NSSR .sym_session_get_size = NULL, 2650906b99fSMurthy NSSR .sym_session_configure = NULL, 2660906b99fSMurthy NSSR .sym_session_clear = NULL 2670906b99fSMurthy NSSR }; 2680906b99fSMurthy NSSR 269273487f7SAnoob Joseph static void 270273487f7SAnoob Joseph otx_cpt_common_vars_init(struct cpt_vf *cptvf) 271273487f7SAnoob Joseph { 272273487f7SAnoob Joseph cptvf->meta_info.cptvf_meta_pool = otx_cpt_meta_pool; 273273487f7SAnoob Joseph cptvf->meta_info.cptvf_op_mlen = otx_cpt_op_mlen; 274273487f7SAnoob Joseph cptvf->meta_info.cptvf_op_sb_mlen = otx_cpt_op_sb_mlen; 275273487f7SAnoob Joseph } 276273487f7SAnoob Joseph 277bfe2ae49SAnoob Joseph int 278bfe2ae49SAnoob Joseph otx_cpt_dev_create(struct rte_cryptodev *c_dev) 279bfe2ae49SAnoob Joseph { 2800dc1cffaSAnkur Dwivedi struct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device); 2810dc1cffaSAnkur Dwivedi struct cpt_vf *cptvf = NULL; 2820dc1cffaSAnkur Dwivedi void *reg_base; 2830dc1cffaSAnkur Dwivedi char dev_name[32]; 2840dc1cffaSAnkur Dwivedi int ret; 2850dc1cffaSAnkur Dwivedi 2860dc1cffaSAnkur Dwivedi if (pdev->mem_resource[0].phys_addr == 0ULL) 2870dc1cffaSAnkur Dwivedi return -EIO; 2880dc1cffaSAnkur Dwivedi 2890dc1cffaSAnkur Dwivedi /* for secondary processes, we don't initialise any further as primary 2900dc1cffaSAnkur Dwivedi * has already done this work. 2910dc1cffaSAnkur Dwivedi */ 2920dc1cffaSAnkur Dwivedi if (rte_eal_process_type() != RTE_PROC_PRIMARY) 293bfe2ae49SAnoob Joseph return 0; 2940dc1cffaSAnkur Dwivedi 2950dc1cffaSAnkur Dwivedi cptvf = rte_zmalloc_socket("otx_cryptodev_private_mem", 2960dc1cffaSAnkur Dwivedi sizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE, 2970dc1cffaSAnkur Dwivedi rte_socket_id()); 2980dc1cffaSAnkur Dwivedi 2990dc1cffaSAnkur Dwivedi if (cptvf == NULL) { 3000dc1cffaSAnkur Dwivedi CPT_LOG_ERR("Cannot allocate memory for device private data"); 3010dc1cffaSAnkur Dwivedi return -ENOMEM; 3020dc1cffaSAnkur Dwivedi } 3030dc1cffaSAnkur Dwivedi 3040dc1cffaSAnkur Dwivedi snprintf(dev_name, 32, "%02x:%02x.%x", 3050dc1cffaSAnkur Dwivedi pdev->addr.bus, pdev->addr.devid, pdev->addr.function); 3060dc1cffaSAnkur Dwivedi 3070dc1cffaSAnkur Dwivedi reg_base = pdev->mem_resource[0].addr; 3080dc1cffaSAnkur Dwivedi if (!reg_base) { 3090dc1cffaSAnkur Dwivedi CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name); 3100dc1cffaSAnkur Dwivedi ret = -ENODEV; 3110dc1cffaSAnkur Dwivedi goto fail; 3120dc1cffaSAnkur Dwivedi } 3130dc1cffaSAnkur Dwivedi 3140dc1cffaSAnkur Dwivedi ret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name); 3150dc1cffaSAnkur Dwivedi if (ret) { 3160dc1cffaSAnkur Dwivedi CPT_LOG_ERR("Failed to init cptvf %s", dev_name); 3170dc1cffaSAnkur Dwivedi ret = -EIO; 3180dc1cffaSAnkur Dwivedi goto fail; 3190dc1cffaSAnkur Dwivedi } 3200dc1cffaSAnkur Dwivedi 3210dc1cffaSAnkur Dwivedi /* Start off timer for mailbox interrupts */ 3220dc1cffaSAnkur Dwivedi otx_cpt_periodic_alarm_start(cptvf); 3230dc1cffaSAnkur Dwivedi 324273487f7SAnoob Joseph rte_spinlock_lock(&otx_probe_count_lock); 325273487f7SAnoob Joseph if (!otx_cryptodev_probe_count) { 326273487f7SAnoob Joseph ret = init_global_resources(); 327273487f7SAnoob Joseph if (ret) { 328273487f7SAnoob Joseph rte_spinlock_unlock(&otx_probe_count_lock); 329273487f7SAnoob Joseph goto init_fail; 330273487f7SAnoob Joseph } 331273487f7SAnoob Joseph } 332273487f7SAnoob Joseph otx_cryptodev_probe_count++; 333273487f7SAnoob Joseph rte_spinlock_unlock(&otx_probe_count_lock); 334273487f7SAnoob Joseph 335273487f7SAnoob Joseph /* Initialize data path variables used by common code */ 336273487f7SAnoob Joseph otx_cpt_common_vars_init(cptvf); 337273487f7SAnoob Joseph 3380906b99fSMurthy NSSR c_dev->dev_ops = &cptvf_ops; 3390dc1cffaSAnkur Dwivedi 3400dc1cffaSAnkur Dwivedi c_dev->enqueue_burst = NULL; 3410dc1cffaSAnkur Dwivedi c_dev->dequeue_burst = NULL; 3420dc1cffaSAnkur Dwivedi 3430dc1cffaSAnkur Dwivedi c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | 3440dc1cffaSAnkur Dwivedi RTE_CRYPTODEV_FF_HW_ACCELERATED | 3450dc1cffaSAnkur Dwivedi RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | 3460dc1cffaSAnkur Dwivedi RTE_CRYPTODEV_FF_IN_PLACE_SGL | 3470dc1cffaSAnkur Dwivedi RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | 3480dc1cffaSAnkur Dwivedi RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT; 3490dc1cffaSAnkur Dwivedi 3500dc1cffaSAnkur Dwivedi /* Save dev private data */ 3510dc1cffaSAnkur Dwivedi c_dev->data->dev_private = cptvf; 3520dc1cffaSAnkur Dwivedi 3530dc1cffaSAnkur Dwivedi return 0; 3540dc1cffaSAnkur Dwivedi 355273487f7SAnoob Joseph init_fail: 356273487f7SAnoob Joseph otx_cpt_periodic_alarm_stop(cptvf); 357273487f7SAnoob Joseph otx_cpt_deinit_device(cptvf); 358273487f7SAnoob Joseph 3590dc1cffaSAnkur Dwivedi fail: 3600dc1cffaSAnkur Dwivedi if (cptvf) { 3610dc1cffaSAnkur Dwivedi /* Free private data allocated */ 3620dc1cffaSAnkur Dwivedi rte_free(cptvf); 3630dc1cffaSAnkur Dwivedi } 3640dc1cffaSAnkur Dwivedi 3650dc1cffaSAnkur Dwivedi return ret; 366bfe2ae49SAnoob Joseph } 367