1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2021-2024 Advanced Micro Devices, Inc. 3 */ 4 5 #ifndef _IONIC_CRYPTO_IF_H_ 6 #define _IONIC_CRYPTO_IF_H_ 7 8 #define IOCPT_DEV_INFO_SIGNATURE 0x43585660 /* 'CRPT' */ 9 #define IOCPT_DEV_INFO_VERSION 1 10 #define IOCPT_IFNAMSIZ 16 11 12 /** 13 * enum iocpt_cmd_opcode - Device commands 14 */ 15 enum iocpt_cmd_opcode { 16 IOCPT_CMD_NOP = 0, /* D, A */ 17 18 /* Device commands */ 19 IOCPT_CMD_IDENTIFY = 1, /* D */ 20 IOCPT_CMD_RESET = 3, /* D */ 21 22 /* LIF commands */ 23 IOCPT_CMD_LIF_IDENTIFY = 20, /* D */ 24 IOCPT_CMD_LIF_INIT = 21, /* D */ 25 IOCPT_CMD_LIF_RESET = 22, /* D */ 26 IOCPT_CMD_LIF_GETATTR = 23, /* D, A */ 27 IOCPT_CMD_LIF_SETATTR = 24, /* D, A */ 28 29 /* Queue commands */ 30 IOCPT_CMD_Q_IDENTIFY = 39, /* D, A */ 31 IOCPT_CMD_Q_INIT = 40, /* D, A */ 32 IOCPT_CMD_Q_CONTROL = 41, /* D, A */ 33 34 /* Session commands */ 35 IOCPT_CMD_SESS_CONTROL = 45, /* D, A */ 36 }; 37 38 /** 39 * enum iocpt_status_code - Device command return codes 40 */ 41 enum iocpt_status_code { 42 IOCPT_RC_SUCCESS = 0, /* Success */ 43 IOCPT_RC_EVERSION = 1, /* Incorrect version for request */ 44 IOCPT_RC_EOPCODE = 2, /* Invalid cmd opcode */ 45 IOCPT_RC_EIO = 3, /* I/O error */ 46 IOCPT_RC_EPERM = 4, /* Permission denied */ 47 IOCPT_RC_EQID = 5, /* Bad qid */ 48 IOCPT_RC_EQTYPE = 6, /* Bad qtype */ 49 IOCPT_RC_ENOENT = 7, /* No such element */ 50 IOCPT_RC_EINTR = 8, /* Operation interrupted */ 51 IOCPT_RC_EAGAIN = 9, /* Try again */ 52 IOCPT_RC_ENOMEM = 10, /* Out of memory */ 53 IOCPT_RC_EFAULT = 11, /* Bad address */ 54 IOCPT_RC_EBUSY = 12, /* Device or resource busy */ 55 IOCPT_RC_EEXIST = 13, /* Object already exists */ 56 IOCPT_RC_EINVAL = 14, /* Invalid argument */ 57 IOCPT_RC_ENOSPC = 15, /* No space left or alloc failure */ 58 IOCPT_RC_ERANGE = 16, /* Parameter out of range */ 59 IOCPT_RC_BAD_ADDR = 17, /* Descriptor contains a bad ptr */ 60 IOCPT_RC_DEV_CMD = 18, /* Device cmd attempted on AdminQ */ 61 IOCPT_RC_ENOSUPP = 19, /* Operation not supported */ 62 IOCPT_RC_ERROR = 29, /* Generic error */ 63 }; 64 65 enum iocpt_notifyq_opcode { 66 IOCPT_EVENT_RESET = 1, 67 IOCPT_EVENT_HEARTBEAT = 2, 68 IOCPT_EVENT_LOG = 3, 69 }; 70 71 enum iocpt_lif_type { 72 IOCPT_LIF_TYPE_DEFAULT = 0, 73 }; 74 75 /** 76 * struct iocpt_admin_cmd - General admin command format 77 * @opcode: Opcode for the command 78 * @lif_index: LIF index 79 * @cmd_data: Opcode-specific command bytes 80 */ 81 struct iocpt_admin_cmd { 82 u8 opcode; 83 u8 rsvd; 84 __le16 lif_index; 85 u8 cmd_data[60]; 86 }; 87 88 /** 89 * struct iocpt_admin_comp - General admin command completion format 90 * @status: Status of the command (enum iocpt_status_code) 91 * @comp_index: Index in the descriptor ring for which this is the completion 92 * @cmd_data: Command-specific bytes 93 * @color: Color bit (Always 0 for commands issued to the 94 * Device Cmd Registers) 95 */ 96 struct iocpt_admin_comp { 97 u8 status; 98 u8 rsvd; 99 __le16 comp_index; 100 u8 cmd_data[11]; 101 u8 color; 102 #define IOCPT_COMP_COLOR_MASK 0x80 103 }; 104 105 static inline u8 iocpt_color_match(u8 color, u8 done_color) 106 { 107 return (!!(color & IOCPT_COMP_COLOR_MASK)) == done_color; 108 } 109 110 /** 111 * struct iocpt_nop_cmd - NOP command 112 * @opcode: Opcode 113 */ 114 struct iocpt_nop_cmd { 115 u8 opcode; 116 u8 rsvd[63]; 117 }; 118 119 /** 120 * struct iocpt_nop_comp - NOP command completion 121 * @status: Status of the command (enum iocpt_status_code) 122 */ 123 struct iocpt_nop_comp { 124 u8 status; 125 u8 rsvd[15]; 126 }; 127 128 #define IOCPT_IDENTITY_VERSION_1 1 129 130 /** 131 * struct iocpt_dev_identify_cmd - Driver/device identify command 132 * @opcode: Opcode 133 * @ver: Highest version of identify supported by driver 134 */ 135 struct iocpt_dev_identify_cmd { 136 u8 opcode; 137 u8 ver; 138 u8 rsvd[62]; 139 }; 140 141 /** 142 * struct iocpt_dev_identify_comp - Device identify command completion 143 * @status: Status of the command (enum iocpt_status_code) 144 * @ver: Version of identify returned by device 145 */ 146 struct iocpt_dev_identify_comp { 147 u8 status; 148 u8 ver; 149 u8 rsvd[14]; 150 }; 151 152 /** 153 * struct iocpt_dev_reset_cmd - Device reset command 154 * Will reset all LIFs on the device. 155 * @opcode: Opcode 156 */ 157 struct iocpt_dev_reset_cmd { 158 u8 opcode; 159 u8 rsvd[63]; 160 }; 161 162 /** 163 * struct iocpt_dev_reset_comp - Reset command completion 164 * @status: Status of the command (enum iocpt_status_code) 165 */ 166 struct iocpt_dev_reset_comp { 167 u8 status; 168 u8 rsvd[15]; 169 }; 170 171 /** 172 * struct iocpt_lif_identify_cmd - LIF identify command 173 * @opcode: Opcode 174 * @type: LIF type (enum iocpt_lif_type) 175 * @lif_index: LIF index 176 * @ver: Version of identify returned by device 177 */ 178 struct iocpt_lif_identify_cmd { 179 u8 opcode; 180 u8 type; 181 __le16 lif_index; 182 u8 ver; 183 u8 rsvd[59]; 184 }; 185 186 /** 187 * struct iocpt_lif_identify_comp - LIF identify command completion 188 * @status: Status of the command (enum iocpt_status_code) 189 * @ver: Version of identify returned by device 190 */ 191 struct iocpt_lif_identify_comp { 192 u8 status; 193 u8 ver; 194 u8 rsvd2[14]; 195 }; 196 197 /** 198 * struct iocpt_lif_init_cmd - LIF init command 199 * @opcode: Opcode 200 * @type: LIF type (enum iocpt_lif_type) 201 * @lif_index: LIF index 202 * @info_pa: Destination address for LIF info (struct iocpt_lif_info) 203 */ 204 struct iocpt_lif_init_cmd { 205 u8 opcode; 206 u8 type; 207 __le16 lif_index; 208 __le32 rsvd; 209 __le64 info_pa; 210 u8 rsvd2[48]; 211 }; 212 213 /** 214 * struct iocpt_lif_init_comp - LIF init command completion 215 * @status: Status of the command (enum iocpt_status_code) 216 * @hw_index: Hardware index of the initialized LIF 217 */ 218 struct iocpt_lif_init_comp { 219 u8 status; 220 u8 rsvd; 221 __le16 hw_index; 222 u8 rsvd2[12]; 223 }; 224 225 /** 226 * struct iocpt_lif_reset_cmd - LIF reset command 227 * Will reset only the specified LIF. 228 * @opcode: Opcode 229 * @lif_index: LIF index 230 */ 231 struct iocpt_lif_reset_cmd { 232 u8 opcode; 233 u8 rsvd; 234 __le16 lif_index; 235 __le32 rsvd2[15]; 236 }; 237 238 /** 239 * enum iocpt_lif_attr - List of LIF attributes 240 * @IOCPT_LIF_ATTR_STATE: LIF state attribute 241 * @IOCPT_LIF_ATTR_NAME: LIF name attribute 242 * @IOCPT_LIF_ATTR_FEATURES: LIF features attribute 243 * @IOCPT_LIF_ATTR_STATS_CTRL: LIF statistics control attribute 244 */ 245 enum iocpt_lif_attr { 246 IOCPT_LIF_ATTR_STATE = 0, 247 IOCPT_LIF_ATTR_NAME = 1, 248 IOCPT_LIF_ATTR_FEATURES = 4, 249 IOCPT_LIF_ATTR_STATS_CTRL = 6, 250 }; 251 252 /** 253 * struct iocpt_lif_setattr_cmd - Set LIF attributes on the NIC 254 * @opcode: Opcode 255 * @attr: Attribute type (enum iocpt_lif_attr) 256 * @lif_index: LIF index 257 * @state: LIF state (enum iocpt_lif_state) 258 * @name: The name string, 0 terminated 259 * @features: Features (enum iocpt_hw_features) 260 * @stats_ctl: Stats control commands (enum iocpt_stats_ctl_cmd) 261 */ 262 struct iocpt_lif_setattr_cmd { 263 u8 opcode; 264 u8 attr; 265 __le16 lif_index; 266 union __rte_packed_begin { 267 u8 state; 268 char name[IOCPT_IFNAMSIZ]; 269 __le64 features; 270 u8 stats_ctl; 271 u8 rsvd[60]; 272 } __rte_packed_end; 273 }; 274 275 /** 276 * struct iocpt_lif_setattr_comp - LIF set attr command completion 277 * @status: Status of the command (enum iocpt_status_code) 278 * @comp_index: Index in the descriptor ring for which this is the completion 279 * @features: Features (enum iocpt_hw_features) 280 * @color: Color bit 281 */ 282 struct iocpt_lif_setattr_comp { 283 u8 status; 284 u8 rsvd; 285 __le16 comp_index; 286 union __rte_packed_begin { 287 __le64 features; 288 u8 rsvd2[11]; 289 } __rte_packed_end; 290 u8 color; 291 }; 292 293 /** 294 * struct iocpt_lif_getattr_cmd - Get LIF attributes from the NIC 295 * @opcode: Opcode 296 * @attr: Attribute type (enum iocpt_lif_attr) 297 * @lif_index: LIF index 298 */ 299 struct iocpt_lif_getattr_cmd { 300 u8 opcode; 301 u8 attr; 302 __le16 lif_index; 303 u8 rsvd[60]; 304 }; 305 306 /** 307 * struct iocpt_lif_getattr_comp - LIF get attr command completion 308 * @status: Status of the command (enum iocpt_status_code) 309 * @comp_index: Index in the descriptor ring for which this is the completion 310 * @state: LIF state (enum iocpt_lif_state) 311 * @name: LIF name string, 0 terminated 312 * @features: Features (enum iocpt_hw_features) 313 * @color: Color bit 314 */ 315 struct iocpt_lif_getattr_comp { 316 u8 status; 317 u8 rsvd; 318 __le16 comp_index; 319 union __rte_packed_begin { 320 u8 state; 321 __le64 features; 322 u8 rsvd2[11]; 323 } __rte_packed_end; 324 u8 color; 325 }; 326 327 /** 328 * enum iocpt_logical_qtype - Logical Queue Types 329 * @IOCPT_QTYPE_ADMINQ: Administrative Queue 330 * @IOCPT_QTYPE_NOTIFYQ: Notify Queue 331 * @IOCPT_QTYPE_CRYPTOQ: Cryptographic Queue 332 * @IOCPT_QTYPE_MAX: Max queue type supported 333 */ 334 enum iocpt_logical_qtype { 335 IOCPT_QTYPE_ADMINQ = 0, 336 IOCPT_QTYPE_NOTIFYQ = 1, 337 IOCPT_QTYPE_CRYPTOQ = 2, 338 IOCPT_QTYPE_MAX = 8, 339 }; 340 341 /** 342 * struct iocpt_q_identify_cmd - queue identify command 343 * @opcode: Opcode 344 * @type: Logical queue type (enum iocpt_logical_qtype) 345 * @lif_index: LIF index 346 * @ver: Highest queue type version that the driver supports 347 */ 348 struct iocpt_q_identify_cmd { 349 u8 opcode; 350 u8 type; 351 __le16 lif_index; 352 u8 ver; 353 u8 rsvd2[59]; 354 }; 355 356 /** 357 * struct iocpt_q_identify_comp - queue identify command completion 358 * @status: Status of the command (enum iocpt_status_code) 359 * @comp_index: Index in the descriptor ring for which this is the completion 360 * @ver: Queue type version that can be used with FW 361 */ 362 struct iocpt_q_identify_comp { 363 u8 status; 364 u8 rsvd; 365 __le16 comp_index; 366 u8 ver; 367 u8 rsvd2[11]; 368 }; 369 370 /** 371 * struct iocpt_q_init_cmd - Queue init command 372 * @opcode: Opcode 373 * @type: Logical queue type 374 * @lif_index: LIF index 375 * @ver: Queue type version 376 * @index: (LIF, qtype) relative admin queue index 377 * @intr_index: Interrupt control register index, or Event queue index 378 * @pid: Process ID 379 * @flags: 380 * IRQ: Interrupt requested on completion 381 * ENA: Enable the queue. If ENA=0 the queue is initialized 382 * but remains disabled, to be later enabled with the 383 * Queue Enable command. If ENA=1, then queue is 384 * initialized and then enabled. 385 * SG: Enable Scatter-Gather on the queue. 386 * @cos: Class of service for this queue 387 * @ring_size: Queue ring size, encoded as a log2(size), in 388 * number of descriptors. The actual ring size is 389 * (1 << ring_size). For example, to select a ring size 390 * of 64 descriptors write ring_size = 6. The minimum 391 * ring_size value is 2 for a ring of 4 descriptors. 392 * The maximum ring_size value is 12 for a ring of 4k 393 * descriptors. Values of ring_size <2 and >12 are 394 * reserved. 395 * @ring_base: Queue ring base address 396 * @cq_ring_base: Completion queue ring base address 397 * @sg_ring_base: Scatter/Gather ring base address 398 */ 399 struct __rte_packed_begin iocpt_q_init_cmd { 400 u8 opcode; 401 u8 type; 402 __le16 lif_index; 403 u8 ver; 404 u8 rsvd[3]; 405 __le32 index; 406 __le16 pid; 407 __le16 intr_index; 408 __le16 flags; 409 #define IOCPT_QINIT_F_IRQ 0x01 /* Request interrupt on completion */ 410 #define IOCPT_QINIT_F_ENA 0x02 /* Enable the queue */ 411 #define IOCPT_QINIT_F_SG 0x04 /* Enable scatter/gather on queue */ 412 u8 cos; 413 #define IOCPT_QSIZE_MIN_LG2 2 414 #define IOCPT_QSIZE_MAX_LG2 12 415 u8 ring_size; 416 __le64 ring_base; 417 __le64 cq_ring_base; 418 __le64 sg_ring_base; 419 u8 rsvd2[20]; 420 } __rte_packed_end; 421 422 /** 423 * struct iocpt_q_init_comp - Queue init command completion 424 * @status: Status of the command (enum iocpt_status_code) 425 * @comp_index: Index in the descriptor ring for which this is the completion 426 * @hw_index: Hardware Queue ID 427 * @hw_type: Hardware Queue type 428 * @color: Color 429 */ 430 struct iocpt_q_init_comp { 431 u8 status; 432 u8 rsvd; 433 __le16 comp_index; 434 __le32 hw_index; 435 u8 hw_type; 436 u8 rsvd2[6]; 437 u8 color; 438 }; 439 440 enum iocpt_desc_opcode { 441 IOCPT_DESC_OPCODE_GCM_AEAD_ENCRYPT = 0, 442 IOCPT_DESC_OPCODE_GCM_AEAD_DECRYPT = 1, 443 IOCPT_DESC_OPCODE_XTS_ENCRYPT = 2, 444 IOCPT_DESC_OPCODE_XTS_DECRYPT = 3, 445 }; 446 447 #define IOCPT_DESC_F_AAD_VALID 0x1 448 449 /** 450 * struct iocpt_desc - Crypto queue descriptor format 451 * @opcode: 452 * IOCPT_DESC_OPCODE_GCM_AEAD_ENCRYPT: 453 * Perform a GCM-AES encrypt operation 454 * 455 * IOCPT_DESC_OPCODE_GCM_AEAD_DECRYPT: 456 * Perform a GCM-AES decrypt operation 457 * 458 * IOCPT_DESC_OPCODE_XTS_ENCRYPT: 459 * Perform an XTS encrypt operation 460 * 461 * IOCPT_DESC_OPCODE_XTS_DECRYPT: 462 * Perform an XTS decrypt operation 463 * @flags: 464 * IOCPT_DESC_F_AAD_VALID: 465 * Source SGL contains an AAD addr and length 466 * @num_src_dst_sgs: Number of scatter-gather elements in SG 467 * descriptor (4 bits for source, 4 bits for destination) 468 * @session_tag: Session tag (key index) 469 * @intr_ctx_addr: Completion interrupt context address 470 * @intr_ctx_data: Completion interrupt context data 471 */ 472 struct __rte_packed_begin iocpt_crypto_desc { 473 uint8_t opcode; 474 uint8_t flags; 475 uint8_t num_src_dst_sgs; 476 #define IOCPT_DESC_NSGE_SRC_MASK 0xf 477 #define IOCPT_DESC_NSGE_SRC_SHIFT 0 478 #define IOCPT_DESC_NSGE_DST_MASK 0xf 479 #define IOCPT_DESC_NSGE_DST_SHIFT 4 480 uint8_t rsvd[9]; 481 __le32 session_tag; 482 __le64 intr_ctx_addr; 483 __le64 intr_ctx_data; 484 } __rte_packed_end; 485 486 static inline uint8_t iocpt_encode_nsge_src_dst(uint8_t src, uint8_t dst) 487 { 488 uint8_t nsge_src_dst; 489 490 nsge_src_dst = (src & IOCPT_DESC_NSGE_SRC_MASK) << 491 IOCPT_DESC_NSGE_SRC_SHIFT; 492 nsge_src_dst |= (dst & IOCPT_DESC_NSGE_DST_MASK) << 493 IOCPT_DESC_NSGE_DST_SHIFT; 494 495 return nsge_src_dst; 496 }; 497 498 static inline void iocpt_decode_nsge_src_dst(uint8_t nsge_src_dst, 499 uint8_t *src, uint8_t *dst) 500 { 501 *src = (nsge_src_dst >> IOCPT_DESC_NSGE_SRC_SHIFT) & 502 IOCPT_DESC_NSGE_SRC_MASK; 503 *dst = (nsge_src_dst >> IOCPT_DESC_NSGE_DST_SHIFT) & 504 IOCPT_DESC_NSGE_DST_MASK; 505 }; 506 507 /** 508 * struct iocpt_crypto_sg_elem - Crypto scatter-gather (SG) descriptor element 509 * @addr: DMA address of SG element data buffer 510 * @len: Length of SG element data buffer, in bytes 511 */ 512 struct iocpt_crypto_sg_elem { 513 __le64 addr; 514 __le16 len; 515 uint8_t rsvd[6]; 516 }; 517 518 /** 519 * struct iocpt_crypto_sg_desc - Crypto scatter-gather (SG) list 520 * @src_elems: Source SG elements; also destination in IP case 521 * AES_GCM: 522 * SGE0: Nonce 523 * SGE1: AAD (see IOCPT_DESC_F_AAD_VALID) 524 * SGE2 to SGE(N): Payload 525 * SGE(N+1): Auth tag 526 * @dst_elems: Destination SG elements for OOP case; unused in IP case 527 */ 528 struct iocpt_crypto_sg_desc { 529 #define IOCPT_CRYPTO_MAX_SG_ELEMS 8 530 #define IOCPT_CRYPTO_NONCE_ELEM 0 531 #define IOCPT_CRYPTO_AAD_ELEM 1 532 struct iocpt_crypto_sg_elem src_elems[IOCPT_CRYPTO_MAX_SG_ELEMS]; 533 struct iocpt_crypto_sg_elem dst_elems[IOCPT_CRYPTO_MAX_SG_ELEMS]; 534 }; 535 536 /** 537 * struct iocpt_crypto_comp - Crypto queue completion descriptor 538 * @status: Status of the command (enum iocpt_status_code) 539 * @comp_index: Index in the descriptor ring for which this is the completion 540 * @color: Color bit 541 */ 542 struct iocpt_crypto_comp { 543 #define IOCPT_COMP_SUCCESS 0 544 #define IOCPT_COMP_INVAL_OPCODE_ERROR 1 545 #define IOCPT_COMP_UNSUPP_OPCODE_ERROR 2 546 #define IOCPT_COMP_SYMM_SRC_SG_ERROR 3 547 #define IOCPT_COMP_SYMM_DST_SG_ERROR 4 548 #define IOCPT_COMP_SYMM_SRC_DST_LEN_MISMATCH 5 549 #define IOCPT_COMP_SYMM_HW_QAVAIL_ERROR 6 550 #define IOCPT_COMP_SYMM_AUTH_VERIFY_ERROR 7 551 #define IOCPT_COMP_SYMM_OTHER_VERIFY_ERROR 8 552 #define IOCPT_COMP_SYMM_PI_MODE_CHKSUM_ERROR 9 553 #define IOCPT_COMP_SYMM_HARDWARE_ERROR 10 554 #define IOCPT_COMP_SYMM_KEY_IDX_ERROR 11 555 u8 status; 556 u8 rsvd; 557 __le16 comp_index; 558 u8 rsvd2[11]; 559 u8 color; 560 }; 561 562 /** 563 * enum iocpt_hw_features - Feature flags supported by hardware 564 * @IOCPT_HW_SYM: Symmetric crypto operations 565 * @IOCPT_HW_ASYM: Asymmetric crypto operations 566 * @IOCPT_HW_CHAIN: Chained crypto operations 567 * @IOCPT_HW_IP: In-Place (destination same as source) 568 * @IOCPT_HW_OOP: Out-Of-Place (destination differs from source) 569 */ 570 enum iocpt_hw_features { 571 IOCPT_HW_SYM = BIT(0), 572 IOCPT_HW_ASYM = BIT(1), 573 IOCPT_HW_CHAIN = BIT(2), 574 IOCPT_HW_IP = BIT(3), 575 IOCPT_HW_OOP = BIT(4), 576 }; 577 578 /** 579 * struct iocpt_q_control_cmd - Queue control command 580 * @opcode: Opcode 581 * @type: Queue type 582 * @lif_index: LIF index 583 * @index: Queue index 584 * @oper: Operation (enum iocpt_q_control_oper) 585 */ 586 struct iocpt_q_control_cmd { 587 u8 opcode; 588 u8 type; 589 __le16 lif_index; 590 __le32 index; 591 u8 oper; 592 u8 rsvd2[55]; 593 }; 594 595 enum iocpt_q_control_oper { 596 IOCPT_Q_DISABLE = 0, 597 IOCPT_Q_ENABLE = 1, 598 }; 599 600 /* NB: It will take 64 transfers to update a 2048B key */ 601 #define IOCPT_SESS_KEY_LEN_MIN 16 602 #define IOCPT_SESS_KEY_LEN_MAX_SYMM 32 603 #define IOCPT_SESS_KEY_LEN_MAX_ASYM 2048 604 #define IOCPT_SESS_KEY_SEG_LEN 32 605 #define IOCPT_SESS_KEY_SEG_SHFT 5 606 #define IOCPT_SESS_KEY_SEG_CNT \ 607 (IOCPT_SESS_KEY_LEN_MAX_SYMM >> IOCPT_SESS_KEY_SEG_SHFT) 608 609 enum iocpt_sess_type { 610 IOCPT_SESS_NONE = 0, 611 IOCPT_SESS_AEAD_AES_GCM = 1, 612 }; 613 614 enum iocpt_sess_control_oper { 615 IOCPT_SESS_INIT = 0, 616 IOCPT_SESS_UPDATE_KEY = 2, 617 IOCPT_SESS_DISABLE = 3, 618 }; 619 620 /** 621 * struct iocpt_sess_control_cmd - Session control command 622 * @opcode: Opcode 623 * @type: Session type (enum iocpt_sess_type) 624 * @lif_index: LIF index 625 * @oper: Operation (enum iocpt_sess_control_oper) 626 * @flags: 627 * END: Indicates that this is the final segment of the key. 628 * When this flag is set, a write will be triggered from the 629 * controller's memory into the dedicated key-storage area. 630 * @key_len: Crypto key length in bytes 631 * @index: Session index, as allocated by PMD 632 * @key_seg_len: Crypto key segment length in bytes 633 * @key_seg_idx: Crypto key segment index 634 * @key: Crypto key 635 */ 636 struct iocpt_sess_control_cmd { 637 u8 opcode; 638 u8 type; 639 __le16 lif_index; 640 u8 oper; 641 u8 flags; 642 #define IOCPT_SCTL_F_END 0x01 /* Final segment of key */ 643 __le16 key_len; 644 __le32 index; 645 u8 key_seg_len; 646 u8 key_seg_idx; 647 u8 rsvd[18]; 648 u8 key[IOCPT_SESS_KEY_SEG_LEN]; 649 }; 650 651 /** 652 * struct iocpt_sess_control_comp - Session control command completion 653 * @status: Status of the command (enum iocpt_status_code) 654 * @comp_index: Index in the descriptor ring for which this is the completion 655 * @index: Session index 656 * @hw_type: Hardware Session type 657 * @color: Color 658 */ 659 struct iocpt_sess_control_comp { 660 u8 status; 661 u8 rsvd; 662 __le16 comp_index; 663 __le32 index; 664 u8 hw_type; 665 u8 rsvd2[6]; 666 u8 color; 667 }; 668 669 /** 670 * enum iocpt_stats_ctl_cmd - List of commands for stats control 671 * @IOCPT_STATS_CTL_RESET: Reset statistics 672 */ 673 enum iocpt_stats_ctl_cmd { 674 IOCPT_STATS_CTL_RESET = 0, 675 }; 676 677 /** 678 * struct iocpt_dev_status - Device status register 679 * @eid: most recent NotifyQ event id 680 */ 681 struct iocpt_dev_status { 682 __le64 eid; 683 u8 rsvd2[56]; 684 }; 685 686 enum iocpt_dev_state { 687 IOCPT_DEV_DISABLE = 0, 688 IOCPT_DEV_ENABLE = 1, 689 IOCPT_DEV_HANG_RESET = 2, 690 }; 691 692 /** 693 * enum iocpt_dev_attr - List of device attributes 694 * @IOCPT_DEV_ATTR_STATE: Device state attribute 695 * @IOCPT_DEV_ATTR_NAME: Device name attribute 696 * @IOCPT_DEV_ATTR_FEATURES: Device feature attributes 697 */ 698 enum iocpt_dev_attr { 699 IOCPT_DEV_ATTR_STATE = 0, 700 IOCPT_DEV_ATTR_NAME = 1, 701 IOCPT_DEV_ATTR_FEATURES = 2, 702 }; 703 704 /** 705 * struct iocpt_notify_event - Generic event reporting structure 706 * @eid: event number 707 * @ecode: event code 708 * @data: unspecified data about the event 709 * 710 * This is the generic event report struct from which the other 711 * actual events will be formed. 712 */ 713 struct iocpt_notify_event { 714 __le64 eid; 715 __le16 ecode; 716 u8 data[54]; 717 }; 718 719 /** 720 * struct iocpt_reset_event - Reset event notification 721 * @eid: event number 722 * @ecode: event code = IOCPT_EVENT_RESET 723 * @reset_code: reset type 724 * @state: 0=pending, 1=complete, 2=error 725 * 726 * Sent when the NIC or some subsystem is going to be or 727 * has been reset. 728 */ 729 struct iocpt_reset_event { 730 __le64 eid; 731 __le16 ecode; 732 u8 reset_code; 733 u8 state; 734 u8 rsvd[52]; 735 }; 736 737 /** 738 * struct iocpt_heartbeat_event - Sent periodically by NIC to indicate health 739 * @eid: event number 740 * @ecode: event code = IOCPT_EVENT_HEARTBEAT 741 */ 742 struct iocpt_heartbeat_event { 743 __le64 eid; 744 __le16 ecode; 745 u8 rsvd[54]; 746 }; 747 748 /** 749 * struct iocpt_log_event - Sent to notify the driver of an internal error 750 * @eid: event number 751 * @ecode: event code = IOCPT_EVENT_LOG 752 * @data: log data 753 */ 754 struct iocpt_log_event { 755 __le64 eid; 756 __le16 ecode; 757 u8 data[54]; 758 }; 759 760 /** 761 * union iocpt_lif_config - LIF configuration 762 * @state: LIF state (enum iocpt_lif_state) 763 * @name: LIF name 764 * @features: LIF features active (enum iocpt_hw_features) 765 * @queue_count: Queue counts per queue-type 766 */ 767 union iocpt_lif_config { 768 struct __rte_packed_begin { 769 u8 state; 770 u8 rsvd[3]; 771 char name[IOCPT_IFNAMSIZ]; 772 u8 rsvd2[12]; 773 __le64 features; 774 __le32 queue_count[IOCPT_QTYPE_MAX]; 775 } __rte_packed_end; 776 __le32 words[56]; 777 }; 778 779 /** 780 * struct iocpt_lif_status - LIF status register 781 * @eid: most recent NotifyQ event id 782 */ 783 struct iocpt_lif_status { 784 __le64 eid; 785 u8 rsvd[56]; 786 }; 787 788 /** 789 * struct iocpt_lif_info - LIF info structure 790 * @config: LIF configuration structure 791 * @status: LIF status structure 792 * @stats: LIF statistics structure 793 */ 794 struct iocpt_lif_info { 795 union iocpt_lif_config config; 796 struct iocpt_lif_status status; 797 }; 798 799 union iocpt_dev_cmd { 800 u32 words[16]; 801 struct iocpt_admin_cmd cmd; 802 struct iocpt_nop_cmd nop; 803 804 struct iocpt_dev_identify_cmd identify; 805 struct iocpt_dev_reset_cmd reset; 806 807 struct iocpt_lif_identify_cmd lif_identify; 808 struct iocpt_lif_init_cmd lif_init; 809 struct iocpt_lif_reset_cmd lif_reset; 810 struct iocpt_lif_getattr_cmd lif_getattr; 811 struct iocpt_lif_setattr_cmd lif_setattr; 812 813 struct iocpt_q_identify_cmd q_identify; 814 struct iocpt_q_init_cmd q_init; 815 struct iocpt_q_control_cmd q_control; 816 817 struct iocpt_sess_control_cmd sess_control; 818 }; 819 820 union iocpt_dev_cmd_comp { 821 u32 words[4]; 822 u8 status; 823 struct iocpt_admin_comp comp; 824 struct iocpt_nop_comp nop; 825 826 struct iocpt_dev_identify_comp identify; 827 struct iocpt_dev_reset_comp reset; 828 829 struct iocpt_lif_identify_comp lif_identify; 830 struct iocpt_lif_init_comp lif_init; 831 struct iocpt_lif_getattr_comp lif_getattr; 832 struct iocpt_lif_setattr_comp lif_setattr; 833 834 struct iocpt_q_identify_comp q_identify; 835 struct iocpt_q_init_comp q_init; 836 837 struct iocpt_sess_control_comp sess_control; 838 }; 839 840 /** 841 * union iocpt_dev_info_regs - Device info register format (read-only) 842 * @signature: Signature value of 0x43585660 ('CRPT') 843 * @version: Current version of info 844 * @asic_type: Asic type 845 * @asic_rev: Asic revision 846 * @fw_status: Firmware status 847 * @fw_heartbeat: Firmware heartbeat counter 848 * @serial_num: Serial number 849 * @fw_version: Firmware version 850 */ 851 union iocpt_dev_info_regs { 852 #define IOCPT_FWVERS_BUFLEN 32 853 #define IOCPT_SERIAL_BUFLEN 32 854 struct { 855 u32 signature; 856 u8 version; 857 u8 asic_type; 858 u8 asic_rev; 859 #define IOCPT_FW_STS_F_RUNNING 0x1 860 u8 fw_status; 861 u32 fw_heartbeat; 862 char fw_version[IOCPT_FWVERS_BUFLEN]; 863 char serial_num[IOCPT_SERIAL_BUFLEN]; 864 }; 865 u32 words[512]; 866 }; 867 868 /** 869 * union iocpt_dev_cmd_regs - Device command register format (read-write) 870 * @doorbell: Device Cmd Doorbell, write-only 871 * Write a 1 to signal device to process cmd, 872 * poll done for completion. 873 * @done: Done indicator, bit 0 == 1 when command is complete 874 * @cmd: Opcode-specific command bytes 875 * @comp: Opcode-specific response bytes 876 * @data: Opcode-specific side-data 877 */ 878 union iocpt_dev_cmd_regs { 879 struct __rte_packed_begin { 880 u32 doorbell; 881 u32 done; 882 union iocpt_dev_cmd cmd; 883 union iocpt_dev_cmd_comp comp; 884 u8 rsvd[48]; 885 u32 data[478]; 886 } __rte_packed_end; 887 u32 words[512]; 888 }; 889 890 /** 891 * union iocpt_dev_regs - Device register format for bar 0 page 0 892 * @info: Device info registers 893 * @devcmd: Device command registers 894 */ 895 union iocpt_dev_regs { 896 struct __rte_packed_begin { 897 union iocpt_dev_info_regs info; 898 union iocpt_dev_cmd_regs devcmd; 899 } __rte_packed_end; 900 __le32 words[1024]; 901 }; 902 903 union iocpt_adminq_cmd { 904 struct iocpt_admin_cmd cmd; 905 struct iocpt_nop_cmd nop; 906 struct iocpt_q_identify_cmd q_identify; 907 struct iocpt_q_init_cmd q_init; 908 struct iocpt_q_control_cmd q_control; 909 struct iocpt_lif_setattr_cmd lif_setattr; 910 struct iocpt_lif_getattr_cmd lif_getattr; 911 struct iocpt_sess_control_cmd sess_control; 912 }; 913 914 union iocpt_adminq_comp { 915 struct iocpt_admin_comp comp; 916 struct iocpt_nop_comp nop; 917 struct iocpt_q_identify_comp q_identify; 918 struct iocpt_q_init_comp q_init; 919 struct iocpt_lif_setattr_comp lif_setattr; 920 struct iocpt_lif_getattr_comp lif_getattr; 921 struct iocpt_sess_control_comp sess_control; 922 }; 923 924 union iocpt_notify_comp { 925 struct iocpt_notify_event event; 926 struct iocpt_reset_event reset; 927 struct iocpt_heartbeat_event heartbeat; 928 struct iocpt_log_event log; 929 }; 930 931 /** 932 * union iocpt_dev_identity - device identity information 933 * @version: Version of device identify 934 * @type: Identify type (0 for now) 935 * @state: Device state 936 * @nlifs: Number of LIFs provisioned 937 * @nintrs: Number of interrupts provisioned 938 * @ndbpgs_per_lif: Number of doorbell pages per LIF 939 * @intr_coal_mult: Interrupt coalescing multiplication factor 940 * Scale user-supplied interrupt coalescing 941 * value in usecs to device units using: 942 * device units = usecs * mult / div 943 * @intr_coal_div: Interrupt coalescing division factor 944 * Scale user-supplied interrupt coalescing 945 * value in usecs to device units using: 946 * device units = usecs * mult / div 947 */ 948 union iocpt_dev_identity { 949 struct { 950 u8 version; 951 u8 type; 952 u8 state; 953 u8 rsvd; 954 __le32 nlifs; 955 __le32 nintrs; 956 __le32 ndbpgs_per_lif; 957 __le32 intr_coal_mult; 958 __le32 intr_coal_div; 959 u8 rsvd2[8]; 960 }; 961 __le32 words[8]; 962 }; 963 964 /** 965 * union iocpt_lif_identity - LIF identity information (type-specific) 966 * 967 * @features: LIF features (see enum iocpt_hw_features) 968 * @version: Identify structure version 969 * @hw_index: LIF hardware index 970 * @max_nb_sessions: Maximum number of sessions supported 971 * @config: LIF config struct with features, q counts 972 */ 973 union iocpt_lif_identity { 974 struct __rte_packed_begin { 975 __le64 features; 976 977 u8 version; 978 u8 hw_index; 979 u8 rsvd[2]; 980 __le32 max_nb_sessions; 981 u8 rsvd2[120]; 982 union iocpt_lif_config config; 983 } __rte_packed_end; 984 __le32 words[90]; 985 }; 986 987 /** 988 * union iocpt_q_identity - queue identity information 989 * @version: Queue type version that can be used with FW 990 * @supported: Bitfield of queue versions, first bit = ver 0 991 * @features: Queue features 992 * @desc_sz: Descriptor size 993 * @comp_sz: Completion descriptor size 994 * @sg_desc_sz: Scatter/Gather descriptor size 995 * @max_sg_elems: Maximum number of Scatter/Gather elements 996 * @sg_desc_stride: Number of Scatter/Gather elements per descriptor 997 */ 998 union iocpt_q_identity { 999 struct { 1000 u8 version; 1001 u8 supported; 1002 u8 rsvd[6]; 1003 #define IOCPT_QIDENT_F_CQ 0x01 /* queue has completion ring */ 1004 #define IOCPT_QIDENT_F_SG 0x02 /* queue has scatter/gather ring */ 1005 __le64 features; 1006 __le16 desc_sz; 1007 __le16 comp_sz; 1008 __le16 sg_desc_sz; 1009 __le16 max_sg_elems; 1010 __le16 sg_desc_stride; 1011 }; 1012 __le32 words[20]; 1013 }; 1014 1015 struct iocpt_identity { 1016 union iocpt_dev_identity dev; 1017 union iocpt_lif_identity lif; 1018 union iocpt_q_identity q; 1019 }; 1020 1021 #endif /* _IONIC_CRYPTO_IF_H_ */ 1022