1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
3 */
4
5 #ifndef _CN10K_CRYPTODEV_OPS_H_
6 #define _CN10K_CRYPTODEV_OPS_H_
7
8 #include <cryptodev_pmd.h>
9 #include <rte_compat.h>
10 #include <rte_cryptodev.h>
11 #include <rte_eventdev.h>
12
13 #if defined(__aarch64__)
14 #include "roc_io.h"
15 #else
16 #include "roc_io_generic.h"
17 #endif
18
19 #include "cnxk_cryptodev.h"
20
21 #define CN10K_PKTS_PER_STEORL 32
22 #define CN10K_LMTLINES_PER_STEORL 16
23
24 extern struct rte_cryptodev_ops cn10k_cpt_ops;
25
26 void cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev, struct cnxk_cpt_vf *vf);
27
28 __rte_internal
29 uint16_t __rte_hot cn10k_cryptodev_sec_inb_rx_inject(void *dev, struct rte_mbuf **pkts,
30 struct rte_security_session **sess,
31 uint16_t nb_pkts);
32
33 __rte_internal
34 int cn10k_cryptodev_sec_rx_inject_configure(void *device, uint16_t port_id, bool enable);
35
36 __rte_internal
37 uint16_t __rte_hot cn10k_cpt_sg_ver1_crypto_adapter_enqueue(void *ws, struct rte_event ev[],
38 uint16_t nb_events);
39 __rte_internal
40 uint16_t __rte_hot cn10k_cpt_sg_ver2_crypto_adapter_enqueue(void *ws, struct rte_event ev[],
41 uint16_t nb_events);
42
43 static __rte_always_inline void __rte_hot
cn10k_cpt_lmtst_dual_submit(uint64_t * io_addr,const uint16_t lmt_id,int * i)44 cn10k_cpt_lmtst_dual_submit(uint64_t *io_addr, const uint16_t lmt_id, int *i)
45 {
46 uint64_t lmt_arg;
47
48 /* Check if the total number of instructions is odd or even. */
49 const int flag_odd = *i & 0x1;
50
51 /* Reduce i by 1 when odd number of instructions.*/
52 *i -= flag_odd;
53
54 if (*i > CN10K_PKTS_PER_STEORL) {
55 lmt_arg = ROC_CN10K_DUAL_CPT_LMT_ARG | (CN10K_LMTLINES_PER_STEORL - 1) << 12 |
56 (uint64_t)lmt_id;
57 roc_lmt_submit_steorl(lmt_arg, *io_addr);
58 lmt_arg = ROC_CN10K_DUAL_CPT_LMT_ARG |
59 (*i / 2 - CN10K_LMTLINES_PER_STEORL - 1) << 12 |
60 (uint64_t)(lmt_id + CN10K_LMTLINES_PER_STEORL);
61 roc_lmt_submit_steorl(lmt_arg, *io_addr);
62 if (flag_odd) {
63 *io_addr = (*io_addr & ~(uint64_t)(0x7 << 4)) |
64 (ROC_CN10K_CPT_INST_DW_M1 << 4);
65 lmt_arg = (uint64_t)(lmt_id + *i / 2);
66 roc_lmt_submit_steorl(lmt_arg, *io_addr);
67 *io_addr = (*io_addr & ~(uint64_t)(0x7 << 4)) |
68 (ROC_CN10K_TWO_CPT_INST_DW_M1 << 4);
69 *i += 1;
70 }
71 } else {
72 if (*i != 0) {
73 lmt_arg =
74 ROC_CN10K_DUAL_CPT_LMT_ARG | (*i / 2 - 1) << 12 | (uint64_t)lmt_id;
75 roc_lmt_submit_steorl(lmt_arg, *io_addr);
76 }
77
78 if (flag_odd) {
79 *io_addr = (*io_addr & ~(uint64_t)(0x7 << 4)) |
80 (ROC_CN10K_CPT_INST_DW_M1 << 4);
81 lmt_arg = (uint64_t)(lmt_id + *i / 2);
82 roc_lmt_submit_steorl(lmt_arg, *io_addr);
83 *io_addr = (*io_addr & ~(uint64_t)(0x7 << 4)) |
84 (ROC_CN10K_TWO_CPT_INST_DW_M1 << 4);
85 *i += 1;
86 }
87 }
88
89 rte_io_wmb();
90 }
91 #endif /* _CN10K_CRYPTODEV_OPS_H_ */
92