1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2017-2018 NXP 3 */ 4 5 #ifndef CAAM_JR_CONFIG_H 6 #define CAAM_JR_CONFIG_H 7 8 #include <rte_byteorder.h> 9 10 #include <compat.h> 11 12 #ifdef RTE_LIBRTE_PMD_CAAM_JR_BE 13 #define CAAM_BYTE_ORDER __BIG_ENDIAN 14 #else 15 #define CAAM_BYTE_ORDER __LITTLE_ENDIAN 16 #endif 17 18 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN 19 #define CORE_BYTE_ORDER __BIG_ENDIAN 20 #else 21 #define CORE_BYTE_ORDER __LITTLE_ENDIAN 22 #endif 23 24 #if CORE_BYTE_ORDER != CAAM_BYTE_ORDER 25 26 #define cpu_to_caam64 rte_cpu_to_be_64 27 #define cpu_to_caam32 rte_cpu_to_be_32 28 #else 29 #define cpu_to_caam64 30 #define cpu_to_caam32 31 32 #endif 33 34 /* 35 * SEC is configured to start work in polling mode, 36 * when configured for NAPI notification style. 37 */ 38 #define SEC_STARTUP_POLLING_MODE 0 39 /* 40 * SEC is configured to start work in interrupt mode, 41 * when configured for NAPI notification style. 42 */ 43 #define SEC_STARTUP_INTERRUPT_MODE 1 44 45 /* 46 * SEC driver will use NAPI model to receive notifications 47 * for processed packets from SEC engine hardware: 48 * - IRQ for low traffic 49 * - polling for high traffic. 50 */ 51 #define SEC_NOTIFICATION_TYPE_NAPI 0 52 /* 53 * SEC driver will use ONLY interrupts to receive notifications 54 * for processed packets from SEC engine hardware. 55 */ 56 #define SEC_NOTIFICATION_TYPE_IRQ 1 57 /* 58 * SEC driver will use ONLY polling to receive notifications 59 * for processed packets from SEC engine hardware. 60 */ 61 #define SEC_NOTIFICATION_TYPE_POLL 2 62 63 /* 64 * SEC USER SPACE DRIVER related configuration. 65 */ 66 67 /* 68 * Determines how SEC user space driver will receive notifications 69 * for processed packets from SEC engine. 70 * Valid values are: #SEC_NOTIFICATION_TYPE_POLL, #SEC_NOTIFICATION_TYPE_IRQ 71 * and #SEC_NOTIFICATION_TYPE_NAPI. 72 */ 73 #define SEC_NOTIFICATION_TYPE SEC_NOTIFICATION_TYPE_POLL 74 75 /* Maximum number of job rings supported by SEC hardware */ 76 #define MAX_SEC_JOB_RINGS 4 77 78 /* Maximum number of QP per job ring */ 79 #define RTE_CAAM_MAX_NB_SEC_QPS 1 80 81 /* 82 * Size of cryptographic context that is used directly in communicating 83 * with SEC device. SEC device works only with physical addresses. This 84 * is the maximum size for a SEC descriptor ( = 64 words). 85 */ 86 #define SEC_CRYPTO_DESCRIPTOR_SIZE 256 87 88 /* 89 * Size of job descriptor submitted to SEC device for each packet to 90 * be processed. 91 * Job descriptor contains 3 DMA address pointers: 92 * - to shared descriptor, to input buffer and to output buffer. 93 * The job descriptor contains other SEC specific commands as well: 94 * - HEADER command, SEQ IN PTR command SEQ OUT PTR command and opaque data 95 * each measuring 4 bytes. 96 * Job descriptor size, depending on physical address representation: 97 * - 32 bit - size is 28 bytes - cacheline-aligned size is 64 bytes 98 * - 36 bit - size is 40 bytes - cacheline-aligned size is 64 bytes 99 * @note: Job descriptor must be cacheline-aligned to ensure efficient 100 * memory access. 101 * @note: If other format is used for job descriptor, then the size must be 102 * revised. 103 */ 104 #define SEC_JOB_DESCRIPTOR_SIZE 64 105 106 /* 107 * Size of one entry in the input ring of a job ring. 108 * Input ring contains pointers to job descriptors. 109 * The memory used for an input ring and output ring must be physically 110 * contiguous. 111 */ 112 #define SEC_JOB_INPUT_RING_ENTRY_SIZE sizeof(dma_addr_t) 113 114 /* 115 * Size of one entry in the output ring of a job ring. 116 * Output ring entry is a pointer to a job descriptor followed by a 4 byte 117 * status word. 118 * The memory used for an input ring and output ring must be physically 119 * contiguous. 120 * @note If desired to use also the optional SEQ OUT indication in output ring 121 * entries, 122 * then 4 more bytes must be added to the size. 123 */ 124 #define SEC_JOB_OUTPUT_RING_ENTRY_SIZE (SEC_JOB_INPUT_RING_ENTRY_SIZE + 4) 125 126 /* 127 * DMA memory required for an input ring of a job ring. 128 */ 129 #define SEC_DMA_MEM_INPUT_RING_SIZE ((SEC_JOB_INPUT_RING_ENTRY_SIZE) * \ 130 (SEC_JOB_RING_SIZE)) 131 132 /* 133 * DMA memory required for an output ring of a job ring. 134 * Required extra 4 byte for status word per each entry. 135 */ 136 #define SEC_DMA_MEM_OUTPUT_RING_SIZE ((SEC_JOB_OUTPUT_RING_ENTRY_SIZE) * \ 137 (SEC_JOB_RING_SIZE)) 138 139 /* DMA memory required for a job ring, including both input and output rings. */ 140 #define SEC_DMA_MEM_JOB_RING_SIZE ((SEC_DMA_MEM_INPUT_RING_SIZE) + \ 141 (SEC_DMA_MEM_OUTPUT_RING_SIZE)) 142 143 /* 144 * When calling sec_init() UA will provide an area of virtual memory 145 * of size #SEC_DMA_MEMORY_SIZE to be used internally by the driver 146 * to allocate data (like SEC descriptors) that needs to be passed to 147 * SEC device in physical addressing and later on retrieved from SEC device. 148 * At initialization the UA provides specialized ptov/vtop functions/macros to 149 * translate addresses allocated from this memory area. 150 */ 151 #define SEC_DMA_MEMORY_SIZE ((SEC_DMA_MEM_JOB_RING_SIZE) * \ 152 (MAX_SEC_JOB_RINGS)) 153 154 #define L1_CACHE_BYTES 64 155 156 /* SEC JOB RING related configuration. */ 157 158 /* 159 * Configure the size of the JOB RING. 160 * The maximum size of the ring in hardware limited to 1024. 161 * However the number of packets in flight in a time interval of 1ms can 162 * be calculated from the traffic rate (Mbps) and packet size. 163 * Here it was considered a packet size of 64 bytes. 164 * 165 * @note Round up to nearest power of 2 for optimized update 166 * of producer/consumer indexes of each job ring 167 */ 168 #define SEC_JOB_RING_SIZE 512 169 170 /* 171 * Interrupt coalescing related configuration. 172 * NOTE: SEC hardware enabled interrupt 173 * coalescing is not supported on SEC version 3.1! 174 * SEC version 4.4 has support for interrupt 175 * coalescing. 176 */ 177 178 #if SEC_NOTIFICATION_TYPE != SEC_NOTIFICATION_TYPE_POLL 179 180 #define SEC_INT_COALESCING_ENABLE 1 181 /* 182 * Interrupt Coalescing Descriptor Count Threshold. 183 * While interrupt coalescing is enabled (ICEN=1), this value determines 184 * how many Descriptors are completed before raising an interrupt. 185 * 186 * Valid values for this field are from 0 to 255. 187 * Note that a value of 1 functionally defeats the advantages of interrupt 188 * coalescing since the threshold value is reached each time that a 189 * Job Descriptor is completed. A value of 0 is treated in the same 190 * manner as a value of 1. 191 */ 192 #define SEC_INTERRUPT_COALESCING_DESCRIPTOR_COUNT_THRESH 10 193 194 /* 195 * Interrupt Coalescing Timer Threshold. 196 * While interrupt coalescing is enabled (ICEN=1), this value determines the 197 * maximum amount of time after processing a Descriptor before raising an 198 * interrupt. 199 * The threshold value is represented in units equal to 64 CAAM interface 200 * clocks. Valid values for this field are from 1 to 65535. 201 * A value of 0 results in behavior identical to that when interrupt 202 * coalescing is disabled. 203 */ 204 #define SEC_INTERRUPT_COALESCING_TIMER_THRESH 100 205 #endif /* SEC_NOTIFICATION_TYPE_POLL */ 206 207 #endif /* CAAM_JR_CONFIG_H */ 208