xref: /dpdk/drivers/crypto/bcmfs/hw/bcmfs_rm_common.c (revision 72b452c5f2599f970f47fd17d3e8e5d60bfebe7a)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2020 Broadcom.
3  * All rights reserved.
4  */
5 
6 #include <errno.h>
7 
8 #include "bcmfs_hw_defs.h"
9 #include "bcmfs_rm_common.h"
10 
11 /* Completion descriptor format */
12 #define FS_CMPL_OPAQUE_SHIFT			0
13 #define FS_CMPL_OPAQUE_MASK			0xffff
14 #define FS_CMPL_ENGINE_STATUS_SHIFT		16
15 #define FS_CMPL_ENGINE_STATUS_MASK		0xffff
16 #define FS_CMPL_DME_STATUS_SHIFT		32
17 #define FS_CMPL_DME_STATUS_MASK			0xffff
18 #define FS_CMPL_RM_STATUS_SHIFT			48
19 #define FS_CMPL_RM_STATUS_MASK			0xffff
20 /* Completion RM status code */
21 #define FS_RM_STATUS_CODE_SHIFT			0
22 #define FS_RM_STATUS_CODE_MASK			0x3ff
23 #define FS_RM_STATUS_CODE_GOOD			0x0
24 #define FS_RM_STATUS_CODE_AE_TIMEOUT		0x3ff
25 
26 
27 /* Completion DME status code */
28 #define FS_DME_STATUS_MEM_COR_ERR		BIT(0)
29 #define FS_DME_STATUS_MEM_UCOR_ERR		BIT(1)
30 #define FS_DME_STATUS_FIFO_UNDRFLOW		BIT(2)
31 #define FS_DME_STATUS_FIFO_OVERFLOW		BIT(3)
32 #define FS_DME_STATUS_RRESP_ERR			BIT(4)
33 #define FS_DME_STATUS_BRESP_ERR			BIT(5)
34 #define FS_DME_STATUS_ERROR_MASK		(FS_DME_STATUS_MEM_COR_ERR | \
35 						 FS_DME_STATUS_MEM_UCOR_ERR | \
36 						 FS_DME_STATUS_FIFO_UNDRFLOW | \
37 						 FS_DME_STATUS_FIFO_OVERFLOW | \
38 						 FS_DME_STATUS_RRESP_ERR | \
39 						 FS_DME_STATUS_BRESP_ERR)
40 
41 /* APIs related to ring manager descriptors */
42 uint64_t
rm_build_desc(uint64_t val,uint32_t shift,uint64_t mask)43 rm_build_desc(uint64_t val, uint32_t shift,
44 	   uint64_t mask)
45 {
46 	return((val & mask) << shift);
47 }
48 
49 uint64_t
rm_read_desc(void * desc_ptr)50 rm_read_desc(void *desc_ptr)
51 {
52 	return le64_to_cpu(*((uint64_t *)desc_ptr));
53 }
54 
55 void
rm_write_desc(void * desc_ptr,uint64_t desc)56 rm_write_desc(void *desc_ptr, uint64_t desc)
57 {
58 	*((uint64_t *)desc_ptr) = cpu_to_le64(desc);
59 }
60 
61 uint32_t
rm_cmpl_desc_to_reqid(uint64_t cmpl_desc)62 rm_cmpl_desc_to_reqid(uint64_t cmpl_desc)
63 {
64 	return (uint32_t)(cmpl_desc & FS_CMPL_OPAQUE_MASK);
65 }
66 
67 int
rm_cmpl_desc_to_error(uint64_t cmpl_desc)68 rm_cmpl_desc_to_error(uint64_t cmpl_desc)
69 {
70 	uint32_t status;
71 
72 	status = FS_DESC_DEC(cmpl_desc, FS_CMPL_DME_STATUS_SHIFT,
73 			     FS_CMPL_DME_STATUS_MASK);
74 	if (status & FS_DME_STATUS_ERROR_MASK)
75 		return -EIO;
76 
77 	status = FS_DESC_DEC(cmpl_desc, FS_CMPL_RM_STATUS_SHIFT,
78 			     FS_CMPL_RM_STATUS_MASK);
79 	status &= FS_RM_STATUS_CODE_MASK;
80 	if (status == FS_RM_STATUS_CODE_AE_TIMEOUT)
81 		return -ETIMEDOUT;
82 
83 	return 0;
84 }
85