1*59cda512SCiara Power /* SPDX-License-Identifier: BSD-3-Clause
2*59cda512SCiara Power * Copyright(c) 2024 Intel Corporation
3*59cda512SCiara Power */
4*59cda512SCiara Power
5*59cda512SCiara Power #include "qat_comp.h"
6*59cda512SCiara Power #include "qat_comp_pmd.h"
7*59cda512SCiara Power #include "qat_comp_pmd_gens.h"
8*59cda512SCiara Power #include "icp_qat_hw_gen4_comp.h"
9*59cda512SCiara Power #include "icp_qat_hw_gen4_comp_defs.h"
10*59cda512SCiara Power
11*59cda512SCiara Power static const struct rte_compressdev_capabilities
12*59cda512SCiara Power qat_gen5_comp_capabilities[] = {
13*59cda512SCiara Power {/* COMPRESSION - deflate */
14*59cda512SCiara Power .algo = RTE_COMP_ALGO_DEFLATE,
15*59cda512SCiara Power .comp_feature_flags = RTE_COMP_FF_MULTI_PKT_CHECKSUM |
16*59cda512SCiara Power RTE_COMP_FF_CRC32_CHECKSUM |
17*59cda512SCiara Power RTE_COMP_FF_ADLER32_CHECKSUM |
18*59cda512SCiara Power RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |
19*59cda512SCiara Power RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
20*59cda512SCiara Power RTE_COMP_FF_HUFFMAN_FIXED |
21*59cda512SCiara Power RTE_COMP_FF_HUFFMAN_DYNAMIC |
22*59cda512SCiara Power RTE_COMP_FF_OOP_SGL_IN_SGL_OUT |
23*59cda512SCiara Power RTE_COMP_FF_OOP_SGL_IN_LB_OUT |
24*59cda512SCiara Power RTE_COMP_FF_OOP_LB_IN_SGL_OUT,
25*59cda512SCiara Power .window_size = {.min = 15, .max = 15, .increment = 0} },
26*59cda512SCiara Power RTE_COMP_END_OF_CAPABILITIES_LIST() };
27*59cda512SCiara Power
28*59cda512SCiara Power static struct rte_compressdev_ops qat_comp_ops_gen5 = {
29*59cda512SCiara Power
30*59cda512SCiara Power /* Device related operations */
31*59cda512SCiara Power .dev_configure = qat_comp_dev_config_gen4,
32*59cda512SCiara Power .dev_start = qat_comp_dev_start,
33*59cda512SCiara Power .dev_stop = qat_comp_dev_stop,
34*59cda512SCiara Power .dev_close = qat_comp_dev_close,
35*59cda512SCiara Power .dev_infos_get = qat_comp_dev_info_get,
36*59cda512SCiara Power
37*59cda512SCiara Power .stats_get = qat_comp_stats_get,
38*59cda512SCiara Power .stats_reset = qat_comp_stats_reset,
39*59cda512SCiara Power .queue_pair_setup = qat_comp_qp_setup,
40*59cda512SCiara Power .queue_pair_release = qat_comp_qp_release,
41*59cda512SCiara Power
42*59cda512SCiara Power /* Compression related operations */
43*59cda512SCiara Power .private_xform_create = qat_comp_private_xform_create,
44*59cda512SCiara Power .private_xform_free = qat_comp_private_xform_free,
45*59cda512SCiara Power .stream_create = qat_comp_stream_create,
46*59cda512SCiara Power .stream_free = qat_comp_stream_free
47*59cda512SCiara Power };
48*59cda512SCiara Power
49*59cda512SCiara Power static struct qat_comp_capabilities_info
qat_comp_cap_get_gen5(struct qat_pci_device * qat_dev __rte_unused)50*59cda512SCiara Power qat_comp_cap_get_gen5(struct qat_pci_device *qat_dev __rte_unused)
51*59cda512SCiara Power {
52*59cda512SCiara Power struct qat_comp_capabilities_info capa_info = {
53*59cda512SCiara Power .data = qat_gen5_comp_capabilities,
54*59cda512SCiara Power .size = sizeof(qat_gen5_comp_capabilities)
55*59cda512SCiara Power };
56*59cda512SCiara Power return capa_info;
57*59cda512SCiara Power }
58*59cda512SCiara Power
RTE_INIT(qat_comp_pmd_gen5_init)59*59cda512SCiara Power RTE_INIT(qat_comp_pmd_gen5_init)
60*59cda512SCiara Power {
61*59cda512SCiara Power qat_comp_gen_dev_ops[QAT_GEN5].compressdev_ops =
62*59cda512SCiara Power &qat_comp_ops_gen5;
63*59cda512SCiara Power qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_capabilities =
64*59cda512SCiara Power qat_comp_cap_get_gen5;
65*59cda512SCiara Power qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_num_im_bufs_required =
66*59cda512SCiara Power qat_comp_get_num_im_bufs_required_gen4;
67*59cda512SCiara Power qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_ram_bank_flags =
68*59cda512SCiara Power qat_comp_get_ram_bank_flags_gen4;
69*59cda512SCiara Power qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_set_slice_cfg_word =
70*59cda512SCiara Power qat_comp_set_slice_cfg_word_gen4;
71*59cda512SCiara Power qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_feature_flags =
72*59cda512SCiara Power qat_comp_get_features_gen1;
73*59cda512SCiara Power }
74