1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2024 Intel Corporation
3 */
4
5 #include "qat_comp.h"
6 #include "qat_comp_pmd.h"
7 #include "qat_comp_pmd_gens.h"
8 #include "icp_qat_hw_gen4_comp.h"
9 #include "icp_qat_hw_gen4_comp_defs.h"
10
11 static const struct rte_compressdev_capabilities
12 qat_gen5_comp_capabilities[] = {
13 {/* COMPRESSION - deflate */
14 .algo = RTE_COMP_ALGO_DEFLATE,
15 .comp_feature_flags = RTE_COMP_FF_MULTI_PKT_CHECKSUM |
16 RTE_COMP_FF_CRC32_CHECKSUM |
17 RTE_COMP_FF_ADLER32_CHECKSUM |
18 RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |
19 RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
20 RTE_COMP_FF_HUFFMAN_FIXED |
21 RTE_COMP_FF_HUFFMAN_DYNAMIC |
22 RTE_COMP_FF_OOP_SGL_IN_SGL_OUT |
23 RTE_COMP_FF_OOP_SGL_IN_LB_OUT |
24 RTE_COMP_FF_OOP_LB_IN_SGL_OUT,
25 .window_size = {.min = 15, .max = 15, .increment = 0} },
26 RTE_COMP_END_OF_CAPABILITIES_LIST() };
27
28 static struct rte_compressdev_ops qat_comp_ops_gen5 = {
29
30 /* Device related operations */
31 .dev_configure = qat_comp_dev_config_gen4,
32 .dev_start = qat_comp_dev_start,
33 .dev_stop = qat_comp_dev_stop,
34 .dev_close = qat_comp_dev_close,
35 .dev_infos_get = qat_comp_dev_info_get,
36
37 .stats_get = qat_comp_stats_get,
38 .stats_reset = qat_comp_stats_reset,
39 .queue_pair_setup = qat_comp_qp_setup,
40 .queue_pair_release = qat_comp_qp_release,
41
42 /* Compression related operations */
43 .private_xform_create = qat_comp_private_xform_create,
44 .private_xform_free = qat_comp_private_xform_free,
45 .stream_create = qat_comp_stream_create,
46 .stream_free = qat_comp_stream_free
47 };
48
49 static struct qat_comp_capabilities_info
qat_comp_cap_get_gen5(struct qat_pci_device * qat_dev __rte_unused)50 qat_comp_cap_get_gen5(struct qat_pci_device *qat_dev __rte_unused)
51 {
52 struct qat_comp_capabilities_info capa_info = {
53 .data = qat_gen5_comp_capabilities,
54 .size = sizeof(qat_gen5_comp_capabilities)
55 };
56 return capa_info;
57 }
58
RTE_INIT(qat_comp_pmd_gen5_init)59 RTE_INIT(qat_comp_pmd_gen5_init)
60 {
61 qat_comp_gen_dev_ops[QAT_GEN5].compressdev_ops =
62 &qat_comp_ops_gen5;
63 qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_capabilities =
64 qat_comp_cap_get_gen5;
65 qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_num_im_bufs_required =
66 qat_comp_get_num_im_bufs_required_gen4;
67 qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_ram_bank_flags =
68 qat_comp_get_ram_bank_flags_gen4;
69 qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_set_slice_cfg_word =
70 qat_comp_set_slice_cfg_word_gen4;
71 qat_comp_gen_dev_ops[QAT_GEN5].qat_comp_get_feature_flags =
72 qat_comp_get_features_gen1;
73 }
74