xref: /dpdk/drivers/common/cnxk/roc_platform.c (revision adc561fc5352bd1f1c8e736a33bb9b03bbb95b3f)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2021 Marvell.
3  */
4 
5 #include <rte_log.h>
6 
7 #include "roc_api.h"
8 
9 #define PLT_INIT_CB_MAX 8
10 
11 static int plt_init_cb_num;
12 static roc_plt_init_cb_t plt_init_cbs[PLT_INIT_CB_MAX];
13 
14 int
15 roc_plt_init_cb_register(roc_plt_init_cb_t cb)
16 {
17 	if (plt_init_cb_num >= PLT_INIT_CB_MAX)
18 		return -ERANGE;
19 
20 	plt_init_cbs[plt_init_cb_num++] = cb;
21 	return 0;
22 }
23 
24 uint16_t
25 roc_plt_control_lmt_id_get(void)
26 {
27 	uint32_t lcore_id = plt_lcore_id();
28 	if (lcore_id != LCORE_ID_ANY)
29 		return lcore_id << ROC_LMT_LINES_PER_CORE_LOG2;
30 	else
31 		/* Return Last LMT ID to be use in control path functionality */
32 		return ROC_NUM_LMT_LINES - 1;
33 }
34 
35 uint16_t
36 roc_plt_lmt_validate(void)
37 {
38 	if (!roc_model_is_cn9k()) {
39 		/* Last LMT line is reserved for control specific operation and can be
40 		 * use from any EAL or non EAL cores.
41 		 */
42 		if ((RTE_MAX_LCORE << ROC_LMT_LINES_PER_CORE_LOG2) >
43 		    (ROC_NUM_LMT_LINES - 1))
44 			return 0;
45 	}
46 	return 1;
47 }
48 
49 int
50 roc_plt_init(void)
51 {
52 	const struct rte_memzone *mz;
53 	int i, rc;
54 
55 	mz = rte_memzone_lookup(PLT_MODEL_MZ_NAME);
56 	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
57 		if (mz == NULL) {
58 			mz = rte_memzone_reserve(PLT_MODEL_MZ_NAME,
59 						 sizeof(struct roc_model),
60 						 SOCKET_ID_ANY, 0);
61 			if (mz == NULL) {
62 				plt_err("Failed to reserve mem for roc_model");
63 				return -ENOMEM;
64 			}
65 			if (roc_model_init(mz->addr)) {
66 				plt_err("Failed to init roc_model");
67 				rte_memzone_free(mz);
68 				return -EINVAL;
69 			}
70 		}
71 	} else {
72 		if (mz == NULL) {
73 			plt_err("Failed to lookup mem for roc_model");
74 			return -ENOMEM;
75 		}
76 		roc_model = mz->addr;
77 	}
78 
79 	for (i = 0; i < plt_init_cb_num; i++) {
80 		rc = (*plt_init_cbs[i])();
81 		if (rc)
82 			return rc;
83 	}
84 
85 	return 0;
86 }
87 
88 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_base, base, INFO);
89 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_mbox, mbox, NOTICE);
90 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_cpt, crypto, NOTICE);
91 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_ml, ml, NOTICE);
92 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_npa, mempool, NOTICE);
93 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_nix, nix, NOTICE);
94 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_npc, flow, NOTICE);
95 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_sso, event, NOTICE);
96 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_tim, timer, NOTICE);
97 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_tm, tm, NOTICE);
98 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_dpi, dpi, NOTICE);
99 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_rep, rep, NOTICE);
100 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_esw, esw, NOTICE);
101 RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_ree, ree, NOTICE);
102