1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(C) 2021 Marvell. 3 */ 4 #ifndef _ROC_NIX_INL_PRIV_H_ 5 #define _ROC_NIX_INL_PRIV_H_ 6 #include <pthread.h> 7 #include <sys/types.h> 8 9 #define NIX_INL_META_SIZE 384u 10 #define NIX_INL_CPT_LF 2 11 12 struct nix_inl_dev; 13 struct nix_inl_qint { 14 struct nix_inl_dev *inl_dev; 15 uint16_t qint; 16 }; 17 18 struct nix_inl_dev { 19 /* Base device object */ 20 struct dev dev; 21 22 /* PCI device */ 23 struct plt_pci_device *pci_dev; 24 25 /* LF specific BAR2 regions */ 26 uintptr_t nix_base; 27 uintptr_t ssow_base; 28 uintptr_t sso_base; 29 uintptr_t cpt_base; 30 31 /* MSIX vector offsets */ 32 uint16_t nix_msixoff; 33 uint16_t ssow_msixoff; 34 uint16_t sso_msixoff; 35 uint16_t cpt_msixoff[NIX_INL_CPT_LF]; 36 37 /* SSO data */ 38 uint32_t xaq_buf_size; 39 uint32_t xae_waes; 40 uint32_t iue; 41 uint32_t nb_xae; 42 struct roc_sso_xaq_data xaq; 43 roc_nix_inl_sso_work_cb_t work_cb; 44 void *cb_args; 45 uint64_t *pkt_pools; 46 uint16_t pkt_pools_cnt; 47 48 /* NIX data */ 49 uint8_t lf_tx_stats; 50 uint8_t lf_rx_stats; 51 uint16_t vwqe_interval; 52 uint16_t cints; 53 uint16_t qints; 54 uint16_t configured_qints; 55 struct roc_nix_rq *rqs; 56 struct nix_inl_qint *qints_mem; 57 uint16_t nb_rqs; 58 bool is_nix1; 59 uint8_t spb_drop_pc; 60 uint8_t lpb_drop_pc; 61 uint64_t sso_work_cnt; 62 63 /* NIX/CPT data */ 64 void *inb_sa_base; 65 uint16_t inb_sa_sz; 66 uint8_t nb_cptlf; 67 68 /* CPT data */ 69 struct roc_cpt_lf cpt_lf[NIX_INL_CPT_LF]; 70 71 /* OUTB soft expiry poll thread */ 72 plt_thread_t soft_exp_poll_thread; 73 uint32_t soft_exp_poll_freq; 74 uint64_t *sa_soft_exp_ring; 75 bool set_soft_exp_poll; 76 77 /* Soft expiry ring bitmap */ 78 struct plt_bitmap *soft_exp_ring_bmap; 79 80 /* bitmap memory */ 81 void *soft_exp_ring_bmap_mem; 82 83 /* Device arguments */ 84 uint8_t selftest; 85 uint16_t channel; 86 uint16_t chan_mask; 87 bool is_multi_channel; 88 uint32_t ipsec_in_min_spi; 89 uint32_t ipsec_in_max_spi; 90 uint32_t inb_spi_mask; 91 bool attach_cptlf; 92 uint16_t wqe_skip; 93 bool ts_ena; 94 uint32_t nb_meta_bufs; 95 uint32_t meta_buf_sz; 96 uint8_t rx_inj_ena; /* Rx Inject Enable */ 97 uint8_t custom_inb_sa; 98 99 /* NPC */ 100 int *ipsec_index; 101 uint32_t curr_ipsec_idx; 102 uint32_t max_ipsec_rules; 103 uint32_t alloc_ipsec_rules; 104 105 struct roc_nix_inl_dev_q q_info[NIX_INL_CPT_LF]; 106 }; 107 108 int nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev); 109 void nix_inl_sso_unregister_irqs(struct nix_inl_dev *inl_dev); 110 111 int nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev); 112 void nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev); 113 114 uint16_t nix_inl_dev_pffunc_get(void); 115 116 #endif /* _ROC_NIX_INL_PRIV_H_ */ 117