xref: /dpdk/drivers/common/cnxk/roc_dpi_priv.h (revision fca0bae93126541c90173d84dae1ead2fe9eeacc)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2021 Marvell.
3  */
4 
5 #ifndef _ROC_DPI_PRIV_H_
6 #define _ROC_DPI_PRIV_H_
7 
8 #define DPI_MAX_VFS 8
9 
10 /* DPI PF DBDF information macros */
11 #define DPI_PF_DBDF_DEVICE   0
12 #define DPI_PF_DBDF_FUNCTION 0
13 
14 #define DPI_QUEUE_OPEN	0x1
15 #define DPI_QUEUE_CLOSE 0x2
16 #define DPI_REG_DUMP	0x3
17 #define DPI_GET_REG_CFG 0x4
18 #define DPI_QUEUE_OPEN_V2 0x5
19 
20 #define DPI_QUEUE_IDLE_TMO_MS 1E3
21 
22 typedef union dpi_mbox_msg_t {
23 	uint64_t u[2];
24 	struct dpi_mbox_message_s {
25 		/* VF ID to configure */
26 		uint64_t vfid : 8;
27 		/* Command code */
28 		uint64_t cmd : 4;
29 		/* Command buffer size in 8-byte words */
30 		uint64_t csize : 14;
31 		/* aura of the command buffer */
32 		uint64_t aura : 20;
33 		/* SSO PF function */
34 		uint64_t sso_pf_func : 16;
35 		/* NPA PF function */
36 		uint64_t npa_pf_func : 16;
37 		/* WQE queue DMA completion status enable */
38 		uint64_t wqecs : 1;
39 		/* WQE queue DMA completion status offset */
40 		uint64_t wqecsoff : 8;
41 		/* Priority */
42 		uint64_t pri : 1;
43 	} s;
44 } dpi_mbox_msg_t;
45 
46 #endif
47