xref: /dpdk/drivers/common/cnxk/hw/dpi.h (revision 681851b347ad8466ffd0724d305dd9f44f9724c8)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2021 Marvell.
3  */
4 /**
5  * DPI device HW definitions.
6  */
7 #ifndef DEV_DPI_HW_H
8 #define DEV_DPI_HW_H
9 
10 #include <stdint.h>
11 
12 /* DPI VF register offsets from VF_BAR0 */
13 #define DPI_VDMA_EN	   (0x0)
14 #define DPI_VDMA_REQQ_CTL  (0x8)
15 #define DPI_VDMA_DBELL	   (0x10)
16 #define DPI_VDMA_SADDR	   (0x18)
17 #define DPI_VDMA_COUNTS	   (0x20)
18 #define DPI_VDMA_NADDR	   (0x28)
19 #define DPI_VDMA_IWBUSY	   (0x30)
20 #define DPI_VDMA_CNT	   (0x38)
21 #define DPI_VF_INT	   (0x100)
22 #define DPI_VF_INT_W1S	   (0x108)
23 #define DPI_VF_INT_ENA_W1C (0x110)
24 #define DPI_VF_INT_ENA_W1S (0x118)
25 
26 /**
27  * Enumeration dpi_hdr_xtype_e
28  *
29  * DPI Transfer Type Enumeration
30  * Enumerates the pointer type in DPI_DMA_INSTR_HDR_S[XTYPE].
31  */
32 #define DPI_XTYPE_OUTBOUND	(0)
33 #define DPI_XTYPE_INBOUND	(1)
34 #define DPI_XTYPE_INTERNAL_ONLY (2)
35 #define DPI_XTYPE_EXTERNAL_ONLY (3)
36 #define DPI_HDR_XTYPE_MASK	0x3
37 
38 #define DPI_HDR_PT_ZBW_CA	0x0
39 #define DPI_HDR_PT_ZBW_NC	0x1
40 #define DPI_HDR_PT_WQP		0x2
41 #define DPI_HDR_PT_WQP_NOSTATUS	0x0
42 #define DPI_HDR_PT_WQP_STATUSCA	0x1
43 #define DPI_HDR_PT_WQP_STATUSNC	0x3
44 #define DPI_HDR_PT_CNT		0x3
45 #define DPI_HDR_PT_MASK		0x3
46 
47 #define DPI_HDR_TT_MASK		0x3
48 #define DPI_HDR_GRP_MASK	0x3FF
49 #define DPI_HDR_FUNC_MASK	0xFFFF
50 
51 /* Big endian data bit position in DMA local pointer */
52 #define DPI_LPTR_BED_BIT_POS (60)
53 
54 #define DPI_MIN_CMD_SIZE 8
55 #define DPI_MAX_CMD_SIZE 64
56 
57 /**
58  * Structure dpi_instr_hdr_s for CN9K
59  *
60  * DPI DMA Instruction Header Format
61  */
62 union dpi_instr_hdr_s {
63 	uint64_t u[4];
64 	struct dpi_cn9k_instr_hdr_s_s {
65 		uint64_t tag : 32;
66 		uint64_t tt : 2;
67 		uint64_t grp : 10;
68 		uint64_t reserved_44_47 : 4;
69 		uint64_t nfst : 4;
70 		uint64_t reserved_52_53 : 2;
71 		uint64_t nlst : 4;
72 		uint64_t reserved_58_63 : 6;
73 		/* Word 0 - End */
74 		uint64_t aura : 20;
75 		uint64_t func : 16;
76 		uint64_t pt : 2;
77 		uint64_t reserved_102 : 1;
78 		uint64_t pvfe : 1;
79 		uint64_t fl : 1;
80 		uint64_t ii : 1;
81 		uint64_t fi : 1;
82 		uint64_t ca : 1;
83 		uint64_t csel : 1;
84 		uint64_t reserved_109_111 : 3;
85 		uint64_t xtype : 2;
86 		uint64_t reserved_114_119 : 6;
87 		uint64_t fport : 2;
88 		uint64_t reserved_122_123 : 2;
89 		uint64_t lport : 2;
90 		uint64_t reserved_126_127 : 2;
91 		/* Word 1 - End */
92 		uint64_t ptr : 64;
93 		/* Word 2 - End */
94 		uint64_t reserved_192_255 : 64;
95 		/* Word 3 - End */
96 	} cn9k;
97 
98 	struct dpi_cn10k_instr_hdr_s_s {
99 		uint64_t nfst : 4;
100 		uint64_t reserved_4_5 : 2;
101 		uint64_t nlst : 4;
102 		uint64_t reserved_10_11 : 2;
103 		uint64_t pvfe : 1;
104 		uint64_t reserved_13 : 1;
105 		uint64_t func : 16;
106 		uint64_t aura : 20;
107 		uint64_t xtype : 2;
108 		uint64_t reserved_52_53 : 2;
109 		uint64_t pt : 2;
110 		uint64_t fport : 2;
111 		uint64_t reserved_58_59 : 2;
112 		uint64_t lport : 2;
113 		uint64_t reserved_62_63 : 2;
114 		/* Word 0 - End */
115 		uint64_t ptr : 64;
116 		/* Word 1 - End */
117 		uint64_t tag : 32;
118 		uint64_t tt : 2;
119 		uint64_t grp : 10;
120 		uint64_t reserved_172_173 : 2;
121 		uint64_t fl : 1;
122 		uint64_t ii : 1;
123 		uint64_t fi : 1;
124 		uint64_t ca : 1;
125 		uint64_t csel : 1;
126 		uint64_t reserved_179_191 : 3;
127 		/* Word 2 - End */
128 		uint64_t reserved_192_255 : 64;
129 		/* Word 3 - End */
130 	} cn10k;
131 };
132 
133 #endif /*__DEV_DPI_HW_H__*/
134