1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2014 Intel Corporation 3 */ 4 5 #include <string.h> 6 #include <unistd.h> 7 #include <fcntl.h> 8 #include <dirent.h> 9 #include <inttypes.h> 10 #include <sys/stat.h> 11 #include <sys/mman.h> 12 #include <sys/sysmacros.h> 13 #include <linux/pci_regs.h> 14 15 #if defined(RTE_ARCH_X86) 16 #include <sys/io.h> 17 #endif 18 19 #include <rte_string_fns.h> 20 #include <rte_log.h> 21 #include <rte_pci.h> 22 #include <rte_bus_pci.h> 23 #include <rte_common.h> 24 #include <rte_malloc.h> 25 26 #include "eal_filesystem.h" 27 #include "pci_init.h" 28 #include "private.h" 29 30 void *pci_map_addr = NULL; 31 32 #define OFF_MAX ((uint64_t)(off_t)-1) 33 34 int 35 pci_uio_read_config(const struct rte_intr_handle *intr_handle, 36 void *buf, size_t len, off_t offset) 37 { 38 return pread(intr_handle->uio_cfg_fd, buf, len, offset); 39 } 40 41 int 42 pci_uio_write_config(const struct rte_intr_handle *intr_handle, 43 const void *buf, size_t len, off_t offset) 44 { 45 return pwrite(intr_handle->uio_cfg_fd, buf, len, offset); 46 } 47 48 static int 49 pci_uio_set_bus_master(int dev_fd) 50 { 51 uint16_t reg; 52 int ret; 53 54 ret = pread(dev_fd, ®, sizeof(reg), PCI_COMMAND); 55 if (ret != sizeof(reg)) { 56 RTE_LOG(ERR, EAL, 57 "Cannot read command from PCI config space!\n"); 58 return -1; 59 } 60 61 /* return if bus mastering is already on */ 62 if (reg & PCI_COMMAND_MASTER) 63 return 0; 64 65 reg |= PCI_COMMAND_MASTER; 66 67 ret = pwrite(dev_fd, ®, sizeof(reg), PCI_COMMAND); 68 if (ret != sizeof(reg)) { 69 RTE_LOG(ERR, EAL, 70 "Cannot write command to PCI config space!\n"); 71 return -1; 72 } 73 74 return 0; 75 } 76 77 static int 78 pci_mknod_uio_dev(const char *sysfs_uio_path, unsigned uio_num) 79 { 80 FILE *f; 81 char filename[PATH_MAX]; 82 int ret; 83 unsigned major, minor; 84 dev_t dev; 85 86 /* get the name of the sysfs file that contains the major and minor 87 * of the uio device and read its content */ 88 snprintf(filename, sizeof(filename), "%s/dev", sysfs_uio_path); 89 90 f = fopen(filename, "r"); 91 if (f == NULL) { 92 RTE_LOG(ERR, EAL, "%s(): cannot open sysfs to get major:minor\n", 93 __func__); 94 return -1; 95 } 96 97 ret = fscanf(f, "%u:%u", &major, &minor); 98 if (ret != 2) { 99 RTE_LOG(ERR, EAL, "%s(): cannot parse sysfs to get major:minor\n", 100 __func__); 101 fclose(f); 102 return -1; 103 } 104 fclose(f); 105 106 /* create the char device "mknod /dev/uioX c major minor" */ 107 snprintf(filename, sizeof(filename), "/dev/uio%u", uio_num); 108 dev = makedev(major, minor); 109 ret = mknod(filename, S_IFCHR | S_IRUSR | S_IWUSR, dev); 110 if (ret != 0) { 111 RTE_LOG(ERR, EAL, "%s(): mknod() failed %s\n", 112 __func__, strerror(errno)); 113 return -1; 114 } 115 116 return ret; 117 } 118 119 /* 120 * Return the uioX char device used for a pci device. On success, return 121 * the UIO number and fill dstbuf string with the path of the device in 122 * sysfs. On error, return a negative value. In this case dstbuf is 123 * invalid. 124 */ 125 static int 126 pci_get_uio_dev(struct rte_pci_device *dev, char *dstbuf, 127 unsigned int buflen, int create) 128 { 129 struct rte_pci_addr *loc = &dev->addr; 130 int uio_num = -1; 131 struct dirent *e; 132 DIR *dir; 133 char dirname[PATH_MAX]; 134 135 /* depending on kernel version, uio can be located in uio/uioX 136 * or uio:uioX */ 137 138 snprintf(dirname, sizeof(dirname), 139 "%s/" PCI_PRI_FMT "/uio", rte_pci_get_sysfs_path(), 140 loc->domain, loc->bus, loc->devid, loc->function); 141 142 dir = opendir(dirname); 143 if (dir == NULL) { 144 /* retry with the parent directory */ 145 snprintf(dirname, sizeof(dirname), 146 "%s/" PCI_PRI_FMT, rte_pci_get_sysfs_path(), 147 loc->domain, loc->bus, loc->devid, loc->function); 148 dir = opendir(dirname); 149 150 if (dir == NULL) { 151 RTE_LOG(ERR, EAL, "Cannot opendir %s\n", dirname); 152 return -1; 153 } 154 } 155 156 /* take the first file starting with "uio" */ 157 while ((e = readdir(dir)) != NULL) { 158 /* format could be uio%d ...*/ 159 int shortprefix_len = sizeof("uio") - 1; 160 /* ... or uio:uio%d */ 161 int longprefix_len = sizeof("uio:uio") - 1; 162 char *endptr; 163 164 if (strncmp(e->d_name, "uio", 3) != 0) 165 continue; 166 167 /* first try uio%d */ 168 errno = 0; 169 uio_num = strtoull(e->d_name + shortprefix_len, &endptr, 10); 170 if (errno == 0 && endptr != (e->d_name + shortprefix_len)) { 171 snprintf(dstbuf, buflen, "%s/uio%u", dirname, uio_num); 172 break; 173 } 174 175 /* then try uio:uio%d */ 176 errno = 0; 177 uio_num = strtoull(e->d_name + longprefix_len, &endptr, 10); 178 if (errno == 0 && endptr != (e->d_name + longprefix_len)) { 179 snprintf(dstbuf, buflen, "%s/uio:uio%u", dirname, uio_num); 180 break; 181 } 182 } 183 closedir(dir); 184 185 /* No uio resource found */ 186 if (e == NULL) 187 return -1; 188 189 /* create uio device if we've been asked to */ 190 if (rte_eal_create_uio_dev() && create && 191 pci_mknod_uio_dev(dstbuf, uio_num) < 0) 192 RTE_LOG(WARNING, EAL, "Cannot create /dev/uio%u\n", uio_num); 193 194 return uio_num; 195 } 196 197 void 198 pci_uio_free_resource(struct rte_pci_device *dev, 199 struct mapped_pci_resource *uio_res) 200 { 201 rte_free(uio_res); 202 203 if (dev->intr_handle.uio_cfg_fd >= 0) { 204 close(dev->intr_handle.uio_cfg_fd); 205 dev->intr_handle.uio_cfg_fd = -1; 206 } 207 if (dev->intr_handle.fd >= 0) { 208 close(dev->intr_handle.fd); 209 dev->intr_handle.fd = -1; 210 dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN; 211 } 212 } 213 214 int 215 pci_uio_alloc_resource(struct rte_pci_device *dev, 216 struct mapped_pci_resource **uio_res) 217 { 218 char dirname[PATH_MAX]; 219 char cfgname[PATH_MAX]; 220 char devname[PATH_MAX]; /* contains the /dev/uioX */ 221 int uio_num; 222 struct rte_pci_addr *loc; 223 224 loc = &dev->addr; 225 226 /* find uio resource */ 227 uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 1); 228 if (uio_num < 0) { 229 RTE_LOG(WARNING, EAL, " "PCI_PRI_FMT" not managed by UIO driver, " 230 "skipping\n", loc->domain, loc->bus, loc->devid, loc->function); 231 return 1; 232 } 233 snprintf(devname, sizeof(devname), "/dev/uio%u", uio_num); 234 235 /* save fd if in primary process */ 236 dev->intr_handle.fd = open(devname, O_RDWR); 237 if (dev->intr_handle.fd < 0) { 238 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", 239 devname, strerror(errno)); 240 goto error; 241 } 242 243 snprintf(cfgname, sizeof(cfgname), 244 "/sys/class/uio/uio%u/device/config", uio_num); 245 dev->intr_handle.uio_cfg_fd = open(cfgname, O_RDWR); 246 if (dev->intr_handle.uio_cfg_fd < 0) { 247 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", 248 cfgname, strerror(errno)); 249 goto error; 250 } 251 252 if (dev->kdrv == RTE_PCI_KDRV_IGB_UIO) 253 dev->intr_handle.type = RTE_INTR_HANDLE_UIO; 254 else { 255 dev->intr_handle.type = RTE_INTR_HANDLE_UIO_INTX; 256 257 /* set bus master that is not done by uio_pci_generic */ 258 if (pci_uio_set_bus_master(dev->intr_handle.uio_cfg_fd)) { 259 RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n"); 260 goto error; 261 } 262 } 263 264 /* allocate the mapping details for secondary processes*/ 265 *uio_res = rte_zmalloc("UIO_RES", sizeof(**uio_res), 0); 266 if (*uio_res == NULL) { 267 RTE_LOG(ERR, EAL, 268 "%s(): cannot store uio mmap details\n", __func__); 269 goto error; 270 } 271 272 strlcpy((*uio_res)->path, devname, sizeof((*uio_res)->path)); 273 memcpy(&(*uio_res)->pci_addr, &dev->addr, sizeof((*uio_res)->pci_addr)); 274 275 return 0; 276 277 error: 278 pci_uio_free_resource(dev, *uio_res); 279 return -1; 280 } 281 282 int 283 pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx, 284 struct mapped_pci_resource *uio_res, int map_idx) 285 { 286 int fd = -1; 287 char devname[PATH_MAX]; 288 void *mapaddr; 289 struct rte_pci_addr *loc; 290 struct pci_map *maps; 291 int wc_activate = 0; 292 293 if (dev->driver != NULL) 294 wc_activate = dev->driver->drv_flags & RTE_PCI_DRV_WC_ACTIVATE; 295 296 loc = &dev->addr; 297 maps = uio_res->maps; 298 299 /* allocate memory to keep path */ 300 maps[map_idx].path = rte_malloc(NULL, sizeof(devname), 0); 301 if (maps[map_idx].path == NULL) { 302 RTE_LOG(ERR, EAL, "Cannot allocate memory for path: %s\n", 303 strerror(errno)); 304 return -1; 305 } 306 307 /* 308 * open resource file, to mmap it 309 */ 310 if (wc_activate) { 311 /* update devname for mmap */ 312 snprintf(devname, sizeof(devname), 313 "%s/" PCI_PRI_FMT "/resource%d_wc", 314 rte_pci_get_sysfs_path(), 315 loc->domain, loc->bus, loc->devid, 316 loc->function, res_idx); 317 318 fd = open(devname, O_RDWR); 319 if (fd < 0 && errno != ENOENT) { 320 RTE_LOG(INFO, EAL, "%s cannot be mapped. " 321 "Fall-back to non prefetchable mode.\n", 322 devname); 323 } 324 } 325 326 if (!wc_activate || fd < 0) { 327 snprintf(devname, sizeof(devname), 328 "%s/" PCI_PRI_FMT "/resource%d", 329 rte_pci_get_sysfs_path(), 330 loc->domain, loc->bus, loc->devid, 331 loc->function, res_idx); 332 333 /* then try to map resource file */ 334 fd = open(devname, O_RDWR); 335 if (fd < 0) { 336 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", 337 devname, strerror(errno)); 338 goto error; 339 } 340 } 341 342 /* try mapping somewhere close to the end of hugepages */ 343 if (pci_map_addr == NULL) 344 pci_map_addr = pci_find_max_end_va(); 345 346 mapaddr = pci_map_resource(pci_map_addr, fd, 0, 347 (size_t)dev->mem_resource[res_idx].len, 0); 348 close(fd); 349 if (mapaddr == NULL) 350 goto error; 351 352 pci_map_addr = RTE_PTR_ADD(mapaddr, 353 (size_t)dev->mem_resource[res_idx].len); 354 355 pci_map_addr = RTE_PTR_ALIGN(pci_map_addr, sysconf(_SC_PAGE_SIZE)); 356 357 maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr; 358 maps[map_idx].size = dev->mem_resource[res_idx].len; 359 maps[map_idx].addr = mapaddr; 360 maps[map_idx].offset = 0; 361 strcpy(maps[map_idx].path, devname); 362 dev->mem_resource[res_idx].addr = mapaddr; 363 364 return 0; 365 366 error: 367 rte_free(maps[map_idx].path); 368 return -1; 369 } 370 371 #define PIO_MAX 0x10000 372 373 #if defined(RTE_ARCH_X86) 374 int 375 pci_uio_ioport_map(struct rte_pci_device *dev, int bar, 376 struct rte_pci_ioport *p) 377 { 378 FILE *f = NULL; 379 char dirname[PATH_MAX]; 380 char filename[PATH_MAX]; 381 char buf[BUFSIZ]; 382 uint64_t phys_addr, end_addr, flags; 383 unsigned long base; 384 int i; 385 386 /* open and read addresses of the corresponding resource in sysfs */ 387 snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource", 388 rte_pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus, 389 dev->addr.devid, dev->addr.function); 390 f = fopen(filename, "r"); 391 if (f == NULL) { 392 RTE_LOG(ERR, EAL, "%s(): Cannot open sysfs resource: %s\n", 393 __func__, strerror(errno)); 394 return -1; 395 } 396 397 for (i = 0; i < bar + 1; i++) { 398 if (fgets(buf, sizeof(buf), f) == NULL) { 399 RTE_LOG(ERR, EAL, "%s(): Cannot read sysfs resource\n", __func__); 400 goto error; 401 } 402 } 403 if (pci_parse_one_sysfs_resource(buf, sizeof(buf), &phys_addr, 404 &end_addr, &flags) < 0) 405 goto error; 406 407 if (flags & IORESOURCE_IO) { 408 if (rte_eal_iopl_init()) { 409 RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n", 410 __func__, dev->name); 411 goto error; 412 } 413 414 base = (unsigned long)phys_addr; 415 if (base > PIO_MAX) { 416 RTE_LOG(ERR, EAL, "%s(): %08lx too large PIO resource\n", __func__, base); 417 goto error; 418 } 419 420 RTE_LOG(DEBUG, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base); 421 } else if (flags & IORESOURCE_MEM) { 422 base = (unsigned long)dev->mem_resource[bar].addr; 423 RTE_LOG(DEBUG, EAL, "%s(): MMIO BAR %08lx detected\n", __func__, base); 424 } else { 425 RTE_LOG(ERR, EAL, "%s(): unknown BAR type\n", __func__); 426 goto error; 427 } 428 429 /* FIXME only for primary process ? */ 430 if (dev->intr_handle.type == RTE_INTR_HANDLE_UNKNOWN) { 431 int uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0); 432 if (uio_num < 0) { 433 RTE_LOG(ERR, EAL, "cannot open %s: %s\n", 434 dirname, strerror(errno)); 435 goto error; 436 } 437 438 snprintf(filename, sizeof(filename), "/dev/uio%u", uio_num); 439 dev->intr_handle.fd = open(filename, O_RDWR); 440 if (dev->intr_handle.fd < 0) { 441 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", 442 filename, strerror(errno)); 443 goto error; 444 } 445 dev->intr_handle.type = RTE_INTR_HANDLE_UIO; 446 } 447 448 RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", base); 449 450 p->base = base; 451 p->len = 0; 452 fclose(f); 453 return 0; 454 error: 455 if (f) 456 fclose(f); 457 return -1; 458 } 459 #else 460 int 461 pci_uio_ioport_map(struct rte_pci_device *dev, int bar, 462 struct rte_pci_ioport *p) 463 { 464 FILE *f; 465 char buf[BUFSIZ]; 466 char filename[PATH_MAX]; 467 uint64_t phys_addr, end_addr, flags; 468 int fd, i; 469 void *addr; 470 471 /* open and read addresses of the corresponding resource in sysfs */ 472 snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource", 473 rte_pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus, 474 dev->addr.devid, dev->addr.function); 475 f = fopen(filename, "r"); 476 if (f == NULL) { 477 RTE_LOG(ERR, EAL, "Cannot open sysfs resource: %s\n", 478 strerror(errno)); 479 return -1; 480 } 481 for (i = 0; i < bar + 1; i++) { 482 if (fgets(buf, sizeof(buf), f) == NULL) { 483 RTE_LOG(ERR, EAL, "Cannot read sysfs resource\n"); 484 goto error; 485 } 486 } 487 if (pci_parse_one_sysfs_resource(buf, sizeof(buf), &phys_addr, 488 &end_addr, &flags) < 0) 489 goto error; 490 if ((flags & IORESOURCE_IO) == 0) { 491 RTE_LOG(ERR, EAL, "BAR %d is not an IO resource\n", bar); 492 goto error; 493 } 494 snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource%d", 495 rte_pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus, 496 dev->addr.devid, dev->addr.function, bar); 497 498 /* mmap the pci resource */ 499 fd = open(filename, O_RDWR); 500 if (fd < 0) { 501 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", filename, 502 strerror(errno)); 503 goto error; 504 } 505 addr = mmap(NULL, end_addr + 1, PROT_READ | PROT_WRITE, 506 MAP_SHARED, fd, 0); 507 close(fd); 508 if (addr == MAP_FAILED) { 509 RTE_LOG(ERR, EAL, "Cannot mmap IO port resource: %s\n", 510 strerror(errno)); 511 goto error; 512 } 513 514 /* strangely, the base address is mmap addr + phys_addr */ 515 p->base = (uintptr_t)addr + phys_addr; 516 p->len = end_addr + 1; 517 RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%"PRIx64"\n", p->base); 518 fclose(f); 519 520 return 0; 521 522 error: 523 fclose(f); 524 return -1; 525 } 526 #endif 527 528 #if defined(RTE_ARCH_X86) 529 530 static inline uint8_t ioread8(void *addr) 531 { 532 uint8_t val; 533 534 val = (uint64_t)(uintptr_t)addr >= PIO_MAX ? 535 *(volatile uint8_t *)addr : 536 #ifdef __GLIBC__ 537 inb_p((unsigned long)addr); 538 #else 539 inb((unsigned long)addr); 540 #endif 541 542 return val; 543 } 544 545 static inline uint16_t ioread16(void *addr) 546 { 547 uint16_t val; 548 549 val = (uint64_t)(uintptr_t)addr >= PIO_MAX ? 550 *(volatile uint16_t *)addr : 551 #ifdef __GLIBC__ 552 inw_p((unsigned long)addr); 553 #else 554 inw((unsigned long)addr); 555 #endif 556 557 return val; 558 } 559 560 static inline uint32_t ioread32(void *addr) 561 { 562 uint32_t val; 563 564 val = (uint64_t)(uintptr_t)addr >= PIO_MAX ? 565 *(volatile uint32_t *)addr : 566 #ifdef __GLIBC__ 567 inl_p((unsigned long)addr); 568 #else 569 inl((unsigned long)addr); 570 #endif 571 572 return val; 573 } 574 575 static inline void iowrite8(uint8_t val, void *addr) 576 { 577 (uint64_t)(uintptr_t)addr >= PIO_MAX ? 578 *(volatile uint8_t *)addr = val : 579 #ifdef __GLIBC__ 580 outb_p(val, (unsigned long)addr); 581 #else 582 outb(val, (unsigned long)addr); 583 #endif 584 } 585 586 static inline void iowrite16(uint16_t val, void *addr) 587 { 588 (uint64_t)(uintptr_t)addr >= PIO_MAX ? 589 *(volatile uint16_t *)addr = val : 590 #ifdef __GLIBC__ 591 outw_p(val, (unsigned long)addr); 592 #else 593 outw(val, (unsigned long)addr); 594 #endif 595 } 596 597 static inline void iowrite32(uint32_t val, void *addr) 598 { 599 (uint64_t)(uintptr_t)addr >= PIO_MAX ? 600 *(volatile uint32_t *)addr = val : 601 #ifdef __GLIBC__ 602 outl_p(val, (unsigned long)addr); 603 #else 604 outl(val, (unsigned long)addr); 605 #endif 606 } 607 608 #else /* !RTE_ARCH_X86 */ 609 610 static inline uint8_t ioread8(void *addr) 611 { 612 return *(volatile uint8_t *)addr; 613 } 614 615 static inline uint16_t ioread16(void *addr) 616 { 617 return *(volatile uint16_t *)addr; 618 } 619 620 static inline uint32_t ioread32(void *addr) 621 { 622 return *(volatile uint32_t *)addr; 623 } 624 625 static inline void iowrite8(uint8_t val, void *addr) 626 { 627 *(volatile uint8_t *)addr = val; 628 } 629 630 static inline void iowrite16(uint16_t val, void *addr) 631 { 632 *(volatile uint16_t *)addr = val; 633 } 634 635 static inline void iowrite32(uint32_t val, void *addr) 636 { 637 *(volatile uint32_t *)addr = val; 638 } 639 640 #endif /* !RTE_ARCH_X86 */ 641 642 void 643 pci_uio_ioport_read(struct rte_pci_ioport *p, 644 void *data, size_t len, off_t offset) 645 { 646 uint8_t *d; 647 int size; 648 uintptr_t reg = p->base + offset; 649 650 for (d = data; len > 0; d += size, reg += size, len -= size) { 651 if (len >= 4) { 652 size = 4; 653 *(uint32_t *)d = ioread32((void *)reg); 654 } else if (len >= 2) { 655 size = 2; 656 *(uint16_t *)d = ioread16((void *)reg); 657 } else { 658 size = 1; 659 *d = ioread8((void *)reg); 660 } 661 } 662 } 663 664 void 665 pci_uio_ioport_write(struct rte_pci_ioport *p, 666 const void *data, size_t len, off_t offset) 667 { 668 const uint8_t *s; 669 int size; 670 uintptr_t reg = p->base + offset; 671 672 for (s = data; len > 0; s += size, reg += size, len -= size) { 673 if (len >= 4) { 674 size = 4; 675 iowrite32(*(const uint32_t *)s, (void *)reg); 676 } else if (len >= 2) { 677 size = 2; 678 iowrite16(*(const uint16_t *)s, (void *)reg); 679 } else { 680 size = 1; 681 iowrite8(*s, (void *)reg); 682 } 683 } 684 } 685 686 int 687 pci_uio_ioport_unmap(struct rte_pci_ioport *p) 688 { 689 #if defined(RTE_ARCH_X86) 690 RTE_SET_USED(p); 691 /* FIXME close intr fd ? */ 692 return 0; 693 #else 694 return munmap((void *)(uintptr_t)p->base, p->len); 695 #endif 696 } 697