1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2008-2016 Freescale Semiconductor, Inc. 4 * Copyright 2017 NXP 5 * 6 */ 7 8 #ifndef HEADER_COMPAT_H 9 #define HEADER_COMPAT_H 10 11 #include <stdio.h> 12 #include <stdint.h> 13 #include <stdlib.h> 14 #include <errno.h> 15 #include <string.h> 16 #include <malloc.h> 17 #include <unistd.h> 18 #include <linux/types.h> 19 #include <rte_atomic.h> 20 21 /* The following definitions are primarily to allow the single-source driver 22 * interfaces to be included by arbitrary program code. Ie. for interfaces that 23 * are also available in kernel-space, these definitions provide compatibility 24 * with certain attributes and types used in those interfaces. 25 */ 26 27 /* Required compiler attributes */ 28 #define likely(x) __builtin_expect(!!(x), 1) 29 #define unlikely(x) __builtin_expect(!!(x), 0) 30 31 /* Required types */ 32 typedef uint64_t dma_addr_t; 33 34 /* Debugging */ 35 #define prflush(fmt, args...) \ 36 do { \ 37 printf(fmt, ##args); \ 38 fflush(stdout); \ 39 } while (0) 40 #define pr_crit(fmt, args...) prflush("CRIT:" fmt, ##args) 41 #define pr_err(fmt, args...) prflush("ERR:" fmt, ##args) 42 #define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args) 43 #define pr_info(fmt, args...) prflush(fmt, ##args) 44 45 #ifdef RTE_LIBRTE_DPAA2_DEBUG_BUS 46 47 /* Trace the 3 different classes of read/write access to QBMan. #undef as 48 * required. 49 */ 50 #define QBMAN_CCSR_TRACE 51 #define QBMAN_CINH_TRACE 52 #define QBMAN_CENA_TRACE 53 54 #define QBMAN_CHECKING 55 56 #ifdef pr_debug 57 #undef pr_debug 58 #endif 59 #define pr_debug(fmt, args...) printf(fmt, ##args) 60 #define QBMAN_BUG_ON(c) \ 61 do { \ 62 static int warned_##__LINE__; \ 63 if ((c) && !warned_##__LINE__) { \ 64 pr_warn("(%s:%d)\n", __FILE__, __LINE__); \ 65 warned_##__LINE__ = 1; \ 66 } \ 67 } while (0) 68 #else 69 #define QBMAN_BUG_ON(c) {} 70 #define pr_debug(fmt, args...) {} 71 #endif 72 73 /* Other miscellaneous interfaces our APIs depend on; */ 74 75 #define lower_32_bits(x) ((uint32_t)(x)) 76 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) 77 78 #define __iomem 79 80 #define __raw_readb(p) (*(const volatile unsigned char *)(p)) 81 #define __raw_readl(p) (*(const volatile unsigned int *)(p)) 82 #define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); } 83 84 #define dma_wmb() rte_smp_mb() 85 86 #define atomic_t rte_atomic32_t 87 #define atomic_read(v) rte_atomic32_read(v) 88 #define atomic_set(v, i) rte_atomic32_set(v, i) 89 90 #define atomic_inc(v) rte_atomic32_add(v, 1) 91 #define atomic_dec(v) rte_atomic32_sub(v, 1) 92 93 #define atomic_inc_and_test(v) rte_atomic32_inc_and_test(v) 94 #define atomic_dec_and_test(v) rte_atomic32_dec_and_test(v) 95 96 #define atomic_inc_return(v) rte_atomic32_add_return(v, 1) 97 #define atomic_dec_return(v) rte_atomic32_sub_return(v, 1) 98 #define atomic_sub_and_test(i, v) (rte_atomic32_sub_return(v, i) == 0) 99 100 #endif /* HEADER_COMPAT_H */ 101