1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2008-2016 Freescale Semiconductor, Inc. 4 * Copyright 2017,2021 NXP 5 * 6 */ 7 8 #ifndef HEADER_COMPAT_H 9 #define HEADER_COMPAT_H 10 11 #include <stdio.h> 12 #include <stdint.h> 13 #include <stdlib.h> 14 #include <errno.h> 15 #include <string.h> 16 #include <malloc.h> 17 #include <unistd.h> 18 #include <linux/types.h> 19 20 #include <rte_atomic.h> 21 #include <rte_branch_prediction.h> 22 23 /* The following definitions are primarily to allow the single-source driver 24 * interfaces to be included by arbitrary program code. Ie. for interfaces that 25 * are also available in kernel-space, these definitions provide compatibility 26 * with certain attributes and types used in those interfaces. 27 */ 28 29 /* Required types */ 30 typedef uint64_t dma_addr_t; 31 32 /* Debugging */ 33 #define prflush(fmt, ...) \ 34 do { \ 35 printf(fmt, ##__VA_ARGS__); \ 36 fflush(stdout); \ 37 } while (0) 38 #define pr_crit(fmt, ...) prflush("CRIT:" fmt, ##__VA_ARGS__) 39 #define pr_err(fmt, ...) prflush("ERR:" fmt, ##__VA_ARGS__) 40 #define pr_warn(fmt, ...) prflush("WARN:" fmt, ##__VA_ARGS__) 41 #define pr_info(fmt, ...) prflush(fmt, ##__VA_ARGS__) 42 43 #ifdef RTE_LIBRTE_DPAA2_DEBUG_BUS 44 45 /* Trace the 3 different classes of read/write access to QBMan. #undef as 46 * required. 47 */ 48 #define QBMAN_CCSR_TRACE 49 #define QBMAN_CINH_TRACE 50 #define QBMAN_CENA_TRACE 51 52 #define QBMAN_CHECKING 53 54 #ifdef pr_debug 55 #undef pr_debug 56 #endif 57 #define pr_debug(fmt, ...) printf(fmt, ##__VA_ARGS__) 58 #define QBMAN_BUG_ON(c) \ 59 do { \ 60 static int warned_##__LINE__; \ 61 if ((c) && !warned_##__LINE__) { \ 62 pr_warn("(%s:%d)\n", __FILE__, __LINE__); \ 63 warned_##__LINE__ = 1; \ 64 } \ 65 } while (0) 66 #else 67 #define QBMAN_BUG_ON(c) {} 68 #define pr_debug(fmt, ...) {} 69 #endif 70 71 /* Other miscellaneous interfaces our APIs depend on; */ 72 73 #define lower_32_bits(x) ((uint32_t)(x)) 74 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) 75 76 #define __iomem 77 78 #define __raw_readb(p) (*(const volatile unsigned char *)(p)) 79 #define __raw_readl(p) (*(const volatile unsigned int *)(p)) 80 #define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); } 81 82 #define dma_wmb() rte_io_wmb() 83 84 #define atomic_t rte_atomic32_t 85 #define atomic_read(v) rte_atomic32_read(v) 86 #define atomic_set(v, i) rte_atomic32_set(v, i) 87 88 #define atomic_inc(v) rte_atomic32_add(v, 1) 89 #define atomic_dec(v) rte_atomic32_sub(v, 1) 90 91 #define atomic_inc_and_test(v) rte_atomic32_inc_and_test(v) 92 #define atomic_dec_and_test(v) rte_atomic32_dec_and_test(v) 93 94 #define atomic_inc_return(v) rte_atomic32_add_return(v, 1) 95 #define atomic_dec_return(v) rte_atomic32_sub_return(v, 1) 96 #define atomic_sub_and_test(i, v) (rte_atomic32_sub_return(v, i) == 0) 97 98 #endif /* HEADER_COMPAT_H */ 99