1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 2 * 3 * Copyright 2013-2015 Freescale Semiconductor Inc. 4 * Copyright 2017 NXP 5 * 6 */ 7 #ifndef _FSL_MC_SYS_H 8 #define _FSL_MC_SYS_H 9 10 #ifdef __linux_driver__ 11 12 #include <linux/errno.h> 13 #include <asm/io.h> 14 #include <linux/slab.h> 15 16 struct fsl_mc_io { 17 void *regs; 18 }; 19 20 #ifndef ENOTSUP 21 #define ENOTSUP 95 22 #endif 23 24 #define ioread64(_p) readq(_p) 25 #define iowrite64(_v, _p) writeq(_v, _p) 26 27 #else /* __linux_driver__ */ 28 29 #include <stdio.h> 30 #include <stdint.h> 31 #include <errno.h> 32 #include <sys/uio.h> 33 #include <linux/byteorder/little_endian.h> 34 35 #include <rte_atomic.h> 36 37 #define __iormb() rte_io_rmb() 38 #define __iowmb() rte_io_wmb() 39 #define __arch_getq(a) (*(volatile uint64_t *)(a)) 40 #define __arch_putq(v, a) (*(volatile uint64_t *)(a) = (v)) 41 #define __arch_putq32(v, a) (*(volatile uint32_t *)(a) = (v)) 42 #define readq(c) \ 43 __extension__ ({ uint64_t __v = __arch_getq(c); __iormb(); __v; }) 44 #define writeq(v, c) \ 45 __extension__ ({ uint64_t __v = v; __iowmb(); __arch_putq(__v, c); __v; }) 46 #define writeq32(v, c) \ 47 __extension__ ({ uint32_t __v = v; __iowmb(); __arch_putq32(__v, c); __v; }) 48 #define ioread64(_p) readq(_p) 49 #define iowrite64(_v, _p) writeq(_v, _p) 50 #define iowrite32(_v, _p) writeq32(_v, _p) 51 #define __iomem 52 53 /*GPP is supposed to use MC commands with low priority*/ 54 #define CMD_PRI_LOW 0 /*!< Low Priority command indication */ 55 56 struct fsl_mc_io { 57 void *regs; 58 }; 59 60 #endif /* __linux_driver__ */ 61 62 #endif /* _FSL_MC_SYS_H */ 63