1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 2 * 3 * Copyright 2013-2016 Freescale Semiconductor Inc. 4 * Copyright 2016-2023 NXP 5 * 6 */ 7 #ifndef _FSL_DPIO_CMD_H 8 #define _FSL_DPIO_CMD_H 9 10 /* DPIO Version */ 11 #define DPIO_VER_MAJOR 4 12 #define DPIO_VER_MINOR 3 13 14 #define DPIO_CMD_BASE_VERSION 1 15 #define DPIO_CMD_ID_OFFSET 4 16 17 #define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION) 18 19 /* Command IDs */ 20 #define DPIO_CMDID_CLOSE DPIO_CMD(0x800) 21 #define DPIO_CMDID_OPEN DPIO_CMD(0x803) 22 #define DPIO_CMDID_CREATE DPIO_CMD(0x903) 23 #define DPIO_CMDID_DESTROY DPIO_CMD(0x983) 24 #define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03) 25 26 #define DPIO_CMDID_ENABLE DPIO_CMD(0x002) 27 #define DPIO_CMDID_DISABLE DPIO_CMD(0x003) 28 #define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004) 29 #define DPIO_CMDID_RESET DPIO_CMD(0x005) 30 #define DPIO_CMDID_IS_ENABLED DPIO_CMD(0x006) 31 32 #define DPIO_CMDID_SET_IRQ_ENABLE DPIO_CMD(0x012) 33 #define DPIO_CMDID_GET_IRQ_ENABLE DPIO_CMD(0x013) 34 #define DPIO_CMDID_SET_IRQ_MASK DPIO_CMD(0x014) 35 #define DPIO_CMDID_GET_IRQ_MASK DPIO_CMD(0x015) 36 #define DPIO_CMDID_GET_IRQ_STATUS DPIO_CMD(0x016) 37 #define DPIO_CMDID_CLEAR_IRQ_STATUS DPIO_CMD(0x017) 38 39 #define DPIO_CMDID_SET_STASHING_DEST DPIO_CMD(0x120) 40 #define DPIO_CMDID_GET_STASHING_DEST DPIO_CMD(0x121) 41 #define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x122) 42 #define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x123) 43 #define DPIO_CMDID_SET_STASHING_DEST_SOURCE DPIO_CMD(0x124) 44 #define DPIO_CMDID_GET_STASHING_DEST_SOURCE DPIO_CMD(0x125) 45 #define DPIO_CMDID_SET_STASHING_DEST_BY_CORE_ID DPIO_CMD(0x126) 46 47 /* Macros for accessing command fields smaller than 1byte */ 48 #define DPIO_MASK(field) \ 49 GENMASK(DPIO_##field##_SHIFT + DPIO_##field##_SIZE - 1, \ 50 DPIO_##field##_SHIFT) 51 #define dpio_set_field(var, field, val) \ 52 ((var) |= (((val) << DPIO_##field##_SHIFT) & DPIO_MASK(field))) 53 #define dpio_get_field(var, field) \ 54 (((var) & DPIO_MASK(field)) >> DPIO_##field##_SHIFT) 55 56 #pragma pack(push, 1) 57 struct dpio_cmd_open { 58 uint32_t dpio_id; 59 }; 60 61 #define DPIO_CHANNEL_MODE_SHIFT 0 62 #define DPIO_CHANNEL_MODE_SIZE 2 63 64 struct dpio_cmd_create { 65 uint16_t pad1; 66 /* from LSB: channel_mode:2 */ 67 uint8_t channel_mode; 68 uint8_t pad2; 69 uint8_t num_priorities; 70 }; 71 72 struct dpio_cmd_destroy { 73 uint32_t dpio_id; 74 }; 75 76 #define DPIO_ENABLE_SHIFT 0 77 #define DPIO_ENABLE_SIZE 1 78 79 struct dpio_rsp_is_enabled { 80 /* only the LSB */ 81 uint8_t en; 82 }; 83 84 #define DPIO_ATTR_CHANNEL_MODE_SHIFT 0 85 #define DPIO_ATTR_CHANNEL_MODE_SIZE 4 86 87 struct dpio_rsp_get_attr { 88 uint32_t id; 89 uint16_t qbman_portal_id; 90 uint8_t num_priorities; 91 /* from LSB: channel_mode:4 */ 92 uint8_t channel_mode; 93 uint64_t qbman_portal_ce_offset; 94 uint64_t qbman_portal_ci_offset; 95 uint32_t qbman_version; 96 uint32_t pad; 97 uint32_t clk; 98 }; 99 100 struct dpio_stashing_dest { 101 uint8_t sdest; 102 }; 103 104 struct dpio_stashing_dest_source { 105 uint8_t ss; 106 }; 107 108 struct dpio_stashing_dest_by_core_id { 109 uint8_t core_id; 110 }; 111 112 struct dpio_cmd_static_dequeue_channel { 113 uint32_t dpcon_id; 114 }; 115 116 struct dpio_rsp_add_static_dequeue_channel { 117 uint8_t channel_index; 118 }; 119 120 struct dpio_rsp_get_api_version { 121 uint16_t major; 122 uint16_t minor; 123 }; 124 125 #pragma pack(pop) 126 #endif /* _FSL_DPIO_CMD_H */ 127