1d80f857dSNicolas Chautru /* SPDX-License-Identifier: BSD-3-Clause 2d80f857dSNicolas Chautru * Copyright(c) 2021 Intel Corporation 3d80f857dSNicolas Chautru */ 4d80f857dSNicolas Chautru 5d80f857dSNicolas Chautru #ifndef VRB1_PF_ENUM_H 6d80f857dSNicolas Chautru #define VRB1_PF_ENUM_H 7d80f857dSNicolas Chautru 8d80f857dSNicolas Chautru /* 9d80f857dSNicolas Chautru * VRB1 Register mapping on PF BAR0 10d80f857dSNicolas Chautru * This is automatically generated from RDL, format may change with new RDL 11d80f857dSNicolas Chautru * Release. 12d80f857dSNicolas Chautru * Variable names are as is 13d80f857dSNicolas Chautru */ 14d80f857dSNicolas Chautru enum { 15d80f857dSNicolas Chautru VRB1_PfQmgrEgressQueuesTemplate = 0x0007FC00, 16d80f857dSNicolas Chautru VRB1_PfQmgrIngressAq = 0x00080000, 17d80f857dSNicolas Chautru VRB1_PfQmgrDepthLog2Grp = 0x00A00200, 18d80f857dSNicolas Chautru VRB1_PfQmgrTholdGrp = 0x00A00300, 19d80f857dSNicolas Chautru VRB1_PfQmgrGrpTmplateReg0Indx = 0x00A00600, 20d80f857dSNicolas Chautru VRB1_PfQmgrGrpTmplateReg1Indx = 0x00A00700, 21d80f857dSNicolas Chautru VRB1_PfQmgrGrpTmplateReg2indx = 0x00A00800, 22d80f857dSNicolas Chautru VRB1_PfQmgrGrpTmplateReg3Indx = 0x00A00900, 23d80f857dSNicolas Chautru VRB1_PfQmgrGrpTmplateReg4Indx = 0x00A00A00, 24d80f857dSNicolas Chautru VRB1_PfQmgrVfBaseAddr = 0x00A01000, 25d80f857dSNicolas Chautru VRB1_PfQmgrArbQDepthGrp = 0x00A02F00, 26d80f857dSNicolas Chautru VRB1_PfQmgrGrpFunction0 = 0x00A02F40, 27d80f857dSNicolas Chautru VRB1_PfQmgrGrpFunction1 = 0x00A02F44, 28d80f857dSNicolas Chautru VRB1_PfQmgrGrpPriority = 0x00A02F48, 29d80f857dSNicolas Chautru VRB1_PfQmgrAqEnableVf = 0x00A10000, 30d80f857dSNicolas Chautru VRB1_PfQmgrRingSizeVf = 0x00A20004, 31d80f857dSNicolas Chautru VRB1_PfQmgrGrpDepthLog20Vf = 0x00A20008, 32d80f857dSNicolas Chautru VRB1_PfQmgrGrpDepthLog21Vf = 0x00A2000C, 33d80f857dSNicolas Chautru VRB1_PfFabricM2iBufferReg = 0x00B30000, 34d80f857dSNicolas Chautru VRB1_PfFabricI2Mdma_weight = 0x00B31044, 35d80f857dSNicolas Chautru VRB1_PfFecUl5gIbDebugReg = 0x00B40200, 36d80f857dSNicolas Chautru VRB1_PfFftConfig0 = 0x00B58004, 37d80f857dSNicolas Chautru VRB1_PfFftRamPageAccess = 0x00B5800C, 38d80f857dSNicolas Chautru VRB1_PfFftRamOff = 0x00B58800, 39d80f857dSNicolas Chautru VRB1_PfDmaConfig0Reg = 0x00B80000, 40d80f857dSNicolas Chautru VRB1_PfDmaConfig1Reg = 0x00B80004, 41d80f857dSNicolas Chautru VRB1_PfDmaQmgrAddrReg = 0x00B80008, 42d80f857dSNicolas Chautru VRB1_PfDmaAxcacheReg = 0x00B80010, 43d80f857dSNicolas Chautru VRB1_PfDmaAxiControl = 0x00B8002C, 44d80f857dSNicolas Chautru VRB1_PfDmaQmanen = 0x00B80040, 45d80f857dSNicolas Chautru VRB1_PfDma4gdlIbThld = 0x00B800CC, 46d80f857dSNicolas Chautru VRB1_PfDmaCfgRrespBresp = 0x00B80814, 47d80f857dSNicolas Chautru VRB1_PfDmaDescriptorSignatuture = 0x00B80868, 48d80f857dSNicolas Chautru VRB1_PfDmaErrorDetectionEn = 0x00B80870, 49d80f857dSNicolas Chautru VRB1_PfDmaFec5GulDescBaseLoRegVf = 0x00B88020, 50d80f857dSNicolas Chautru VRB1_PfDmaFec5GulDescBaseHiRegVf = 0x00B88024, 51d80f857dSNicolas Chautru VRB1_PfDmaFec5GulRespPtrLoRegVf = 0x00B88028, 52d80f857dSNicolas Chautru VRB1_PfDmaFec5GulRespPtrHiRegVf = 0x00B8802C, 53d80f857dSNicolas Chautru VRB1_PfDmaFec5GdlDescBaseLoRegVf = 0x00B88040, 54d80f857dSNicolas Chautru VRB1_PfDmaFec5GdlDescBaseHiRegVf = 0x00B88044, 55d80f857dSNicolas Chautru VRB1_PfDmaFec5GdlRespPtrLoRegVf = 0x00B88048, 56d80f857dSNicolas Chautru VRB1_PfDmaFec5GdlRespPtrHiRegVf = 0x00B8804C, 57d80f857dSNicolas Chautru VRB1_PfDmaFec4GulDescBaseLoRegVf = 0x00B88060, 58d80f857dSNicolas Chautru VRB1_PfDmaFec4GulDescBaseHiRegVf = 0x00B88064, 59d80f857dSNicolas Chautru VRB1_PfDmaFec4GulRespPtrLoRegVf = 0x00B88068, 60d80f857dSNicolas Chautru VRB1_PfDmaFec4GulRespPtrHiRegVf = 0x00B8806C, 61d80f857dSNicolas Chautru VRB1_PfDmaFec4GdlDescBaseLoRegVf = 0x00B88080, 62d80f857dSNicolas Chautru VRB1_PfDmaFec4GdlDescBaseHiRegVf = 0x00B88084, 63d80f857dSNicolas Chautru VRB1_PfDmaFec4GdlRespPtrLoRegVf = 0x00B88088, 64d80f857dSNicolas Chautru VRB1_PfDmaFec4GdlRespPtrHiRegVf = 0x00B8808C, 65d80f857dSNicolas Chautru VRB1_PfDmaFftDescBaseLoRegVf = 0x00B880A0, 66d80f857dSNicolas Chautru VRB1_PfDmaFftDescBaseHiRegVf = 0x00B880A4, 67d80f857dSNicolas Chautru VRB1_PfDmaFftRespPtrLoRegVf = 0x00B880A8, 68d80f857dSNicolas Chautru VRB1_PfDmaFftRespPtrHiRegVf = 0x00B880AC, 69d80f857dSNicolas Chautru VRB1_PfQosmonAEvalOverflow0 = 0x00B90008, 70d80f857dSNicolas Chautru VRB1_PfPermonACntrlRegVf = 0x00B98000, 71d80f857dSNicolas Chautru VRB1_PfQosmonBEvalOverflow0 = 0x00BA0008, 72d80f857dSNicolas Chautru VRB1_PfPermonBCntrlRegVf = 0x00BA8000, 73d80f857dSNicolas Chautru VRB1_PfPermonCCntrlRegVf = 0x00BB8000, 74d80f857dSNicolas Chautru VRB1_PfHiInfoRingBaseLoRegPf = 0x00C84014, 75d80f857dSNicolas Chautru VRB1_PfHiInfoRingBaseHiRegPf = 0x00C84018, 76d80f857dSNicolas Chautru VRB1_PfHiInfoRingPointerRegPf = 0x00C8401C, 77d80f857dSNicolas Chautru VRB1_PfHiInfoRingIntWrEnRegPf = 0x00C84020, 78d80f857dSNicolas Chautru VRB1_PfHiBlockTransmitOnErrorEn = 0x00C84038, 79d80f857dSNicolas Chautru VRB1_PfHiCfgMsiIntWrEnRegPf = 0x00C84040, 80d80f857dSNicolas Chautru VRB1_PfHiMsixVectorMapperPf = 0x00C84060, 81d80f857dSNicolas Chautru VRB1_PfHiPfMode = 0x00C84108, 82d80f857dSNicolas Chautru VRB1_PfHiClkGateHystReg = 0x00C8410C, 83d80f857dSNicolas Chautru VRB1_PfHiMsiDropEnableReg = 0x00C84114, 84d80f857dSNicolas Chautru VRB1_PfHiSectionPowerGatingReq = 0x00C84128, 85d80f857dSNicolas Chautru VRB1_PfHiSectionPowerGatingAck = 0x00C8412C, 86d80f857dSNicolas Chautru }; 87d80f857dSNicolas Chautru 88d80f857dSNicolas Chautru /* TIP PF Interrupt numbers */ 89d80f857dSNicolas Chautru enum { 90d80f857dSNicolas Chautru ACC_PF_INT_QMGR_AQ_OVERFLOW = 0, 91d80f857dSNicolas Chautru ACC_PF_INT_DOORBELL_VF_2_PF = 1, 92d80f857dSNicolas Chautru ACC_PF_INT_ILLEGAL_FORMAT = 2, 93d80f857dSNicolas Chautru ACC_PF_INT_QMGR_DISABLED_ACCESS = 3, 94d80f857dSNicolas Chautru ACC_PF_INT_QMGR_AQ_OVERTHRESHOLD = 4, 95d80f857dSNicolas Chautru ACC_PF_INT_DMA_DL_DESC_IRQ = 5, 96d80f857dSNicolas Chautru ACC_PF_INT_DMA_UL_DESC_IRQ = 6, 97d80f857dSNicolas Chautru ACC_PF_INT_DMA_FFT_DESC_IRQ = 7, 98d80f857dSNicolas Chautru ACC_PF_INT_DMA_UL5G_DESC_IRQ = 8, 99d80f857dSNicolas Chautru ACC_PF_INT_DMA_DL5G_DESC_IRQ = 9, 100d80f857dSNicolas Chautru ACC_PF_INT_DMA_MLD_DESC_IRQ = 10, 101*cfa551d2SNicolas Chautru ACC_PF_INT_ARAM_ACCESS_ERR = 11, 102*cfa551d2SNicolas Chautru ACC_PF_INT_ARAM_ECC_1BIT_ERR = 12, 103*cfa551d2SNicolas Chautru ACC_PF_INT_PARITY_ERR = 13, 104*cfa551d2SNicolas Chautru ACC_PF_INT_QMGR_OVERFLOW = 14, 105*cfa551d2SNicolas Chautru ACC_PF_INT_QMGR_ERR = 15, 106*cfa551d2SNicolas Chautru ACC_PF_INT_ATS_ERR = 22, 107*cfa551d2SNicolas Chautru ACC_PF_INT_ARAM_FUUL = 23, 108*cfa551d2SNicolas Chautru ACC_PF_INT_EXTRA_READ = 24, 109*cfa551d2SNicolas Chautru ACC_PF_INT_COMPLETION_TIMEOUT = 25, 110*cfa551d2SNicolas Chautru ACC_PF_INT_CORE_HANG = 26, 111*cfa551d2SNicolas Chautru ACC_PF_INT_DMA_HANG = 28, 112*cfa551d2SNicolas Chautru ACC_PF_INT_DS_HANG = 27, 113d80f857dSNicolas Chautru }; 114d80f857dSNicolas Chautru 115d80f857dSNicolas Chautru #endif /* VRB1_PF_ENUM_H */ 116