xref: /dpdk/doc/guides/prog_guide/mempool_lib.rst (revision daa02b5cddbb8e11b31d41e2bf7bb1ae64dcae2f)
1..  SPDX-License-Identifier: BSD-3-Clause
2    Copyright(c) 2010-2014 Intel Corporation.
3
4.. _Mempool_Library:
5
6Mempool Library
7===============
8
9A memory pool is an allocator of a fixed-sized object.
10In the DPDK, it is identified by name and uses a mempool handler to store free objects.
11The default mempool handler is ring based.
12It provides some other optional services such as a per-core object cache and
13an alignment helper to ensure that objects are padded to spread them equally on all DRAM or DDR3 channels.
14
15This library is used by the :ref:`Mbuf Library <Mbuf_Library>`.
16
17Cookies
18-------
19
20In debug mode, cookies are added at the beginning and end of allocated blocks.
21The allocated objects then contain overwrite protection fields to help debugging buffer overflows.
22
23Stats
24-----
25
26In debug mode, statistics about get from/put in the pool are stored in the mempool structure.
27Statistics are per-lcore to avoid concurrent access to statistics counters.
28
29Memory Alignment Constraints on x86 architecture
30------------------------------------------------
31
32Depending on hardware memory configuration on X86 architecture, performance can be greatly improved by adding a specific padding between objects.
33The objective is to ensure that the beginning of each object starts on a different channel and rank in memory so that all channels are equally loaded.
34
35This is particularly true for packet buffers when doing L3 forwarding or flow classification.
36Only the first 64 bytes are accessed, so performance can be increased by spreading the start addresses of objects among the different channels.
37
38The number of ranks on any DIMM is the number of independent sets of DRAMs that can be accessed for the full data bit-width of the DIMM.
39The ranks cannot be accessed simultaneously since they share the same data path.
40The physical layout of the DRAM chips on the DIMM itself does not necessarily relate to the number of ranks.
41
42When running an application, the EAL command line options provide the ability to add the number of memory channels and ranks.
43
44.. note::
45
46    The command line must always have the number of memory channels specified for the processor.
47
48Examples of alignment for different DIMM architectures are shown in
49:numref:`figure_memory-management` and :numref:`figure_memory-management2`.
50
51.. _figure_memory-management:
52
53.. figure:: img/memory-management.*
54
55   Two Channels and Quad-ranked DIMM Example
56
57
58In this case, the assumption is that a packet is 16 blocks of 64 bytes, which is not true.
59
60The Intel® 5520 chipset has three channels, so in most cases,
61no padding is required between objects (except for objects whose size are n x 3 x 64 bytes blocks).
62
63.. _figure_memory-management2:
64
65.. figure:: img/memory-management2.*
66
67   Three Channels and Two Dual-ranked DIMM Example
68
69
70When creating a new pool, the user can specify to use this feature or not.
71
72.. _mempool_local_cache:
73
74Local Cache
75-----------
76
77In terms of CPU usage, the cost of multiple cores accessing a memory pool's ring of free buffers may be high
78since each access requires a compare-and-set (CAS) operation.
79To avoid having too many access requests to the memory pool's ring,
80the memory pool allocator can maintain a per-core cache and do bulk requests to the memory pool's ring,
81via the cache with many fewer locks on the actual memory pool structure.
82In this way, each core has full access to its own cache (with locks) of free objects and
83only when the cache fills does the core need to shuffle some of the free objects back to the pools ring or
84obtain more objects when the cache is empty.
85
86While this may mean a number of buffers may sit idle on some core's cache,
87the speed at which a core can access its own cache for a specific memory pool without locks provides performance gains.
88
89The cache is composed of a small, per-core table of pointers and its length (used as a stack).
90This internal cache can be enabled or disabled at creation of the pool.
91
92The maximum size of the cache is static and is defined at compilation time (RTE_MEMPOOL_CACHE_MAX_SIZE).
93
94:numref:`figure_mempool` shows a cache in operation.
95
96.. _figure_mempool:
97
98.. figure:: img/mempool.*
99
100   A mempool in Memory with its Associated Ring
101
102Alternatively to the internal default per-lcore local cache, an application can create and manage external caches through the ``rte_mempool_cache_create()``, ``rte_mempool_cache_free()`` and ``rte_mempool_cache_flush()`` calls.
103These user-owned caches can be explicitly passed to ``rte_mempool_generic_put()`` and ``rte_mempool_generic_get()``.
104The ``rte_mempool_default_cache()`` call returns the default internal cache if any.
105In contrast to the default caches, user-owned caches can be used by unregistered non-EAL threads too.
106
107.. _Mempool_Handlers:
108
109Mempool Handlers
110------------------------
111
112This allows external memory subsystems, such as external hardware memory
113management systems and software based memory allocators, to be used with DPDK.
114
115There are two aspects to a mempool handler.
116
117* Adding the code for your new mempool operations (ops). This is achieved by
118  adding a new mempool ops code, and using the ``RTE_MEMPOOL_REGISTER_OPS`` macro.
119
120* Using the new API to call ``rte_mempool_create_empty()`` and
121  ``rte_mempool_set_ops_byname()`` to create a new mempool and specifying which
122  ops to use.
123
124Several different mempool handlers may be used in the same application. A new
125mempool can be created by using the ``rte_mempool_create_empty()`` function,
126then using ``rte_mempool_set_ops_byname()`` to point the mempool to the
127relevant mempool handler callback (ops) structure.
128
129Legacy applications may continue to use the old ``rte_mempool_create()`` API
130call, which uses a ring based mempool handler by default. These applications
131will need to be modified to use a new mempool handler.
132
133For applications that use ``rte_pktmbuf_create()``, there is a config setting
134(``RTE_MBUF_DEFAULT_MEMPOOL_OPS``) that allows the application to make use of
135an alternative mempool handler.
136
137  .. note::
138
139    When running a DPDK application with shared libraries, mempool handler
140    shared objects specified with the '-d' EAL command-line parameter are
141    dynamically loaded. When running a multi-process application with shared
142    libraries, the -d arguments for mempool handlers *must be specified in the
143    same order for all processes* to ensure correct operation.
144
145
146Use Cases
147---------
148
149All allocations that require a high level of performance should use a pool-based memory allocator.
150Below are some examples:
151
152*   :ref:`Mbuf Library <Mbuf_Library>`
153
154*   :ref:`Environment Abstraction Layer <Environment_Abstraction_Layer>` , for logging service
155
156*   Any application that needs to allocate fixed-sized objects in the data plane and that will be continuously utilized by the system.
157