History log of /dpdk/doc/guides/prog_guide/mempool_lib.rst (Results 1 – 19 of 19)
Revision Date Author Comments
# 41dd9a6b 08-Dec-2023 David Young <dave@youngcopy.com>

doc: reorganize prog guide

Create categories in the index of the programmer's guide,
sort chapters and rewrite some titles for consistency.

Subdirectories are created for ethdev and eventdev
for gr

doc: reorganize prog guide

Create categories in the index of the programmer's guide,
sort chapters and rewrite some titles for consistency.

Subdirectories are created for ethdev and eventdev
for grouping the files together.

Useless link anchors at the beginning of files are removed,
the corresponding :ref: are replaced with :doc: links.

Signed-off-by: David Young <dave@youngcopy.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>

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# 03e0f2de 15-Jul-2024 Jack Bond-Preston <jack.bond-preston@foss.arm.com>

doc: clarify mempool striding optimisation on Arm

The mempool memory channel striding optimisation is not necessary on
Arm platforms.
Update the Programmer's Guide's mempool section to clarify this.

doc: clarify mempool striding optimisation on Arm

The mempool memory channel striding optimisation is not necessary on
Arm platforms.
Update the Programmer's Guide's mempool section to clarify this.

Signed-off-by: Jack Bond-Preston <jack.bond-preston@foss.arm.com>
Reviewed-by: Wathsala Vithanage <wathsala.vithanage@arm.com>

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# 9d87e05d 09-Nov-2022 Morten Brørup <mb@smartsharesystems.com>

mempool: split stats from debug mode

Split stats from debug, to make mempool statistics available without the
performance cost of continuously validating the debug cookies in the
mempool elements.

mempool: split stats from debug mode

Split stats from debug, to make mempool statistics available without the
performance cost of continuously validating the debug cookies in the
mempool elements.

mempool_perf_autotest shows the following improvements in rate_persec.

The cost of enabling mempool debug without this patch:
-28.1 % and -74.0 %, respectively without and with cache.

The cost of enabling mempool stats (without debug) after this patch:
-5.8 % and -21.2 %, respectively without and with cache.

Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>

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# cb77b060 19-Oct-2021 Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>

mempool: add namespace to driver register macro

Add RTE_ prefix to macro used to register mempool driver.
The old one is still available but deprecated.

Signed-off-by: Andrew Rybchenko <andrew.rybc

mempool: add namespace to driver register macro

Add RTE_ prefix to macro used to register mempool driver.
The old one is still available but deprecated.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

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# 1fb6301c 07-Oct-2020 Gage Eads <gage.eads@intel.com>

doc: add stack mempool guide

This guide describes the two stack modes, their tradeoffs, and (via a
reference to the mempool guide) how to enable them.

Signed-off-by: Gage Eads <gage.eads@intel.com>

doc: add stack mempool guide

This guide describes the two stack modes, their tradeoffs, and (via a
reference to the mempool guide) how to enable them.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>

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# 89c67ae2 21-Sep-2020 Ciara Power <ciara.power@intel.com>

doc: remove references to make from prog guide

Make is no longer supported for compiling DPDK, references are now
removed in the documentation.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Re

doc: remove references to make from prog guide

Make is no longer supported for compiling DPDK, references are now
removed in the documentation.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>

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# 5c307ba2 06-Jul-2020 David Marchand <david.marchand@redhat.com>

eal: register non-EAL threads as lcores

DPDK allows calling some part of its API from a non-EAL thread but this
has some limitations.
OVS (and other applications) has its own thread management but s

eal: register non-EAL threads as lcores

DPDK allows calling some part of its API from a non-EAL thread but this
has some limitations.
OVS (and other applications) has its own thread management but still
want to avoid such limitations by hacking RTE_PER_LCORE(_lcore_id) and
faking EAL threads potentially unknown of some DPDK component.

Introduce a new API to register non-EAL thread and associate them to a
free lcore with a new NON_EAL role.
This role denotes lcores that do not run DPDK mainloop and as such
prevents use of rte_eal_wait_lcore() and consorts.

Multiprocess is not supported as the need for cohabitation with this new
feature is unclear at the moment.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>

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# 3f2d6766 14-Jan-2020 Jerin Jacob <jerinj@marvell.com>

mempool: remove memory wastage on non-x86

The existing optimize_object_size() function address the memory object
alignment constraint on x86 for better performance.

Different (micro) architecture m

mempool: remove memory wastage on non-x86

The existing optimize_object_size() function address the memory object
alignment constraint on x86 for better performance.

Different (micro) architecture may have different memory alignment
constraint for better performance and it not the same as the existing
optimize_object_size().

Some use, XOR(kind of CRC) scheme to enable DRAM channel distribution
based on the address and some may have a different formula.

Introducing arch_mem_object_align() function to abstract
the difference between different (micro) architectures to avoid
wasting memory for mempool object alignment for the architecture
that it is not required to do so.

Details on the amount of memory saving:

Currently, arm64 based architectures use the default (nchan=4,
nrank=1). The worst case is for an object whose size (including mempool
header) is 2 cache lines, where it is optimized to 3 cache lines (+50%).

Examples for cache lines size = 64:
orig optimized
64 -> 64 +0%
128 -> 192 +50%
192 -> 192 +0%
256 -> 320 +25%
320 -> 320 +0%
384 -> 448 +16%
...
2304 -> 2368 +2.7% (~mbuf size)

Additional details:
https://www.mail-archive.com/dev@dpdk.org/msg149157.html

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

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# 4ae9f32e 20-Jun-2019 Gage Eads <gage.eads@intel.com>

doc: add a note for multi-process in mempool guide

The mempool library assigns handler ops indexes based on the dynamic load
order of mempool handlers. Indexes are used so a mempool can be used by
m

doc: add a note for multi-process in mempool guide

The mempool library assigns handler ops indexes based on the dynamic load
order of mempool handlers. Indexes are used so a mempool can be used by
multiple processes, but this only works if all processes agree on the
mapping from index to mempool handler.

When using the '-d' argument, it's possible for different processes to load
mempool handlers in different orders, and thus have different
index->handler mappings. Using a mempool in multiple of such processes will
result in undefined behavior.

This commit adds a note to the mempool library programmer's guide warning
users against this.

Fixes: 449c49b93a6b ("mempool: support handler operations")
Cc: stable@dpdk.org

Signed-off-by: Gage Eads <gage.eads@intel.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>

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# 5630257f 01-Feb-2018 Ferruh Yigit <ferruh.yigit@intel.com>

doc: convert Intel license headers to SPDX tags

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>


# 885d4c0d 18-Jul-2016 Shreyansh Jain <shreyansh.jain@nxp.com>

doc: fix macro name in mempool guide

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: John McNamara <john.mcnamara@intel.com>


# 4b506275 28-Jun-2016 Lazaros Koromilas <l@nofutznetworks.com>

mempool: allow user-owned cache

The mempool cache is only available to EAL threads as a per-lcore
resource. Change this so that the user can create and provide their own
cache on mempool get and put

mempool: allow user-owned cache

The mempool cache is only available to EAL threads as a per-lcore
resource. Change this so that the user can create and provide their own
cache on mempool get and put operations. This works with non-EAL threads
too. This commit introduces the new API calls:

rte_mempool_cache_create(size, socket_id)
rte_mempool_cache_free(cache)
rte_mempool_cache_flush(cache, mp)
rte_mempool_default_cache(mp, lcore_id)

Changes the API calls:

rte_mempool_generic_put(mp, obj_table, n, cache, flags)
rte_mempool_generic_get(mp, obj_table, n, cache, flags)

The cache-oblivious API calls use the per-lcore default local cache.

Signed-off-by: Lazaros Koromilas <l@nofutznetworks.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

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# 449c49b9 22-Jun-2016 David Hunt <david.hunt@intel.com>

mempool: support handler operations

Until now, the objects stored in a mempool were internally stored in a
ring. This patch introduces the possibility to register external handlers
replacing the rin

mempool: support handler operations

Until now, the objects stored in a mempool were internally stored in a
ring. This patch introduces the possibility to register external handlers
replacing the ring.

The default behavior remains unchanged, but calling the new function
rte_mempool_set_ops_byname() right after rte_mempool_create_empty() allows
the user to change the handler that will be used when populating
the mempool.

This patch also adds a set of default ops (function callbacks) based
on rte_ring.

Signed-off-by: David Hunt <david.hunt@intel.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

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# a3f34a98 09-Jun-2016 Thomas Monjalon <thomas.monjalon@6wind.com>

log: deprecate history dump

The log history uses rte_mempool. In order to remove the mempool
dependency in EAL (and improve the build), this feature is deprecated.
The ABI is kept but the behaviour

log: deprecate history dump

The log history uses rte_mempool. In order to remove the mempool
dependency in EAL (and improve the build), this feature is deprecated.
The ABI is kept but the behaviour is now voided because it seems this
function was not used. The history can be read from syslog.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: David Marchand <david.marchand@6wind.com>

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# 29e30cbc 11-Apr-2016 Thomas Monjalon <thomas.monjalon@6wind.com>

doc: fix references in guides

Replace some hard-coded section numbers by dynamic links.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>


# 4a22e6ee 18-May-2015 John McNamara <john.mcnamara@intel.com>

doc: refactor figure numbers into references

This change adds automatic figure references to the docs. The
figure numbers in the generated Html and PDF docs are now
automatically numbered based on s

doc: refactor figure numbers into references

This change adds automatic figure references to the docs. The
figure numbers in the generated Html and PDF docs are now
automatically numbered based on section.

Requires Sphinx >= 1.3.1.

The patch makes the following changes.

* Changes image:: tag to figure:: and moves image caption
to the figure.

* Adds captions to figures that didn't previously have any.

* Un-templates the |image-name| substitution definitions
into explicit figure:: tags. They weren't used more
than once anyway and Sphinx doesn't support them
for figure.

* Adds a target to each image that didn't previously
have one so that they can be cross-referenced.

* Renamed existing image target to match the image
name for consistency.

* Replaces the Figures lists with automatic :numref:
:ref: entries to generate automatic numbering
and captions.

* Replaces "Figure" references with automatic :numref:
references.

Signed-off-by: John McNamara <john.mcnamara@intel.com>

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# ba9e05cb 03-Feb-2015 John McNamara <john.mcnamara@intel.com>

doc: convert image extensions to wildcard

Changed all image.svg and image.png extensions to image.*
This allows Sphinx to decide the appropriate image type
from the available image options.

In case

doc: convert image extensions to wildcard

Changed all image.svg and image.png extensions to image.*
This allows Sphinx to decide the appropriate image type
from the available image options.

In case of PDF, SVG images are converted and Sphinx must pick
the converted version.

Signed-off-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>

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# 48624fd9 19-Dec-2014 Siobhan Butler <siobhan.a.butler@intel.com>

doc: remove Intel references from prog guide

Removed redundant references to Intel(R) DPDK in Programmers Guide.

Signed-off-by: Siobhan Butler <siobhan.a.butler@intel.com>
Acked-by: Bernard Iremong

doc: remove Intel references from prog guide

Removed redundant references to Intel(R) DPDK in Programmers Guide.

Signed-off-by: Siobhan Butler <siobhan.a.butler@intel.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>

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# fc1f2750 14-Nov-2014 Bernard Iremonger <bernard.iremonger@intel.com>

doc: programmers guide

The 1.7 DPDK_Prog_Guide document in MSWord has been converted to rst format for
use with Sphinx. There is an rst file for each chapter and an index.rst file
which contains the

doc: programmers guide

The 1.7 DPDK_Prog_Guide document in MSWord has been converted to rst format for
use with Sphinx. There is an rst file for each chapter and an index.rst file
which contains the table of contents.
The top level index file has been modified to include this guide.

This document contains some png image files. If any of these png files are modified
they should be replaced with an svg file.

This is the sixth document from a set of 6 documents.

Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>

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