1.. SPDX-License-Identifier: BSD-3-Clause 2 Copyright(c) 2010-2014 Intel Corporation. 3 4.. _Mempool_Library: 5 6Mempool Library 7=============== 8 9A memory pool is an allocator of a fixed-sized object. 10In the DPDK, it is identified by name and uses a mempool handler to store free objects. 11The default mempool handler is ring based. 12It provides some other optional services such as a per-core object cache and 13an alignment helper to ensure that objects are padded to spread them equally on all DRAM or DDR3 channels. 14 15This library is used by the :ref:`Mbuf Library <Mbuf_Library>`. 16 17Cookies 18------- 19 20In debug mode (CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG is enabled), cookies are added at the beginning and end of allocated blocks. 21The allocated objects then contain overwrite protection fields to help debugging buffer overflows. 22 23Stats 24----- 25 26In debug mode (CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG is enabled), 27statistics about get from/put in the pool are stored in the mempool structure. 28Statistics are per-lcore to avoid concurrent access to statistics counters. 29 30Memory Alignment Constraints 31---------------------------- 32 33Depending on hardware memory configuration, performance can be greatly improved by adding a specific padding between objects. 34The objective is to ensure that the beginning of each object starts on a different channel and rank in memory so that all channels are equally loaded. 35 36This is particularly true for packet buffers when doing L3 forwarding or flow classification. 37Only the first 64 bytes are accessed, so performance can be increased by spreading the start addresses of objects among the different channels. 38 39The number of ranks on any DIMM is the number of independent sets of DRAMs that can be accessed for the full data bit-width of the DIMM. 40The ranks cannot be accessed simultaneously since they share the same data path. 41The physical layout of the DRAM chips on the DIMM itself does not necessarily relate to the number of ranks. 42 43When running an application, the EAL command line options provide the ability to add the number of memory channels and ranks. 44 45.. note:: 46 47 The command line must always have the number of memory channels specified for the processor. 48 49Examples of alignment for different DIMM architectures are shown in 50:numref:`figure_memory-management` and :numref:`figure_memory-management2`. 51 52.. _figure_memory-management: 53 54.. figure:: img/memory-management.* 55 56 Two Channels and Quad-ranked DIMM Example 57 58 59In this case, the assumption is that a packet is 16 blocks of 64 bytes, which is not true. 60 61The Intel® 5520 chipset has three channels, so in most cases, 62no padding is required between objects (except for objects whose size are n x 3 x 64 bytes blocks). 63 64.. _figure_memory-management2: 65 66.. figure:: img/memory-management2.* 67 68 Three Channels and Two Dual-ranked DIMM Example 69 70 71When creating a new pool, the user can specify to use this feature or not. 72 73.. _mempool_local_cache: 74 75Local Cache 76----------- 77 78In terms of CPU usage, the cost of multiple cores accessing a memory pool's ring of free buffers may be high 79since each access requires a compare-and-set (CAS) operation. 80To avoid having too many access requests to the memory pool's ring, 81the memory pool allocator can maintain a per-core cache and do bulk requests to the memory pool's ring, 82via the cache with many fewer locks on the actual memory pool structure. 83In this way, each core has full access to its own cache (with locks) of free objects and 84only when the cache fills does the core need to shuffle some of the free objects back to the pools ring or 85obtain more objects when the cache is empty. 86 87While this may mean a number of buffers may sit idle on some core's cache, 88the speed at which a core can access its own cache for a specific memory pool without locks provides performance gains. 89 90The cache is composed of a small, per-core table of pointers and its length (used as a stack). 91This internal cache can be enabled or disabled at creation of the pool. 92 93The maximum size of the cache is static and is defined at compilation time (CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE). 94 95:numref:`figure_mempool` shows a cache in operation. 96 97.. _figure_mempool: 98 99.. figure:: img/mempool.* 100 101 A mempool in Memory with its Associated Ring 102 103Alternatively to the internal default per-lcore local cache, an application can create and manage external caches through the ``rte_mempool_cache_create()``, ``rte_mempool_cache_free()`` and ``rte_mempool_cache_flush()`` calls. 104These user-owned caches can be explicitly passed to ``rte_mempool_generic_put()`` and ``rte_mempool_generic_get()``. 105The ``rte_mempool_default_cache()`` call returns the default internal cache if any. 106In contrast to the default caches, user-owned caches can be used by non-EAL threads too. 107 108Mempool Handlers 109------------------------ 110 111This allows external memory subsystems, such as external hardware memory 112management systems and software based memory allocators, to be used with DPDK. 113 114There are two aspects to a mempool handler. 115 116* Adding the code for your new mempool operations (ops). This is achieved by 117 adding a new mempool ops code, and using the ``MEMPOOL_REGISTER_OPS`` macro. 118 119* Using the new API to call ``rte_mempool_create_empty()`` and 120 ``rte_mempool_set_ops_byname()`` to create a new mempool and specifying which 121 ops to use. 122 123Several different mempool handlers may be used in the same application. A new 124mempool can be created by using the ``rte_mempool_create_empty()`` function, 125then using ``rte_mempool_set_ops_byname()`` to point the mempool to the 126relevant mempool handler callback (ops) structure. 127 128Legacy applications may continue to use the old ``rte_mempool_create()`` API 129call, which uses a ring based mempool handler by default. These applications 130will need to be modified to use a new mempool handler. 131 132For applications that use ``rte_pktmbuf_create()``, there is a config setting 133(``RTE_MBUF_DEFAULT_MEMPOOL_OPS``) that allows the application to make use of 134an alternative mempool handler. 135 136 .. note:: 137 138 When running a DPDK application with shared libraries, mempool handler 139 shared objects specified with the '-d' EAL command-line parameter are 140 dynamically loaded. When running a multi-process application with shared 141 libraries, the -d arguments for mempool handlers *must be specified in the 142 same order for all processes* to ensure correct operation. 143 144 145Use Cases 146--------- 147 148All allocations that require a high level of performance should use a pool-based memory allocator. 149Below are some examples: 150 151* :ref:`Mbuf Library <Mbuf_Library>` 152 153* :ref:`Environment Abstraction Layer <Environment_Abstraction_Layer>` , for logging service 154 155* Any application that needs to allocate fixed-sized objects in the data plane and that will be continuously utilized by the system. 156