xref: /dpdk/doc/guides/cryptodevs/dpaa2_sec.rst (revision 869fede8d6795ea2b1e528f79b93a363eeff3ad0)
1..  BSD LICENSE
2    Copyright(c) 2016 NXP. All rights reserved.
3
4    Redistribution and use in source and binary forms, with or without
5    modification, are permitted provided that the following conditions
6    are met:
7
8    * Redistributions of source code must retain the above copyright
9    notice, this list of conditions and the following disclaimer.
10    * Redistributions in binary form must reproduce the above copyright
11    notice, this list of conditions and the following disclaimer in
12    the documentation and/or other materials provided with the
13    distribution.
14    * Neither the name of NXP nor the names of its
15    contributors may be used to endorse or promote products derived
16    from this software without specific prior written permission.
17
18    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
30
31NXP DPAA2 CAAM (DPAA2_SEC)
32==========================
33
34The DPAA2_SEC PMD provides poll mode crypto driver support for NXP DPAA2 CAAM
35hardware accelerator.
36
37Architecture
38------------
39
40SEC is the SOC's security engine, which serves as NXP's latest cryptographic
41acceleration and offloading hardware. It combines functions previously
42implemented in separate modules to create a modular and scalable acceleration
43and assurance engine. It also implements block encryption algorithms, stream
44cipher algorithms, hashing algorithms, public key algorithms, run-time
45integrity checking, and a hardware random number generator. SEC performs
46higher-level cryptographic operations than previous NXP cryptographic
47accelerators. This provides significant improvement to system level performance.
48
49DPAA2_SEC is one of the hardware resource in DPAA2 Architecture. More information
50on DPAA2 Architecture is described in :ref:`dpaa2_overview`.
51
52DPAA2_SEC PMD is one of DPAA2 drivers which interacts with Management Complex (MC)
53portal to access the hardware object - DPSECI. The MC provides access to create,
54discover, connect, configure and destroy dpseci objects in DPAA2_SEC PMD.
55
56DPAA2_SEC PMD also uses some of the other hardware resources like buffer pools,
57queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
58
59DPSECI objects are detected by PMD using a resource container called DPRC (like
60in :ref:`dpaa2_overview`).
61
62For example:
63
64.. code-block:: console
65
66    DPRC.1 (bus)
67      |
68      +--+--------+-------+-------+-------+---------+
69         |        |       |       |       |         |
70       DPMCP.1  DPIO.1  DPBP.1  DPNI.1  DPMAC.1  DPSECI.1
71       DPMCP.2  DPIO.2          DPNI.2  DPMAC.2  DPSECI.2
72       DPMCP.3
73
74Implementation
75--------------
76
77SEC provides platform assurance by working with SecMon, which is a companion
78logic block that tracks the security state of the SOC. SEC is programmed by
79means of descriptors (not to be confused with frame descriptors (FDs)) that
80indicate the operations to be performed and link to the message and
81associated data. SEC incorporates two DMA engines to fetch the descriptors,
82read the message data, and write the results of the operations. The DMA
83engine provides a scatter/gather capability so that SEC can read and write
84data scattered in memory. SEC may be configured by means of software for
85dynamic changes in byte ordering. The default configuration for this version
86of SEC is little-endian mode.
87
88A block diagram similar to dpaa2 NIC is shown below to show where DPAA2_SEC
89fits in the DPAA2 Bus model
90
91.. code-block:: console
92
93
94                                       +----------------+
95                                       | DPDK DPAA2_SEC |
96                                       |     PMD        |
97                                       +----------------+       +------------+
98                                       |  MC SEC object |.......|  Mempool   |
99                    . . . . . . . . .  |   (DPSECI)     |       |  (DPBP)    |
100                   .                   +---+---+--------+       +-----+------+
101                  .                        ^   |                      .
102                 .                         |   |<enqueue,             .
103                .                          |   | dequeue>             .
104               .                           |   |                      .
105              .                        +---+---V----+                 .
106             .      . . . . . . . . . .| DPIO driver|                 .
107            .      .                   |  (DPIO)    |                 .
108           .      .                    +-----+------+                 .
109          .      .                     |  QBMAN     |                 .
110         .      .                      |  Driver    |                 .
111    +----+------+-------+              +-----+----- |                 .
112    |   dpaa2 bus       |                    |                        .
113    |   VFIO fslmc-bus  |....................|.........................
114    |                   |                    |
115    |     /bus/fslmc    |                    |
116    +-------------------+                    |
117                                             |
118    ========================== HARDWARE =====|=======================
119                                           DPIO
120                                             |
121                                           DPSECI---DPBP
122    =========================================|========================
123
124
125
126Features
127--------
128
129The DPAA2 PMD has support for:
130
131Cipher algorithms:
132
133* ``RTE_CRYPTO_CIPHER_3DES_CBC``
134* ``RTE_CRYPTO_CIPHER_AES128_CBC``
135* ``RTE_CRYPTO_CIPHER_AES192_CBC``
136* ``RTE_CRYPTO_CIPHER_AES256_CBC``
137
138Hash algorithms:
139
140* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
141* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
142* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
143* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
144* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
145* ``RTE_CRYPTO_AUTH_MD5_HMAC``
146
147Supported DPAA2 SoCs
148--------------------
149
150* LS2080A/LS2040A
151* LS2084A/LS2044A
152* LS2088A/LS2048A
153* LS1088A/LS1048A
154
155Limitations
156-----------
157
158* Chained mbufs are not supported.
159* Hash followed by Cipher mode is not supported
160* Only supports the session-oriented API implementation (session-less APIs are not supported).
161
162Prerequisites
163-------------
164
165DPAA2_SEC driver has similar pre-requisites as described in :ref:`dpaa2_overview`.
166The following dependencies are not part of DPDK and must be installed separately:
167
168* **NXP Linux SDK**
169
170  NXP Linux software development kit (SDK) includes support for the family
171  of QorIQ® ARM-Architecture-based system on chip (SoC) processors
172  and corresponding boards.
173
174  It includes the Linux board support packages (BSPs) for NXP SoCs,
175  a fully operational tool chain, kernel and board specific modules.
176
177  SDK and related information can be obtained from:  `NXP QorIQ SDK  <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_.
178
179* **DPDK Helper Scripts**
180
181  DPAA2 based resources can be configured easily with the help of ready scripts
182  as provided in the DPDK helper repository.
183
184  `DPDK Helper Scripts <https://github.com/qoriq-open-source/dpdk-helper>`_.
185
186Currently supported by DPDK:
187
188* NXP SDK **2.0+**.
189* MC Firmware version **10.0.0** and higher.
190* Supported architectures:  **arm64 LE**.
191
192* Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
193
194Pre-Installation Configuration
195------------------------------
196
197Config File Options
198~~~~~~~~~~~~~~~~~~~
199
200Basic DPAA2 config file options are described in :ref:`dpaa2_overview`.
201In addition to those, the following options can be modified in the ``config`` file
202to enable DPAA2_SEC PMD.
203
204Please note that enabling debugging options may affect system performance.
205
206* ``CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC`` (default ``n``)
207  By default it is only enabled in defconfig_arm64-dpaa2-* config.
208  Toggle compilation of the ``librte_pmd_dpaa2_sec`` driver.
209
210* ``CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT`` (default ``n``)
211  Toggle display of initialization related driver messages
212
213* ``CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER`` (default ``n``)
214  Toggle display of driver runtime messages
215
216* ``CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX`` (default ``n``)
217  Toggle display of receive fast path run-time message
218
219* ``CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS``
220  By default it is set as 2048 in defconfig_arm64-dpaa2-* config.
221  It indicates Number of sessions to create in the session memory pool
222  on a single DPAA2 SEC device.
223
224Installations
225-------------
226To compile the DPAA2_SEC PMD for Linux arm64 gcc target, run the
227following ``make`` command:
228
229.. code-block:: console
230
231   cd <DPDK-source-directory>
232   make config T=arm64-dpaa2-linuxapp-gcc install
233